From: Stephen Boyd Date: Fri, 7 Apr 2017 19:21:33 +0000 (-0700) Subject: clk: zte: Mark pll config tables as const X-Git-Tag: v4.12-rc1~30^2~48 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=15a2a14b23024ab79fd22de28ba7c006be46aa53;p=karo-tx-linux.git clk: zte: Mark pll config tables as const These should be const. Cc: Shawn Guo Cc: Jun Nie Signed-off-by: Stephen Boyd Signed-off-by: Michael Turquette --- diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c index 8db0119bc6f7..a10962988ba8 100644 --- a/drivers/clk/zte/clk-zx296718.c +++ b/drivers/clk/zte/clk-zx296718.c @@ -94,14 +94,14 @@ static DEFINE_SPINLOCK(clk_lock); -static struct zx_pll_config pll_cpu_table[] = { +static const struct zx_pll_config pll_cpu_table[] = { PLL_RATE(1312000000, 0x00103621, 0x04aaaaaa), PLL_RATE(1407000000, 0x00103a21, 0x04aaaaaa), PLL_RATE(1503000000, 0x00103e21, 0x04aaaaaa), PLL_RATE(1600000000, 0x00104221, 0x04aaaaaa), }; -static struct zx_pll_config pll_vga_table[] = { +static const struct zx_pll_config pll_vga_table[] = { PLL_RATE(36000000, 0x00102464, 0x04000000), /* 800x600@56 */ PLL_RATE(40000000, 0x00102864, 0x04000000), /* 800x600@60 */ PLL_RATE(49500000, 0x00103164, 0x04800000), /* 800x600@75 */