From: Uwe Kleine-König Date: Tue, 8 Oct 2013 14:38:53 +0000 (+0200) Subject: ARM: at91: rm9200: switch back to clockevents_config_and_register X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=1c283531115bda77a9b559271311c1983fbcffaa;p=linux-beck.git ARM: at91: rm9200: switch back to clockevents_config_and_register The timer code for at91rm9200 was already converted some time ago by Shawn Guo in commit 838a2ae (ARM: use clockevents_config_and_register() where possible) but because of a rounding issue in the timer core this resulted in an easily reproducible oops. So it was reverted (commit b7a8ca5 (ARM: at91: rm9200 fix time support)) which stopped the oops from happening because min_delta_ns is increased by one in arch code which stopped from problem from happening. Now that the timer core problem is fixed (commit a4578ea (clockevents: Sanitize ticks to nsec conversion)), we can switch back to the clockevents_config_and_register helper. Tested-by: Nicolas Ferre Signed-off-by: Uwe Kleine-König Signed-off-by: Daniel Lezcano --- diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index f607deb40f4d..bc7b363a3083 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c @@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) static struct clock_event_device clkevt = { .name = "at91_tick", .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .shift = 32, .rating = 150, .set_next_event = clkevt32k_next_event, .set_mode = clkevt32k_mode, @@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void) at91_st_write(AT91_ST_RTMR, 1); /* Setup timer clockevent, with minimum of two ticks (important!!) */ - clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift); - clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt); - clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1; clkevt.cpumask = cpumask_of(0); - clockevents_register_device(&clkevt); + clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK, + 2, AT91_ST_ALMV); /* register clocksource */ clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);