From: Daniel Vetter Date: Thu, 29 Nov 2012 14:59:32 +0000 (+0100) Subject: drm/i915: rip out pre-production ilk cpu edp w/a X-Git-Tag: next-20130218~64^2~24^2~38 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=1ce17038093f02e708e5816f645bbec63aff8bd2;p=karo-tx-linux.git drm/i915: rip out pre-production ilk cpu edp w/a While reading docs I've noticed that this special workaround to select the 1.6 GHz DP clock only applies to pre-production ilk machines. Since the registers we're touching here are rather undocumented and might be harmful on later chips, rip it out. For the Bspec reference of this w/a look in "vol4g CPU Display Registers [DevILK]", Section 4.1.7.1 "DP_A—DisplayPort A Control Register", "DP_PLL_Frequency_Select". v2: Keep a debug message as a hint in case something regresses. Requested by Chris Wilson. Reviewed-by: Paulo Zanoni Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index e525f0302d8f..c01163d22d17 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -910,26 +910,15 @@ static void ironlake_set_pll_edp(struct drm_crtc *crtc, int clock) dpa_ctl &= ~DP_PLL_FREQ_MASK; if (clock < 200000) { - u32 temp; + /* For a long time we've carried around a ILK-DevA w/a for the + * 160MHz clock. If we're really unlucky, it's still required. + */ + DRM_DEBUG_KMS("160MHz cpu eDP clock, might need ilk devA w/a\n"); dpa_ctl |= DP_PLL_FREQ_160MHZ; - /* workaround for 160Mhz: - 1) program 0x4600c bits 15:0 = 0x8124 - 2) program 0x46010 bit 0 = 1 - 3) program 0x46034 bit 24 = 1 - 4) program 0x64000 bit 14 = 1 - */ - temp = I915_READ(0x4600c); - temp &= 0xffff0000; - I915_WRITE(0x4600c, temp | 0x8124); - - temp = I915_READ(0x46010); - I915_WRITE(0x46010, temp | 1); - - temp = I915_READ(0x46034); - I915_WRITE(0x46034, temp | (1 << 24)); } else { dpa_ctl |= DP_PLL_FREQ_270MHZ; } + I915_WRITE(DP_A, dpa_ctl); POSTING_READ(DP_A);