From: Ranjani Vaidyanathan <ra5478@freescale.com>
Date: Thu, 17 May 2012 04:41:47 +0000 (-0500)
Subject: ENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates.
X-Git-Tag: v3.0.35-fsl_4.1.0~1181
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=249ca9b64bc9fe53e8eae4135f82a02e545a0e65;p=karo-tx-linux.git

ENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates.

Set CPU_CLK to be 1GHz at boot and ABH_CLK to be 132MHz.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
---

diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c
index fd1cb30b4202..60325bdc7089 100755
--- a/arch/arm/mach-mx6/board-mx6sl_arm2.c
+++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c
@@ -196,6 +196,9 @@ static void __init mx6_arm2_init(void)
 {
 	mxc_iomux_v3_setup_multiple_pads(mx6sl_arm2_pads, ARRAY_SIZE(mx6sl_arm2_pads));
 
+	gp_reg_id = "cpu_vddgp";
+	mx6_cpu_regulator_init();
+
 	imx6q_add_imx_i2c(0, &mx6_arm2_i2c0_data);
 	imx6q_add_imx_i2c(1, &mx6_arm2_i2c1_data);
 	i2c_register_board_info(0, mxc_i2c0_board_info,
@@ -206,6 +209,7 @@ static void __init mx6_arm2_init(void)
 	i2c_register_board_info(2, mxc_i2c2_board_info,
 			ARRAY_SIZE(mxc_i2c2_board_info));
 	mx6sl_arm2_init_pfuze100(0);
+
 	mx6_arm2_init_uart();
 	/* get enet tx reference clk from FEC_REF_CLK pad.
 	 * GPR1[14] = 0, GPR1[18:17] = 00
diff --git a/arch/arm/mach-mx6/clock_mx6sl.c b/arch/arm/mach-mx6/clock_mx6sl.c
index 08d9e612862e..eaf0d32222d3 100755
--- a/arch/arm/mach-mx6/clock_mx6sl.c
+++ b/arch/arm/mach-mx6/clock_mx6sl.c
@@ -3630,6 +3630,9 @@ int __init mx6sl_clocks_init(unsigned long ckil, unsigned long osc,
 
 	clk_tree_init();
 
+	/* Set AHB to 132MHz. */
+	clk_set_rate(&ahb_clk, clk_round_rate(&ahb_clk, 132000000));
+
 	pll2_pfd0_352M.disable(&pll2_pfd0_352M);
 	pll2_pfd1_594M.disable(&pll2_pfd1_594M);