From: Christopher Pau <christopher.pau@intel.com>
Date: Wed, 4 Jun 2014 20:41:59 +0000 (+0000)
Subject: i40e: limit GLLAN_TXPRE_QDIS to QINDX 0-127
X-Git-Tag: v3.17-rc1~106^2~241^2~5
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=24a768cfc4f8cbbb3eaf56284610e652ef05fc5b;p=karo-tx-linux.git

i40e: limit GLLAN_TXPRE_QDIS to QINDX 0-127

Prevent writing to reserved bits, queue index is 0-127

Change-ID: Ic923e1c92012a265983414acd8f547c4bdac2e34
Signed-off-by: Christopher Pau <christopher.pau@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---

diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c
index 8305c8a4a0d8..9d09ab31ec89 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_common.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c
@@ -669,8 +669,10 @@ void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)
 	u32 reg_block = 0;
 	u32 reg_val;
 
-	if (abs_queue_idx >= 128)
+	if (abs_queue_idx >= 128) {
 		reg_block = abs_queue_idx / 128;
+		abs_queue_idx %= 128;
+	}
 
 	reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
 	reg_val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK;