From: Marek Vasut <marex@denx.de>
Date: Thu, 19 Nov 2015 16:15:05 +0000 (-0600)
Subject: ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=34a315883f60344f2116dcd445388531d09dc066;p=linux-beck.git

ARM: socfpga: Add support for DENX MCV SoM and MCVEVK baseboard

Add support for the DENX MCV SoM and MCVEVK baseboard. The SoM contains
eMMC, DRAM, Altera Cyclone V SoC. The baseboard contains CAN ports, UART
ports, STMPE811 touchscreen controller, USB OTG port, ethernet port and
a lot of IO pins.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Vince Bridgers <vbridgers2013@gmail.com>
Cc: Alan Tull <atull@altera.com>
Cc: Thor Thayer <tthayer@altera.com>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 30bbc3746130..17fb11b54b33 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -557,6 +557,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
 dtb-$(CONFIG_ARCH_SOCFPGA) += \
 	socfpga_arria5_socdk.dtb \
 	socfpga_arria10_socdk_sdmmc.dtb \
+	socfpga_cyclone5_mcvevk.dtb \
 	socfpga_cyclone5_socdk.dtb \
 	socfpga_cyclone5_de0_sockit.dtb \
 	socfpga_cyclone5_sockit.dtb \
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
new file mode 100644
index 000000000000..f0e03a23a864
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+       model = "DENX MCV";
+       compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+       memory {
+               name = "memory";
+               device_type = "memory";
+               reg = <0x0 0x40000000>; /* 1 GiB */
+       };
+};
+
+&mmc0 {        /* On-SoM eMMC */
+       bus-width = <8>;
+};
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
new file mode 100644
index 000000000000..09d0deddcbf9
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5_mcv.dtsi"
+
+/ {
+       model = "DENX MCV EVK";
+       compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+       aliases {
+               ethernet0 = &gmac0;
+               stmpe-i2c0 = &stmpe1;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+};
+
+&can0 {
+       status = "okay";
+};
+
+&can1 {
+       status = "okay";
+};
+
+&gmac0 {
+       phy-mode = "rgmii";
+       status = "okay";
+};
+
+&gpio0 {       /* GPIO  0 ... 28 */
+       status = "okay";
+};
+
+&gpio1 {       /* GPIO 29 ... 57 */
+       status = "okay";
+};
+
+&gpio2 {       /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+       speed-mode = <0>;
+
+       stmpe1: stmpe811@41 {
+               compatible = "st,stmpe811";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x41>;
+               id = <0>;
+               blocks = <0x5>;
+               irq-gpio = <&portb 28 0x4>;     /* GPIO 57, trig. level HI */
+
+               stmpe_touchscreen {
+                       compatible = "st,stmpe-ts";
+                       reg = <0>;
+                       ts,sample-time = <4>;
+                       ts,mod-12b = <1>;
+                       ts,ref-sel = <0>;
+                       ts,adc-freq = <1>;
+                       ts,ave-ctrl = <1>;
+                       ts,touch-det-delay = <3>;
+                       ts,settling = <4>;
+                       ts,fraction-z = <7>;
+                       ts,i-drive = <1>;
+               };
+       };
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};