From: Chunming Zhou Date: Tue, 21 Jul 2015 05:47:05 +0000 (+0800) Subject: drm/amdgpu: add bo list copy X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=372bc1e18ca961ef51997df235e822aed6283726;p=linux-beck.git drm/amdgpu: add bo list copy Signed-off-by: Chunming Zhou Acked-by: Christian K?nig Reviewed-by: Jammy Zhou --- diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 6bf16d95e7e4..cfc6c786b2f2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -1062,6 +1062,9 @@ struct amdgpu_bo_list { struct amdgpu_bo_list * amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id); void amdgpu_bo_list_put(struct amdgpu_bo_list *list); +void amdgpu_bo_list_copy(struct amdgpu_device *adev, + struct amdgpu_bo_list *dst, + struct amdgpu_bo_list *src); void amdgpu_bo_list_free(struct amdgpu_bo_list *list); /* diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c index f82a2dd83874..4d27fa1660b9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c @@ -166,6 +166,56 @@ void amdgpu_bo_list_put(struct amdgpu_bo_list *list) mutex_unlock(&list->lock); } +void amdgpu_bo_list_copy(struct amdgpu_device *adev, + struct amdgpu_bo_list *dst, + struct amdgpu_bo_list *src) +{ + struct amdgpu_bo_list_entry *array; + struct amdgpu_bo *gds_obj = adev->gds.gds_gfx_bo; + struct amdgpu_bo *gws_obj = adev->gds.gws_gfx_bo; + struct amdgpu_bo *oa_obj = adev->gds.oa_gfx_bo; + + bool has_userptr = false; + unsigned i; + + array = drm_calloc_large(src->num_entries, sizeof(struct amdgpu_bo_list_entry)); + if (!array) + return; + memset(array, 0, src->num_entries * sizeof(struct amdgpu_bo_list_entry)); + + for (i = 0; i < src->num_entries; ++i) { + memcpy(array, src->array, + src->num_entries * sizeof(struct amdgpu_bo_list_entry)); + array[i].robj = amdgpu_bo_ref(src->array[i].robj); + if (amdgpu_ttm_tt_has_userptr(array[i].robj->tbo.ttm)) { + has_userptr = true; + array[i].prefered_domains = AMDGPU_GEM_DOMAIN_GTT; + array[i].allowed_domains = AMDGPU_GEM_DOMAIN_GTT; + } + array[i].tv.bo = &array[i].robj->tbo; + array[i].tv.shared = true; + + if (array[i].prefered_domains == AMDGPU_GEM_DOMAIN_GDS) + gds_obj = array[i].robj; + if (array[i].prefered_domains == AMDGPU_GEM_DOMAIN_GWS) + gws_obj = array[i].robj; + if (array[i].prefered_domains == AMDGPU_GEM_DOMAIN_OA) + oa_obj = array[i].robj; + } + + for (i = 0; i < dst->num_entries; ++i) + amdgpu_bo_unref(&dst->array[i].robj); + + drm_free_large(dst->array); + + dst->gds_obj = gds_obj; + dst->gws_obj = gws_obj; + dst->oa_obj = oa_obj; + dst->has_userptr = has_userptr; + dst->array = array; + dst->num_entries = src->num_entries; +} + void amdgpu_bo_list_free(struct amdgpu_bo_list *list) { unsigned i;