From: Sanchayan Maity <maitysanchayan@gmail.com>
Date: Sun, 18 Oct 2015 05:48:48 +0000 (+0530)
Subject: ARM: dts: vfxxx: Fix erroneous property in esdhc0 node
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=3fa2f9496554bc23eb62f958c920e9fcee7ba232;p=linux-beck.git

ARM: dts: vfxxx: Fix erroneous property in esdhc0 node

Something seems to have gone wrong during the merging of the device
tree changes with the following patch

"ARM: dts: add property for maximum ADC clock frequencies"

The property "fsl,adck-max-frequency" instead of being applied for
the ADC1 node got applied to the esdhc0 node. This patch fixes it.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Fixes: def0641e2f61 ("ARM: dts: add property for maximum ADC clock frequencies")
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
---

diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 6736bae43a5b..a64bfe1a4dd9 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -461,6 +461,8 @@
 				clock-names = "adc";
 				#io-channel-cells = <1>;
 				status = "disabled";
+				fsl,adck-max-frequency = <30000000>, <40000000>,
+							<20000000>;
 			};
 
 			esdhc0: esdhc@400b1000 {
@@ -472,8 +474,6 @@
 					<&clks VF610_CLK_ESDHC0>;
 				clock-names = "ipg", "ahb", "per";
 				status = "disabled";
-				fsl,adck-max-frequency = <30000000>, <40000000>,
-							<20000000>;
 			};
 
 			esdhc1: esdhc@400b2000 {