From: Terry Lv Date: Tue, 21 Jun 2011 06:29:52 +0000 (+0800) Subject: ENGR00139235-2 MX61: Add IIM(OCOTP) driver X-Git-Tag: v3.0.35-fsl_4.1.0~2424 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=448b5e6d65e5d717ba9c2a1f76e9b2724077c653;p=karo-tx-linux.git ENGR00139235-2 MX61: Add IIM(OCOTP) driver Add OCOTP device Signed-off-by: Terry Lv --- diff --git a/arch/arm/mach-mx6/Kconfig b/arch/arm/mach-mx6/Kconfig index a9d32f472f67..2ff2d19a0c43 100644 --- a/arch/arm/mach-mx6/Kconfig +++ b/arch/arm/mach-mx6/Kconfig @@ -36,6 +36,7 @@ config MACH_MX6Q_SABREAUTO select IMX_HAVE_PLATFORM_FSL_OTG select IMX_HAVE_PLATFORM_FSL_USB_WAKEUP select IMX_HAVE_PLATFORM_AHCI + select IMX_HAVE_PLATFORM_IMX_OCOTP help Include support for i.MX 6Quad SABRE Automotive Infotainment platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.c b/arch/arm/mach-mx6/board-mx6q_sabreauto.c index b02c7110ba9e..6c09b52940ee 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabreauto.c +++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.c @@ -508,6 +508,7 @@ static void __init mx6_board_init(void) gpio_request(MX6Q_SABREAUTO_LDB_BACKLIGHT, "ldb-backlight"); gpio_direction_output(MX6Q_SABREAUTO_LDB_BACKLIGHT, 1); + imx6q_add_otp(); } extern void __iomem *twd_base; diff --git a/arch/arm/mach-mx6/devices-imx6q.h b/arch/arm/mach-mx6/devices-imx6q.h index 4623f1b85954..7f993c05b8db 100644 --- a/arch/arm/mach-mx6/devices-imx6q.h +++ b/arch/arm/mach-mx6/devices-imx6q.h @@ -99,3 +99,8 @@ extern const struct imx_ldb_data imx6q_ldb_data __initconst; extern const struct imx_vpu_data imx6q_vpu_data __initconst; #define imx6q_add_vpu() imx_add_vpu(&imx6q_vpu_data) + +extern const struct imx_otp_data imx6q_otp_data __initconst; +#define imx6q_add_otp() \ + imx_add_otp(&imx6q_otp_data); + diff --git a/arch/arm/plat-mxc/devices/platform-imx-ocotp.c b/arch/arm/plat-mxc/devices/platform-imx-ocotp.c index db60a7f1e6bb..792f3cfdb40e 100755 --- a/arch/arm/plat-mxc/devices/platform-imx-ocotp.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ocotp.c @@ -28,8 +28,9 @@ static const char *bank_reg_desc[BANKS][BANK_ITEMS] = { static const struct mxc_otp_platform_data imx50_otp_platform_data = { .fuse_name = (char **)bank_reg_desc, + .clock_name = "ahb_clk", .fuse_num = BANKS * BANK_ITEMS, - }; +}; const struct imx_otp_data imx50_otp_data = { .iobase = MX50_OCOTP_CTRL_BASE_ADDR, @@ -40,6 +41,50 @@ const struct imx_otp_data imx50_otp_data = { #undef BANK_ITEMS #endif /* ifdef CONFIG_SOC_IMX50 */ +#ifdef CONFIG_SOC_IMX6Q +#define BANK(a, b, c, d, e, f, g, h) \ + {\ + ("HW_OCOTP_"#a), ("HW_OCOTP_"#b), ("HW_OCOTP_"#c), ("HW_OCOTP_"#d), \ + ("HW_OCOTP_"#e), ("HW_OCOTP_"#f), ("HW_OCOTP_"#g), ("HW_OCOTP_"#h) \ + } + +#define BANKS (16) +#define BANK_ITEMS (8) +static const char *bank_reg_desc[BANKS][BANK_ITEMS] = { + BANK(LOCK, CFG0, CFG1, CFG2, CFG3, CFG4, CFG5, CFG6), + BANK(MEM0, MEM1, MEM2, MEM3, MEM4, ANA0, ANA1, ANA2), + BANK(OTPMK0, SOTPMK1, OTPMK2, OTPMK3, OTPMK4, OTPMK5, OTPMK6, OTPMK7), + BANK(SRK0, SRK1, SRK2, SRK3, SRK4, SRK5, SRK6, SRK7), + BANK(RESP0, HSJC_RESP1, MAC0, MAC1, HDCP_KSV0, HDCP_KSV1, GP1, GP2), + BANK(DTCP_KEY0, DTCP_KEY1, DTCP_KEY2, DTCP_KEY3, DTCP_KEY4, MISC_CONF, FIELD_RETURN, SRK_REVOKE), + BANK(HDCP_KEY0, HDCP_KEY1, HDCP_KEY2, HDCP_KEY3, HDCP_KEY4, HDCP_KEY5, HDCP_KEY6, HDCP_KEY7), + BANK(HDCP_KEY8, HDCP_KEY9, HDCP_KEY10, HDCP_KEY11, HDCP_KEY12, HDCP_KEY13, HDCP_KEY14, HDCP_KEY15), + BANK(HDCP_KEY16, HDCP_KEY17, HDCP_KEY18, HDCP_KEY19, HDCP_KEY20, HDCP_KEY21, HDCP_KEY22, HDCP_KEY23), + BANK(HDCP_KEY24, HDCP_KEY25, HDCP_KEY26, HDCP_KEY27, HDCP_KEY28, HDCP_KEY29, HDCP_KEY30, HDCP_KEY31), + BANK(HDCP_KEY32, HDCP_KEY33, HDCP_KEY34, HDCP_KEY35, HDCP_KEY36, HDCP_KEY37, HDCP_KEY38, HDCP_KEY39), + BANK(HDCP_KEY40, HDCP_KEY41, HDCP_KEY42, HDCP_KEY43, HDCP_KEY44, HDCP_KEY45, HDCP_KEY46, HDCP_KEY47), + BANK(HDCP_KEY48, HDCP_KEY49, HDCP_KEY50, HDCP_KEY51, HDCP_KEY52, HDCP_KEY53, HDCP_KEY54, HDCP_KEY55), + BANK(HDCP_KEY56, HDCP_KEY57, HDCP_KEY58, HDCP_KEY59, HDCP_KEY60, HDCP_KEY61, HDCP_KEY62, HDCP_KEY63), + BANK(HDCP_KEY64, HDCP_KEY65, HDCP_KEY66, HDCP_KEY67, HDCP_KEY68, HDCP_KEY69, HDCP_KEY70, HDCP_KEY71), + BANK(CRC0, CRC1, CRC2, CRC3, CRC4, CRC5, CRC6, CRC7), +}; + +static const struct mxc_otp_platform_data imx6q_otp_platform_data = { + .fuse_name = (char **)bank_reg_desc, + .clock_name = "ipg_clk", + .fuse_num = BANKS * BANK_ITEMS, +}; + +const struct imx_otp_data imx6q_otp_data = { + .iobase = OCOTP_BASE_ADDR, + .pdata = (struct mxc_otp_platform_data *)&imx6q_otp_platform_data, +}; +#undef BANK +#undef BANKS +#undef BANK_ITEMS +#endif /* ifdef CONFIG_SOC_IMX6Q */ + + struct platform_device *__init imx_add_otp( const struct imx_otp_data *data) {