From: Daniel Vetter Date: Tue, 29 Jul 2014 18:49:36 +0000 (+0200) Subject: Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=4dac3edfe68e5e1b3c2216b84ba160572420fa40;p=linux-beck.git Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next Pull in drm-next with Dave's DP MST support so that I can merge some conflicting patches which also touch the driver load sequencing around interrupt handling. Conflicts: drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_dp.c Signed-off-by: Daniel Vetter --- 4dac3edfe68e5e1b3c2216b84ba160572420fa40 diff --cc drivers/gpu/drm/i915/i915_drv.c index 387279602fd9,2a83833207b1..6c4b25ce8bb0 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@@ -520,22 -516,24 +520,23 @@@ static int i915_drm_freeze(struct drm_d return error; } - flush_delayed_work(&dev_priv->rps.delayed_resume_work); - - intel_runtime_pm_disable_interrupts(dev); - dev_priv->enable_hotplug_processing = false; - - intel_suspend_gt_powersave(dev); - /* * Disable CRTCs directly since we want to preserve sw state - * for _thaw. + * for _thaw. Also, power gate the CRTC power wells. */ drm_modeset_lock_all(dev); - for_each_crtc(dev, crtc) { - dev_priv->display.crtc_disable(crtc); - } + for_each_crtc(dev, crtc) + intel_crtc_control(crtc, false); drm_modeset_unlock_all(dev); + intel_dp_mst_suspend(dev); + + flush_delayed_work(&dev_priv->rps.delayed_resume_work); + + intel_runtime_pm_disable_interrupts(dev); + + intel_suspend_gt_powersave(dev); + intel_modeset_suspend_hw(dev); } diff --cc drivers/gpu/drm/i915/intel_dp.c index 9274ddfd78c7,e7a7953da6d1..0f05b88a75e3 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@@ -3620,7 -3679,10 +3718,8 @@@ intel_dp_detect(struct drm_connector *c enum drm_connector_status status; enum intel_display_power_domain power_domain; struct edid *edid = NULL; + bool ret; - intel_runtime_pm_get(dev_priv); - power_domain = intel_display_port_power_domain(intel_encoder); intel_display_power_get(dev_priv, power_domain); diff --cc drivers/gpu/drm/i915/intel_drv.h index bb9042bde7dd,1dfd1e518551..b2837c5fccfc --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@@ -880,12 -901,18 +914,21 @@@ void intel_edp_panel_off(struct intel_d void intel_edp_psr_enable(struct intel_dp *intel_dp); void intel_edp_psr_disable(struct intel_dp *intel_dp); void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate); -void intel_edp_psr_exit(struct drm_device *dev); +void intel_edp_psr_invalidate(struct drm_device *dev, + unsigned frontbuffer_bits); +void intel_edp_psr_flush(struct drm_device *dev, + unsigned frontbuffer_bits); void intel_edp_psr_init(struct drm_device *dev); + int intel_dp_handle_hpd_irq(struct intel_digital_port *digport, bool long_hpd); + void intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector); + void intel_dp_mst_suspend(struct drm_device *dev); + void intel_dp_mst_resume(struct drm_device *dev); + int intel_dp_max_link_bw(struct intel_dp *intel_dp); + void intel_dp_hot_plug(struct intel_encoder *intel_encoder); + /* intel_dp_mst.c */ + int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id); + void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); /* intel_dsi.c */ void intel_dsi_init(struct drm_device *dev);