From: Will Deacon Date: Thu, 8 Jul 2010 09:58:06 +0000 (+0100) Subject: ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless X-Git-Tag: v2.6.34.2~89 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=4ed7b05dfcc8cffdc34091b06455fd03f3932a6b;p=karo-tx-linux.git ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless commit 068de8d1be48a04b92fd97f76bb7e113b7be82a8 upstream. The atomic64_add_unless function compares an atomic variable with a given value and, if they are not equal, adds another given value to the atomic variable. The function returns zero if the addition did not occur and non-zero otherwise. On ARM, the return value is initialised to 1 in C code. Inline assembly code then performs the atomic64_add_unless operation, setting the return value to 0 iff the addition does not occur. This means that when the addition *does* occur, the value of ret must be preserved across the inline assembly and therefore requires a "+r" constraint rather than the current one of "=&r". Thanks to Nicolas Pitre for helping to spot this. Reviewed-by: Nicolas Pitre Signed-off-by: Will Deacon Signed-off-by: Russell King Signed-off-by: Greg Kroah-Hartman --- diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h index e8ddec2cb158..363c99ec0230 100644 --- a/arch/arm/include/asm/atomic.h +++ b/arch/arm/include/asm/atomic.h @@ -440,7 +440,7 @@ static inline int atomic64_add_unless(atomic64_t *v, u64 a, u64 u) " teq %2, #0\n" " bne 1b\n" "2:" - : "=&r" (val), "=&r" (ret), "=&r" (tmp) + : "=&r" (val), "+r" (ret), "=&r" (tmp) : "r" (&v->counter), "r" (u), "r" (a) : "cc");