From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Sat, 7 Aug 2010 10:01:36 +0000 (+0100)
Subject: drm/i915/edp: Flush the write before waiting for PLLs
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=5ddb954b9ee50824977d2931e0ff58b3050b337d;p=linux-beck.git

drm/i915/edp: Flush the write before waiting for PLLs

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
---

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0bf683dd512c..2a32a7b60c96 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1665,6 +1665,7 @@ static void ironlake_enable_pll_edp (struct drm_crtc *crtc)
 	dpa_ctl = I915_READ(DP_A);
 	dpa_ctl |= DP_PLL_ENABLE;
 	I915_WRITE(DP_A, dpa_ctl);
+	POSTING_READ(DP_A);
 	udelay(200);
 }