From: Stefan Roese Date: Thu, 27 Sep 2007 11:48:24 +0000 (+0200) Subject: Merge branch 'master' of /home/stefan/git/u-boot/lwmon5 X-Git-Tag: v1.3.0-rc3~18 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=636538c520ed118e5e50f592250232a5f943fb84;hp=04625764cc93ce8a61625ac19d7fe2a2ceee8143;p=karo-tx-uboot.git Merge branch 'master' of /home/stefan/git/u-boot/lwmon5 --- diff --git a/CHANGELOG b/CHANGELOG index 2749d69c71..82b3145357 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,908 @@ +commit 135e19bc2773ebca487e9a8371f67e1ba202313a +Author: Wolfgang Denk +Date: Tue Sep 18 21:36:35 2007 +0200 + + Avoid compiler warning. + + Signed-off-by: Wolfgang Denk + +commit 8a783a65851bc7421ab69f442261215e21b8891a +Author: Grant Likely +Date: Tue Sep 18 12:24:57 2007 -0600 + + Bugfix: remove embedded null (\0) from CFG_BOOTFILE macro in TQM8540_config + + /bin/bash and /bin/dash (which /bin/sh is linked to on ubuntu) handle embedded + nulls in a string differently. For example, the following statement: + echo "this is a string\0" > afile + Will produce the following with /bin/bash: + "this is a string\0" + But with /bin/dash, will produce: + "this is a string + + Bug fixed by moving the embedded null out of the makefile and into the + config header. Also renamed the macro to avoid usage colision with the same + macro used by other board ports. + + Signed-off-by: Grant Likely + +commit f8d3ca7b6fa322ac57e8e831f07dbeea039a9f35 +Author: Wolfgang Denk +Date: Tue Sep 18 17:40:27 2007 +0200 + + MCC200: fix build warning + + The MCC200 board config file includes version.h for some customer- + specific setting, which causes warnings with "make depend"; build + version.h before depend. + + Signed-off-by: Wolfgang Denk + +commit 67c31036acaaaa992fc346cc89db0909a7e733c4 +Author: Wolfgang Denk +Date: Sun Sep 16 17:10:04 2007 +0200 + + TQM8xx[LM]: Fix broken environment alignment. + + With recent toolchains, the environment sectors were no longer aligned to + sector boundaries. The reason was a combination of two bugs: + + 1) common/environment.c assumed that CONFIG_TQM8xxL would be defined + for all TQM8xxL and TQM8xxM boards. But "include/common.h", where + this gets defined, is not included here (and cannot be included + without causing lots of problems). + + Added a new #define CFG_USE_PPCENV for all boards which really + want to put the environment is a ".ppcenv" section. + + 2) The linker scripts just include environment.o, silently assuming + that the objects in that file are really in the order in which + they are coded in the C file, i. e. "environment" first, then + "redundand_environment", and "env_size" last. However, current + toolchains (GCC-4.x) reorder the objects, causing the environment + data not to start on a flash sector boundary: + + Instead of: we got: + + 40008000 T environment 40008000 T env_size + 4000c000 T redundand_environment 40008004 T redundand_environment + 40010000 T env_size 4000c004 T environment + + Note: this patch fixes just the first part, and cures the alignment + problem by making sure that "env_size" gets placed correctly. However, + we still have a potential issue because primary and redundant + environment sectors are actually swapped, i. e. we have now: + + 40008000 T redundand_environment + 4000c000 T environment + 40010000 T env_size + + This shall be fixed in the next version. + + Signed-off-by: Wolfgang Denk + +commit eb6da8050797c204c9d010548424186c7ce32fc1 +Author: Wolfgang Denk +Date: Sun Sep 16 02:39:35 2007 +0200 + + TQM8xx/FPS8xx: adjust flash partitions for 2.6 ARCH=powerpc kernels + + Signed-off-by: Wolfgang Denk + +commit cd2d1602c54cc6957bdef3872272a4b264893960 +Author: urwithsughosh@gmail.com +Date: Mon Sep 10 14:54:56 2007 -0400 + + Typo fix in tsec.c + + Fixup for the break statement in wrong place. + + [Patch by urwithsughosh@gmail.com] + Acked-by: Andy Fleming + Signed-off-by: Wolfgang Denk + +commit 5bd7fe9aeb76906371f40b8fd07613f10922e3e7 +Author: Matthias Fuchs +Date: Tue Sep 11 17:04:00 2007 +0200 + + Fix do_div() usage in nand process output + + Fix usage of do_div() in nand erase|read|write process output. + + The last patch to nand_util.c introduced do_div() instead of libgcc's + implementation. But do_div() returns the quotient in its first + macro parameter and not as result. + + Signed-off-by: Matthias Fuchs + +commit c750d2e6692a000a82f29de7bf24e3dc21239161 +Author: Matthias Fuchs +Date: Wed Sep 12 12:36:53 2007 +0200 + + NAND: Add CFG_NAND_QUIET option + + This config option sets the default for the progress information + output behavior that can also be configured through the 'quiet' + environment variable. + + The legacy NAND code does not print the current progress info + on the console. So this option is for backward compatibility for + units that are in the field and where setting the quiet variable + is not an option. With CFG_NAND_QUIET set to '1' the console + progress info is turned off. This can still be overwritten + through the environment variable. + + Signed-off-by: Matthias Fuchs + +commit dcb88630290d2bcd803386dd4c2be73142994c4f +Author: Liew Tsi Chung-r5aahp +Date: Thu Sep 13 16:06:05 2007 -0700 + + ColdFire: fix build error becasue of bad type of mii_init() + + Signed-off-by: TsiChungLiew + +commit 314d5b6ce52a4ed19dd295d1364e246c5e605017 +Author: Liew Tsi Chung-r5aahp +Date: Thu Sep 13 16:04:05 2007 -0700 + + ColdFire: Fix build error caused by pixis.c + + Moved the #include inside the #ifdef CONFIG_FSL_PIXIS. + + Signed-off-by: TsiChungLiew + +commit e21659e30660a1377c42af135a6114efe39801d9 +Author: Sam Sparks +Date: Fri Sep 14 11:14:42 2007 -0600 + + Update MPC8349ITX*_config to place config.tmp in right place. + + MPC834ITX*_config does not store config.tmp at the correct locatation, + causing MPC8349ITXGP to have the wrong TEXT_BASE. + + Signed-off-by: Sam Sparks + Signed-off-by: Grant Likely + +commit 1218abf1b5817a39a82399b4b928b00750575bda +Author: Wolfgang Denk +Date: Sat Sep 15 20:48:41 2007 +0200 + + Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as global + + Signed-off-by: Wolfgang Denk + +commit 66b3f24d665be678a9dbb125b1e84185400f63b5 +Author: Dirk Behme +Date: Sat Sep 15 11:55:42 2007 +0200 + + Make DECLARE_GLOBAL_DATA_PTR global for DaVinci + + As discussed in [1], DECLARE_GLOBAL_DATA_PTR has to be global and not + function local. + + Signed-off-by: Dirk Behme + + [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/31805 + +commit 6e7b7b6ea1b6d04dbe96242eb6a0c1c664c98e8c +Author: Bartlomiej Sieka +Date: Thu Sep 13 18:21:48 2007 +0200 + + cm5200: Fix a typo introduced by afaac86fe2948ac84cd9a12bbed883b3c683e7d9 + + Signed-off-by: Marian Balakowicz + +commit f34024d4a328e6edd906456da98d2c537155c4f7 +Author: Wolfgang Denk +Date: Wed Sep 12 00:48:57 2007 +0200 + + Fix memory corruption problem on STX GP3 SSA Board. + + Signed-off-by: Wolfgang Denk + +commit 38ad82da0c1180ecdeb212a8f4245e945bcc546e +Author: Grzegorz Bernacki +Date: Tue Sep 11 15:42:11 2007 +0200 + + [GP3SSA] Add define CONFIG_MPC85XX_PCI2 in config file to allow u-boot to + scan on second pci bus. + + Signed-off-by: Grzegorz Bernacki + +commit 6c2f4f388e8181655ea8b69343ea00b68aa6e8d0 +Author: Grzegorz Bernacki +Date: Tue Sep 11 12:57:52 2007 +0200 + + [ppc4xx] Individual handling of sdram.c for bamboo_nand build + + Bamboo has a file sdram.c which needs special treatment when building in + separate directory. It has to be linked to build directory otherwise it is + not seen. + + Signed-off-by: Grzegorz Bernacki + +commit 38c1ef728d19950414a8ab1ccfc53767848fa346 +Author: Sean MCGOOGAN +Date: Mon Sep 10 16:55:59 2007 +0100 + + Allocate CPU Architecture Code for STMicroelectronics' ST200. + + Signed-off-by: Sean McGoogan + --------------------------------------------------- + +commit 754bac48156f8958d8f6a53a51eda88ab5758929 +Author: Wolfgang Denk +Date: Mon Sep 10 20:42:31 2007 +0200 + + Update version to match current state. + + Signed-off-by: Wolfgang Denk + +commit 7a888d6b3c32a126dbb504ef146bb4c26574ca7b +Author: Grzegorz Bernacki +Date: Mon Sep 10 17:39:08 2007 +0200 + + [MPC512x] Streamline frame handling in the FEC driver + + - convert frame size settings to be derived from a single base + - set frame size to the recommended default value + + Signed-off-by: Grzegorz Bernacki + +commit e251e00d0db4b36d1d2b7e38fec43a7296b529a2 +Author: Kyungmin Park +Date: Mon Sep 10 11:34:00 2007 +0900 + + Remove compiler warning: target CPU does not support interworking + + Signed-off-by: Kyungmin Park + +commit 1d9e31e04911a6bb7cc66dd91132c699101c32e2 +Author: Wolfgang Denk +Date: Sun Sep 9 21:21:33 2007 +0200 + + Fix compile error in spc1920 config. + + Signed-off-by: Markus Klotzbücher + Signed-off-by: Wolfgang Denk + +commit a7d7eca791a37f452c9da10fef4b31dd7aa9a622 +Author: Grant Likely +Date: Fri Sep 7 09:25:07 2007 -0600 + + Bugfix: make bootm+libfdt compile on boards with no flash + + Signed-off-by: Grant Likely + +commit 6efc1fc0b63e55f94c5bc61d8dd23c918e3bc778 +Author: Grzegorz Bernacki +Date: Fri Sep 7 18:35:37 2007 +0200 + + [PPC440SPe] PCIe environment settings for Katmai and Yucca + + - 'pciconfighost' is set by default in order to be able to scan bridges + behind the primary host/PCIe + + - 'pciscandelay' env variable is recognized to allow for user-controlled + delay before the PCIe bus enumeration; some peripheral devices require a + significant delay before they can be scanned (e.g. LSI8408E); without the + delay they are not detected + + Signed-off-by: Grzegorz Bernacki + +commit 7f1913938984ef6c6a46cb53e003719196d9c5de +Author: Grzegorz Bernacki +Date: Fri Sep 7 18:20:23 2007 +0200 + + [PPC440SPe] Improve PCIe configuration space access + + - correct configuration space mapping + - correct bus numbering + - better access to config space + + Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the + first device on the first bus. We now allow to configure up to 16 buses; + also, scanning for devices behind the PCIe-PCIe bridge is supported, so + peripheral devices farther in hierarchy can be identified. + + Signed-off-by: Grzegorz Bernacki + +commit 15ee4734e4e08003d73d9ead3ca80e2a0672e427 +Author: Grzegorz Bernacki +Date: Fri Sep 7 17:46:18 2007 +0200 + + [PPC440SPe] Convert machine check exceptions handling + + Convert using fixup mechanism to suppressing MCK for the duration of config + read/write transaction: while fixups work fine with the case of a precise + exception, we identified a major drawback with this approach when there's + an imprecise case. In this scenario there is the following race condition: + the fixup is (by design) set to catch the instruction following the one + actually causing the exception; if an interrupt (e.g. decrementer) happens + between those two instructions, the ISR code is executed before the fixup + handler the machine check is no longer protected by the fixup handler as it + appears as within the ISR code. In consequence the fixup approach is being + phased out and replaced with explicit suppressing of MCK during a PCIe + config read/write cycle. + + Signed-off-by: Grzegorz Bernacki + +commit ff7640c9ead8806b5d827f2b29f9cb2632add729 +Author: Wolfgang Denk +Date: Fri Sep 7 17:43:36 2007 +0200 + + Fix typo in MAKEALL script. + + Signed-off-by: Wolfgang Denk + +commit 08e2e5fcd2e06670b62e1680a3934c0e55c72810 +Author: Grzegorz Bernacki +Date: Fri Sep 7 17:09:21 2007 +0200 + + [MPC512x] Proper handling of larger frames in the FEC driver + + When frame larger than local RX buffer is received, it is split and handled + by two buffer descriptors. Prior to this patch the FEC driver discarded + contents of a buffer descriptor without the 'LAST' bit set, so the first + part of the frame was lost in case of larger frames. This fix allows to + safely combine the two pieces into the whole frame. + + Signed-off-by: Grzegorz Bernacki + +commit 8d17979d0359492a822a0a409d26e3a3549b4cd4 +Author: Rafal Jaworowski +Date: Fri Sep 7 17:05:36 2007 +0200 + + [MPC512x] Correct fixup relocation + + Signed-off-by: Rafal Jaworowski + +commit a89cbbd27a60e6740772000fd0688ffba1c2576a +Author: Wolfgang Denk +Date: Fri Sep 7 01:21:25 2007 +0200 + + Update CHANGELOG, minor coding style cleanup. + +commit 5e5803e119de3bebd76fc9a57baac0b5aeccc8a3 +Author: stefano babic +Date: Thu Aug 30 23:01:49 2007 +0200 + + PXA270: Added support for TrizepsIV board. + + This patch add support for the Trizeps IV module (520Mhz). + + Signed-off-by: Stefano Babic + +commit 80172c6181c912fbb34ea3ba0c22b232b419b47f +Author: stefano babic +Date: Thu Aug 30 22:57:04 2007 +0200 + + PXA270: Add support for multiple serial ports. + + This patch adds support for multiple serial ports to the PXA target. + FFUART, BTUART and STUART are supported. + + Signed-off-by: Stefano Babic + +commit 28bb3f72c687ac6b2eb076b01dd21a5fd657d45e +Author: stefano babic +Date: Thu Aug 30 22:48:47 2007 +0200 + + PXA270: fix compile issue (invalid lvalue) + + Code is broken for PXA270 due to "invalid lvalue in assignment". + + This patch fix it in pxa-regs.h + + Signed-off-by: Stefano Babic + +commit 1d2ca446e1a731df420206d04fe278c27ea6b8e8 +Author: Jason Jin +Date: Thu Aug 30 18:19:05 2007 +0800 + + Add BUILD_DIR support for bios emulator. + + Signed-off-by: Jason Jin + +commit b4d8a55145442f136982634862341a3e02002bda +Author: Shinya Kuribayashi +Date: Fri Aug 31 14:41:51 2007 +0900 + + [MIPS] Remove inline asm string functions + + Stop using inline string functions on MIPS as other ARCHs do so, + since the optimized inline asm versions are not small. + + This change is triggered by a following MIPS build error: + common/libcommon.a(exports.o)(.text+0xdc): In function `jumptable_init': + common/exports.c:32: undefined reference to `strcmp' + make: *** [u-boot] Error 1 + + Signed-off-by: Shinya Kuribayashi + +commit 8ea2c4e54833deaebc24c3ca6b7f21353c25b0f5 +Author: Shinya Kuribayashi +Date: Fri Aug 31 14:41:45 2007 +0900 + + [MIPS] Update asm string header + + This patches contains several bugfixes and cleanups in the latest upstream: + + - Don't include linux/config.h + - Remove buggy inline version of memscan. + - Merge with Linux 2.6.11-rc3. + - Fix undefined reference to strcpy in binfmt_misc caused by gcc 3.4. + - Goodbye mips64. 31704 lines of code bite the dust. + - Replace extern inline with static inline. + - Fix return value of strncpy. + - Remove a bunch more "$1" clobbers. + + Signed-off-by: Shinya Kuribayashi + +commit 5b729fb3bd98f49855d6bfc657c3fbae95f2adc2 +Author: Bartlomiej Sieka +Date: Tue Sep 4 17:31:22 2007 +0200 + + Fix do_bootm_linux() so that multi-file images with FDT blob boot. + + Fix incorrect blob address calculation in do_bootm_linux() that prevents + booting the kernel from a multi-file image (kernel + initrd + blob). + + Also, make minor updates to the U-Boot's output and to the coding style. + + Signed-off-by: Bartlomiej Sieka + +commit 041a2554ad619e80dce520c1a33210affcb6a3f2 +Author: Gary Jennejohn +Date: Fri Aug 31 14:29:04 2007 +0200 + + Add support for Sil680 IDE controller. + + o add drivers/sil680.c to support the Sil680 IDE-controller. + o drivers/Makefile: add sil680.o. + + Signed-off-by: Gary Jennejohn + +commit e79021223bc339df655e360645a52c457a74b067 +Author: Grant Likely +Date: Thu Sep 6 09:47:40 2007 -0600 + + bootm/fdt: Only process the fdt if an fdt address was provided + + Boards with CONFIG_OF_LIBFDT enabled are not able to boot old-style + kernels using the board info structure (instead of passing a device tree) + This change allows the old style booting to be used if the fdt argument + was not passed to 'bootm'. + + Signed-off-by: Grant Likely + Acked-by: Kim Phillips + +commit cf2817a84c2e9bea2c5dfc084bce2f2d2563ac43 +Author: Grant Likely +Date: Thu Sep 6 09:46:23 2007 -0600 + + Migrate 5xxx boards from CONFIG_OF_FLAT_TREE to CONFIG_OF_LIBFDT + + Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200 + + Tested on: lite5200b + + Note: the fixup functions have not been moved to a common place. This + patch is targeted for immediate merging as in solves a build issue, but + the final name/location of the fixups is still subject to debate. I + propose to merge this now, and move the fixups in the next merge window + to be usable by all targets. + + Signed-off-by: Grant Likely + +commit 41bb76e941929f54a73206fb132f7a4c275543a3 +Author: Grant Likely +Date: Thu Sep 6 09:46:17 2007 -0600 + + libfdt: add convenience function fdt_find_and_setprop() + + Given the path to a node, fdt_find_and_setprop() allows a property value + to be set directly. + + Signed-off-by: Grant Likely + +commit 56a9270521baaa00e12639a978302a67f61ef060 +Author: Kumar Gala +Date: Thu Aug 30 16:18:18 2007 -0500 + + Fix ULI RTC support on MPC8544 DS + + The RTC on the M1575 ULI chipset requires a dummy read before + we are able to talk to the RTC. We accomplish this by adding a + second memory region to the PHB the ULI is on and read from it. + + The second region is added to maintain compatiabilty with Linux's + view of the PCI memory map. + + Signed-off-by: Kumar Gala + +commit f75e89e9b5714db2b0e80074071dfbdd6f59488a +Author: Ed Swarthout +Date: Thu Aug 30 01:58:48 2007 -0500 + + ft_board_setup update 85xx/86xx of pci/pcie bus-range property. + + pcie is now differentiated from pci. Add 8641 bus-range updates. + + Signed-off-by: Ed Swarthout + +commit 81b73dec16fd1227369a191e725e10044a9d56b8 +Author: Gary Jennejohn +Date: Fri Aug 31 15:21:46 2007 +0200 + + ppc4xx: (Re-)Enable CONFIG_PCI_PNP on AMCC 440EPx Sequoia + + The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is + set to non-zero, because it doesn't support MRM (memory-read- + multiple) correctly. We now added the possibility to configure + this register in the board config file, so that the default value + of 8 can be overridden. + + Here the details of this patch: + + o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow + board-specific settings. As an example the sequoia board requires 0. + Idea from Stefan Roese . + o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the + PCI IO-space. Obtained from Stefan Roese . + o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set + CFG_PCI_CACHE_LINE_SIZE to 0. + + Signed-off-by: Gary Jennejohn + Signed-off-by: Stefan Roese + +commit 60174746c668b309378a91488dded898e9553eae +Author: Wolfgang Denk +Date: Fri Aug 31 10:01:51 2007 +0200 + + Fix TFTP OACK code for short packets. + + The old code had a loop limit overflow bug which caused a semi- + infinite loop for small packets, because in "i + +commit ff13ac8c7bbebb238e339592de765c546dba1073 +Author: Wolfgang Denk +Date: Thu Aug 30 14:42:15 2007 +0200 + + Backout commit 8f1bc284 as it causes TFTP to fail. + + Signed-off-by: Wolfgang Denk + +commit 1900fbf255acba8b94fb442a16408ea85a1d46a6 +Author: Ed Swarthout +Date: Thu Aug 30 02:26:17 2007 -0500 + + Revert "Fix MPC8544DS PCIe3 scsi." + + This reverts commit 9468e680. + Commit 16e23c3f5da removing allocation of PCSRBAR is sufficient. + + Signed-off-by: Ed Swarthout + +commit 8f1bc28408ded213418d9bc0780c7d8fb8a03774 +Author: Grant Likely +Date: Wed Aug 29 18:26:24 2007 -0600 + + tftp: don't implicity trust the format of recevied packets + + The TFTP OACK code trusts that the incoming packet is formated as + ASCII text and can be processed by string functions. It also has a + loop limit overflow bug where if the packet length is less than 8, it + ends up looping over *all* of memory to find the 'blksize' string. + + This patch solves the problem by forcing the packet to be null + terminated and using strstr() to search for the sub string. + + Signed-off-by: Grant Likely + +commit 2602a5c40ae37ab965a4e240854fdaffb51328a4 +Author: Kim Phillips +Date: Wed Aug 29 09:06:05 2007 -0500 + + sbc8641: remove unused OF_FLAT_TREE_MAX_SIZE + + this had slipped through the cracks, since the sbc board was added + after I wrote the original patch to remove all these symbols, and + before it was merged. + + Signed-off-by: Kim Phillips + +commit c5bded3c88e48ae648a75d357dc81a8255fa81f1 +Author: Wolfgang Denk +Date: Wed Aug 29 14:05:30 2007 +0200 + + Add mii_init() prototype + + to get rid of a *lot* of compiler warnings. + + Signed-off-by: Wolfgang Denk + +commit 2d1f23aa1e74e4a8f8ffa67f246eb98c522dfd7f +Author: Wolfgang Denk +Date: Wed Aug 29 13:35:03 2007 +0200 + + Disable network support on cmi_mpc5xx board + + ..because it caused compiler errors and there seems to be no + board maintainer to take care of this. + + Signed-off-by: Wolfgang Denk + +commit 9468e6804b7e25b0f6f52e53f47bce3175400a16 +Author: Kumar Gala +Date: Mon Aug 20 09:44:00 2007 -0500 + + Fix MPC8544DS PCIe3 scsi. + + + + The problem is pciauto_setup_device() getting called from fsl_pci_init.c + is allocating memory space it doesn't need. + + Signed-off-by: Ed Swarthout + Signed-off-by: Andy Fleming + +commit 4bf4abb8a4e9955556b120a1aafa30c03e74032a +Author: Ed Swarthout +Date: Tue Aug 21 09:38:59 2007 -0500 + + 8548cds fixes + + Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the + correct consoledev needed for linux boot. + Standardize on fdt{file,addr} var to hold dtb file name. + + Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}. + + Signed-off-by: Ed Swarthout + +commit 7a1ac419fa0d2d23ddd08bd61d16896a9f33c933 +Author: Haiying Wang +Date: Thu Aug 23 15:20:54 2007 -0400 + + Enable L2 cache for MPC8568MDS board + + The L2 cache size is 512KB for 8568, print out the correct informaiton. + + Signed-off-by: Haiying Wang + +commit 94c47fdaf14cb29fa3fb4d4da2efdd96c803b46b +Author: Jason Jin +Date: Wed Aug 22 17:54:49 2007 +0800 + + Remove the bios emulator binary files from MAI board + + Signed-off-by: Jason Jin + +commit 7608d75f9c87c9eb5b3a43219d0506d3e979a13f +Author: Kim Phillips +Date: Tue Aug 21 17:00:17 2007 -0500 + + support board vendor-common makefiles + + if a board/$(VENDOR)/common/Makefile exists, build it. + + also add the first such case, board/freescale/common/Makefile, to + handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as + dictated by board configuration. + + thusly get rid of alternate build dir errors such as: + + FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory + + by putting the common/ mkdir command in its proper place (the common + Makefile). Common bits from existing individual board Makefiles have + been removed. + + Signed-off-by: Kim Phillips + +commit ef8f20752712dc1cdbd86f47e3bd6e35f81c83fd +Author: stefano babic +Date: Tue Aug 21 15:52:33 2007 +0200 + + Fix: TFTP is not working on little endian systems + + TFTP does not work anymore after multicast tftp + patch was applied on little endian systems. + This patch fix it. + + Signed-off-by: Stefano Babic + +commit 5f470948570526e9186f053a3003da7719604e90 +Author: stefano babic +Date: Tue Aug 21 15:50:33 2007 +0200 + + Fix MAC address setting in DM9000 driver. + + The logic to check if there is a correct MAC address in the DM9000 + EEPROM, added in the last patch, is wrong. Now the MAC address is + always taken from the environment, even if a suitable MAC is present + in the EEPROM. + + Signed-off-by: Stefano Babic + +commit 4a8527ef086ec7c89f40674ef024ae6f988a614a +Author: Martin Krause +Date: Tue Aug 21 12:40:34 2007 +0200 + + MPC5xxx: fix some compiler warnings in USB code + + Fix the following warnings: + - usb.c:xx: warning: function declaration isn't a prototype + - usb_ohci.c:xxx: warning: passing argument 1 of '__fswab32' makes integer + from pointer wihtout a cast + + Signed-off-by: Martin Krause + +commit 16e23c3f5dab6937f5109365416808c7f15c122b +Author: Ed Swarthout +Date: Mon Aug 20 23:55:33 2007 -0500 + + fsl_pci_init - Remove self PCSRBAR allocation + + CPU physical address space was being wasted by allocating a + PCSRBAR PCI inbound region to it's memory space. + + As a rule, PCSRBAR should be left alone since it does not affect + transactions from self and other masters may have changed it. + + Signed-off-by: Ed Swarthout + +commit 0e700ce03a23bb1921149bc77008ace7103d5289 +Author: Martin Krause +Date: Mon Aug 20 13:56:47 2007 +0200 + + Fix compiler warning in include/s3c2410.h + + This patch fixes the "type qualifiers ignored on fuction return tpye" + warning for include/s3c2410.h + + Signed-off-by: Martin Krause + +commit 9bb8b209ed2058a5756ecbeb544c067e44a42aea +Author: Dirk Behme +Date: Mon Aug 20 07:09:05 2007 +0200 + + Fix compilation error for omap2420h4_config. + + omap2420h4 switched to cfi, so remove old (already disabled) flash.c + and flash_probe() calls in env_flash.c. + + Signed-off-by: Dirk Behme + +commit 3bb342fc85d79dbb6b8c2039e7cdcddc82b8d90f +Author: Kim Phillips +Date: Fri Aug 10 14:34:14 2007 -0500 + + fdt: remove unused OF_FLAT_TREE_MAX_SIZE references + + and make some minor corrections to the FDT part of the README. + + Signed-off-by: Kim Phillips + +commit 6af2eeb1e99c2dcc584d4c5ab7fcae30a325f4de +Author: Wolfgang Denk +Date: Wed Aug 29 01:32:05 2007 +0200 + + Minor coding style cleanup. + + Signed-off-by: Wolfgang Denk + +commit a861558c65f65f1cf1302f3a35e9db7686b9e1a3 +Author: Heiko Schocher +Date: Tue Aug 28 17:40:33 2007 +0200 + + [UC101] Fix: if no CF in the board, U-Boot resets sometimes. + + Signed-off-by: Heiko Schocher + +commit f98984cb194bb34dbe1db9429d3b51133af30d07 +Author: Heiko Schocher +Date: Tue Aug 28 17:39:14 2007 +0200 + + IDE: - make ide_inb () and ide_outb () "weak", so boards can + define there own I/O functions. + (Needed for the pcs440ep board). + - The default I/O Functions are again 8 Bit accesses. + - Added CONFIG_CMD_IDE for the pcs440ep Board. + + Signed-off-by: Heiko Schocher + +commit 9c02defc29b57945b600714cf61ddfd02b02fb14 +Author: Yuri Tikhonov +Date: Sat Aug 25 05:07:16 2007 +0200 + + POST: limit memory test area to not touch global data anymore + + As experienced on lwmon5, on some boards the POST memory test can + corrupt the global data buffer (bd). This patch fixes this issue + by checking and limiting this area. + + Signed-off-by: Yuri Tikhonov + Signed-off-by: Stefan Roese + +commit 75e1a84d483e36be10e206e539b028c4889e1158 +Author: Stefan Roese +Date: Fri Aug 24 15:41:42 2007 +0200 + + ppc4xx: Add RTC POST test to lwmon5 board configuration + + Since this RTC POST test is taking quite a while to complete + it's only initiated upon special keypress same as the complete + memory POST. + + Signed-off-by: Stefan Roese + +commit d7bfa620037a6d2210159387571bdf93aa32c162 +Author: Stefan Roese +Date: Fri Aug 24 15:19:10 2007 +0200 + + ppc4xx: Change GPIO signal for watchdog triggering on lwmon5 + + Signed-off-by: Stefan Roese + +commit c25dd8fc25e9ca3695db996a257d9ba4dab414db +Author: Stefan Roese +Date: Thu Aug 23 11:02:37 2007 +0200 + + ppc4xx: Add support for 2nd I2C EEPROM on lwmon5 board + + This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5 + board. Now the "eeprom" command can be used to read/write from/to this + device. Additionally a new command was added "eepromwp" to en-/disable + the write-protect of this 2nd EEPROM. + + The 1st EEPROM is not affected by this write-protect command. + + Signed-off-by: Stefan Roese + +commit c64fb30e4c5976007d56fc1789c7a0666082b536 +Author: Stefan Roese +Date: Wed Aug 22 08:56:09 2007 +0200 + + ppc4xx: Remove unused option CFG_INIT_RAM_OCM + + Signed-off-by: Stefan Roese + +commit 3ad63878737a5a2b1e60825bf0a7d601d7a695e7 +Author: Stefan Roese +Date: Tue Aug 21 16:27:57 2007 +0200 + + ppc4xx: Add matrix kbd support to lwmon5 board (440EPx based) + + This patch adds support for the matrix keyboard on the lwmon5 board. + Since the implementation in the dsPCI is kind of compatible with the + "old" lwmon board, most of the code is copied from the lwmon + board directory. + + Signed-off-by: Stefan Roese + +commit 3e66c078003607a7d1d214c15a5f262bc1b4032f +Author: Wolfgang Denk +Date: Sun Aug 19 10:27:34 2007 +0200 + + Fix some build errors. + + Signed-off-by: Wolfgang Denk + +commit 05675735ef77dc23b5e0eb782bad1ff477b55e86 +Author: Wolfgang Denk +Date: Sat Aug 18 22:00:38 2007 +0200 + + Update CHANGELOG. + commit 79f240f7ecc0506b43ac50d1ea405ff6540d4d57 Author: Kim Phillips Date: Thu Aug 16 22:52:39 2007 -0500 diff --git a/MAKEALL b/MAKEALL index 68bb1ad6bc..2597d1fa35 100755 --- a/MAKEALL +++ b/MAKEALL @@ -341,7 +341,7 @@ LIST_85xx=" \ LIST_86xx=" \ MPC8641HPCN \ - SBC8641D \ + sbc8641d \ " ######################################################################### diff --git a/Makefile b/Makefile index 2e15ceaf03..8d500f5349 100644 --- a/Makefile +++ b/Makefile @@ -22,9 +22,9 @@ # VERSION = 1 -PATCHLEVEL = 2 +PATCHLEVEL = 3 SUBLEVEL = 0 -EXTRAVERSION = +EXTRAVERSION = -rc2 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) VERSION_FILE = $(obj)include/version_autogenerated.h @@ -190,6 +190,8 @@ endif OBJS := $(addprefix $(obj),$(OBJS)) LIBS = lib_generic/libgeneric.a +LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \ + "board/$(VENDOR)/common/lib$(VENDOR).a"; fi) LIBS += board/$(BOARDDIR)/lib$(BOARD).a LIBS += cpu/$(CPU)/lib$(CPU).a ifdef SOC @@ -317,7 +319,7 @@ updater: env: $(MAKE) -C tools/env all || exit 1 -depend dep: +depend dep: version for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done tags ctags: @@ -1792,13 +1794,13 @@ MPC8349ITX_config \ MPC8349ITX_LOWBOOT_config \ MPC8349ITXGP_config: unconfig @mkdir -p $(obj)include - @mkdir -p $(obj)board/mpc8349itx + @mkdir -p $(obj)board/freescale/mpc8349itx @echo "#define CONFIG_$(subst _LOWBOOT,,$(@:_config=))" >> $(obj)include/config.h @if [ "$(findstring GP,$@)" ] ; then \ - echo "TEXT_BASE = 0xFE000000" >$(obj)board/mpc8349itx/config.tmp ; \ + echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \ fi @if [ "$(findstring LOWBOOT,$@)" ] ; then \ - echo "TEXT_BASE = 0xFE000000" >$(obj)board/mpc8349itx/config.tmp ; \ + echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \ fi @$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX ppc mpc83xx mpc8349itx freescale @@ -1959,7 +1961,7 @@ TQM8560_config: unconfig echo "#define CONFIG_TQM$${CTYPE}">>$(obj)include/config.h; \ echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \ echo "#define CONFIG_BOARDNAME \"TQM$${CTYPE}\"">>$(obj)include/config.h; \ - echo "#define CFG_BOOTFILE \"bootfile=/tftpboot/tqm$${CTYPE}/uImage\0\"">>$(obj)include/config.h + echo "#define CFG_BOOTFILE_PATH \"/tftpboot/tqm$${CTYPE}/uImage\"">>$(obj)include/config.h @$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx ######################################################################### @@ -2332,6 +2334,9 @@ scpu_config: unconfig pxa255_idp_config: unconfig @$(MKCONFIG) $(@:_config=) arm pxa pxa255_idp +trizepsiv_config : unconfig + @$(MKCONFIG) $(@:_config=) arm pxa trizepsiv + wepep250_config : unconfig @$(MKCONFIG) $(@:_config=) arm pxa wepep250 diff --git a/README b/README index 4b1982b221..09eb76fe45 100644 --- a/README +++ b/README @@ -338,7 +338,7 @@ The following options need to be configured: CONFIG_OF_LIBFDT * New libfdt-based support * Adds the "fdt" command - * The bootm command does _not_ modify the fdt + * The bootm command automatically updates the fdt CONFIG_OF_FLAT_TREE * Deprecated, see CONFIG_OF_LIBFDT @@ -347,15 +347,13 @@ The following options need to be configured: * The environment variable "disable_of", when set, disables this functionality. - CONFIG_OF_FLAT_TREE_MAX_SIZE - - The maximum size of the constructed OF tree. - OF_CPU - The proper name of the cpus node. OF_SOC - The proper name of the soc node. OF_TBCLK - The timebase frequency. OF_STDOUT_PATH - The path to the console device + boards with QUICC Engines require OF_QE to set UCC mac addresses + CONFIG_OF_HAS_BD_T * CONFIG_OF_LIBFDT - enables the "fdt bd_t" command @@ -365,7 +363,7 @@ The following options need to be configured: CONFIG_OF_HAS_UBOOT_ENV - * CONFIG_OF_LIBFDT - enables the "fdt bd_t" command + * CONFIG_OF_LIBFDT - enables the "fdt env" command * CONFIG_OF_FLAT_TREE - The resulting flat device tree will have a copy of u-boot's environment variables diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/dmake b/board/MAI/bios_emulator/scitech/bin-linux/glibc/dmake deleted file mode 100755 index 4d6ccb3f46..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/glibc/dmake and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_cp b/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_cp deleted file mode 100755 index d3729496ce..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_cp and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_echo b/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_echo deleted file mode 100755 index 6f65d4119a..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_echo and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_rm b/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_rm deleted file mode 100755 index 7de503024b..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_rm and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/makedep b/board/MAI/bios_emulator/scitech/bin-linux/glibc/makedep deleted file mode 100755 index 5451b22024..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/glibc/makedep and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/nasm b/board/MAI/bios_emulator/scitech/bin-linux/glibc/nasm deleted file mode 100755 index fbd335261c..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/glibc/nasm and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/ndisasm b/board/MAI/bios_emulator/scitech/bin-linux/glibc/ndisasm deleted file mode 100755 index dd14a7ae41..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/glibc/ndisasm and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/trans b/board/MAI/bios_emulator/scitech/bin-linux/glibc/trans deleted file mode 100755 index a1aea4f4ad..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/glibc/trans and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/libc/dmake b/board/MAI/bios_emulator/scitech/bin-linux/libc/dmake deleted file mode 100755 index f198f29443..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/libc/dmake and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/libc/nasm b/board/MAI/bios_emulator/scitech/bin-linux/libc/nasm deleted file mode 100755 index e312a0b239..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/libc/nasm and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/libc/ndisasm b/board/MAI/bios_emulator/scitech/bin-linux/libc/ndisasm deleted file mode 100755 index 9fe81a3a3e..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/libc/ndisasm and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/bin-linux/libc/trans b/board/MAI/bios_emulator/scitech/bin-linux/libc/trans deleted file mode 100755 index e536c0466d..0000000000 Binary files a/board/MAI/bios_emulator/scitech/bin-linux/libc/trans and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/makedefs/makedefs.prj b/board/MAI/bios_emulator/scitech/makedefs/makedefs.prj deleted file mode 100644 index edd8809e29..0000000000 Binary files a/board/MAI/bios_emulator/scitech/makedefs/makedefs.prj and /dev/null differ diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/dossctl.obj b/board/MAI/bios_emulator/scitech/src/pm/os2/dossctl.obj deleted file mode 100644 index 5533346410..0000000000 Binary files a/board/MAI/bios_emulator/scitech/src/pm/os2/dossctl.obj and /dev/null differ diff --git a/board/ads5121/u-boot.lds b/board/ads5121/u-boot.lds index 038d849553..34ceb0fdac 100644 --- a/board/ads5121/u-boot.lds +++ b/board/ads5121/u-boot.lds @@ -51,7 +51,6 @@ SECTIONS { cpu/mpc512x/start.o (.text) *(.text) - *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/board/amcc/katmai/init.S b/board/amcc/katmai/init.S index 5202ae694c..e3f3da6bd8 100644 --- a/board/amcc/katmai/init.S +++ b/board/amcc/katmai/init.S @@ -67,9 +67,9 @@ tlbtabA: tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE_BASE, SZ_16K, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE0_CFGBASE, SZ_1K, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE1_CFGBASE, SZ_1K, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE2_CFGBASE, SZ_1K, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x50000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x90000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE2_XCFGBASE, SZ_1K, 0xD0000000, 0xC, AC_R|AC_W|SA_G|SA_I) @@ -109,9 +109,9 @@ tlbtabB: tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE0_CFGBASE, SZ_1K, 0x00100000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE1_CFGBASE, SZ_1K, 0x20100000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE2_CFGBASE, SZ_1K, 0x40100000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0x40000000, 0xD, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE2_XCFGBASE, SZ_1K, 0x50000000, 0xD, AC_R|AC_W|SA_G|SA_I) diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c index b804d55f2e..a49066fcc9 100644 --- a/board/amcc/katmai/katmai.c +++ b/board/amcc/katmai/katmai.c @@ -34,6 +34,8 @@ #undef PCIE_ENDPOINT /* #define PCIE_ENDPOINT 1 */ +DECLARE_GLOBAL_DATA_PTR; + int ppc440spe_init_pcie_rootport(int port); void ppc440spe_setup_pcie(struct pci_controller *hose, int port); @@ -322,8 +324,6 @@ int pci_pre_init(struct pci_controller * hose ) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller * hose ) { - DECLARE_GLOBAL_DATA_PTR; - /*-------------------------------------------------------------------+ * Disable everything *-------------------------------------------------------------------*/ @@ -392,16 +392,18 @@ int katmai_pcie_card_present(int port) static struct pci_controller pcie_hose[3] = {{0},{0},{0}}; -void pcie_setup_hoses(void) +void pcie_setup_hoses(int busno) { struct pci_controller *hose; int i, bus; + char *env; + unsigned int delay; /* * assume we're called after the PCIX hose is initialized, which takes * bus ID 0 and therefore start numbering PCIe's from 1. */ - bus = 1; + bus = busno; for (i = 0; i <= 2; i++) { /* Check for katmai card presence */ if (!katmai_pcie_card_present(i)) @@ -418,8 +420,8 @@ void pcie_setup_hoses(void) hose = &pcie_hose[i]; hose->first_busno = bus; - hose->last_busno = bus; - bus++; + hose->last_busno = bus; + hose->current_busno = bus; /* setup mem resource */ pci_set_region(hose->regions + 0, @@ -439,10 +441,21 @@ void pcie_setup_hoses(void) */ #else ppc440spe_setup_pcie_rootpoint(hose, i); + + env = getenv ("pciscandelay"); + if (env != NULL) { + delay = simple_strtoul (env, NULL, 10); + if (delay > 5) + printf ("Warning, expect noticable delay before PCIe" + "scan due to 'pciscandelay' value!\n"); + mdelay (delay * 1000); + } + /* * Config access can only go down stream */ hose->last_busno = pci_hose_scan(hose); + bus = hose->last_busno + 1; #endif } } diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S index 45bcd4bef7..5fe3af9a09 100644 --- a/board/amcc/sequoia/init.S +++ b/board/amcc/sequoia/init.S @@ -126,6 +126,9 @@ tlbtab: /* TLB-entry for peripherals */ tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + /* TLB-entry PCI IO Space - from sr@denx.de */ + tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbtab_end #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) diff --git a/board/amcc/taishan/taishan.c b/board/amcc/taishan/taishan.c index bc976c7526..f00397ed19 100644 --- a/board/amcc/taishan/taishan.c +++ b/board/amcc/taishan/taishan.c @@ -32,6 +32,8 @@ void show_reset_reg(void); #endif +DECLARE_GLOBAL_DATA_PTR; + int lcd_init(void); int board_early_init_f (void) @@ -266,8 +268,6 @@ int pci_pre_init(struct pci_controller * hose ) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller * hose ) { - DECLARE_GLOBAL_DATA_PTR; - /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ diff --git a/board/amcc/yucca/init.S b/board/amcc/yucca/init.S index c92dcf7a51..67e8f8f3a2 100644 --- a/board/amcc/yucca/init.S +++ b/board/amcc/yucca/init.S @@ -70,9 +70,9 @@ tlbtabA: tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE_BASE, SZ_16K, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE0_CFGBASE, SZ_1K, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE1_CFGBASE, SZ_1K, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE2_CFGBASE, SZ_1K, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x50000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x90000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE2_XCFGBASE, SZ_1K, 0xD0000000, 0xC, AC_R|AC_W|SA_G|SA_I) @@ -112,9 +112,9 @@ tlbtabB: tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE0_CFGBASE, SZ_1K, 0x00100000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE1_CFGBASE, SZ_1K, 0x20100000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CFG_PCIE2_CFGBASE, SZ_1K, 0x40100000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0x40000000, 0xD, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_R|AC_W|SA_G|SA_I) tlbentry(CFG_PCIE2_XCFGBASE, SZ_1K, 0x50000000, 0xD, AC_R|AC_W|SA_G|SA_I) diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c index d08fcf3565..d7cc384ba0 100644 --- a/board/amcc/yucca/yucca.c +++ b/board/amcc/yucca/yucca.c @@ -34,6 +34,8 @@ #include "yucca.h" #include "../cpu/ppc4xx/440spe_pcie.h" +DECLARE_GLOBAL_DATA_PTR; + #undef PCIE_ENDPOINT /* #define PCIE_ENDPOINT 1 */ @@ -668,8 +670,6 @@ int pci_pre_init(struct pci_controller * hose ) #if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) void pci_target_init(struct pci_controller * hose ) { - DECLARE_GLOBAL_DATA_PTR; - /*-------------------------------------------------------------------+ * Disable everything *-------------------------------------------------------------------*/ @@ -846,16 +846,18 @@ void yucca_setup_pcie_fpga_endpoint(int port) static struct pci_controller pcie_hose[3] = {{0},{0},{0}}; -void pcie_setup_hoses(void) +void pcie_setup_hoses(int busno) { struct pci_controller *hose; int i, bus; + char *env; + unsigned int delay; /* * assume we're called after the PCIX hose is initialized, which takes * bus ID 0 and therefore start numbering PCIe's from 1. */ - bus = 1; + bus = busno; for (i = 0; i <= 2; i++) { /* Check for yucca card presence */ if (!yucca_pcie_card_present(i)) @@ -874,8 +876,8 @@ void pcie_setup_hoses(void) hose = &pcie_hose[i]; hose->first_busno = bus; - hose->last_busno = bus; - bus++; + hose->last_busno = bus; + hose->current_busno = bus; /* setup mem resource */ pci_set_region(hose->regions + 0, @@ -895,10 +897,21 @@ void pcie_setup_hoses(void) */ #else ppc440spe_setup_pcie_rootpoint(hose, i); + + env = getenv ("pciscandelay"); + if (env != NULL) { + delay = simple_strtoul (env, NULL, 10); + if (delay > 5) + printf ("Warning, expect noticable delay before PCIe" + "scan due to 'pciscandelay' value!\n"); + mdelay (delay * 1000); + } + /* * Config access can only go down stream */ hose->last_busno = pci_hose_scan(hose); + bus = hose->last_busno + 1; #endif } } diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c index 1dd4a3fe2e..98ed6f81d2 100644 --- a/board/bf533-ezkit/bf533-ezkit.c +++ b/board/bf533-ezkit/bf533-ezkit.c @@ -30,6 +30,8 @@ #include "psd4256.h" #endif +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { #if (BFIN_CPU == ADSP_BF531) @@ -46,7 +48,6 @@ int checkboard(void) long int initdram(int board_type) { - DECLARE_GLOBAL_DATA_PTR; #ifdef DEBUG int brate; char *tmp = getenv("baudrate"); diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c index b9dff99171..69e425bf97 100644 --- a/board/bf533-stamp/bf533-stamp.c +++ b/board/bf533-stamp/bf533-stamp.c @@ -30,6 +30,8 @@ #include #include "bf533-stamp.h" +DECLARE_GLOBAL_DATA_PTR; + #define STATUS_LED_OFF 0 #define STATUS_LED_ON 1 @@ -55,7 +57,6 @@ int checkboard(void) long int initdram(int board_type) { - DECLARE_GLOBAL_DATA_PTR; #ifdef DEBUG printf("SDRAM attributes:\n"); printf diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c index 919cef688d..b3d8bda9bf 100644 --- a/board/bf537-stamp/bf537-stamp.c +++ b/board/bf537-stamp/bf537-stamp.c @@ -32,6 +32,8 @@ #include #include "ether_bf537.h" +DECLARE_GLOBAL_DATA_PTR; + #define POST_WORD_ADDR 0xFF903FFC /* @@ -132,7 +134,6 @@ void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words) long int initdram(int board_type) { - DECLARE_GLOBAL_DATA_PTR; #ifdef DEBUG int brate; char *tmp = getenv("baudrate"); diff --git a/board/bf561-ezkit/bf561-ezkit.c b/board/bf561-ezkit/bf561-ezkit.c index 989b0194c1..2ff44a7152 100644 --- a/board/bf561-ezkit/bf561-ezkit.c +++ b/board/bf561-ezkit/bf561-ezkit.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int checkboard(void) { printf("CPU: ADSP BF561\n"); @@ -39,7 +41,6 @@ int checkboard(void) long int initdram(int board_type) { - DECLARE_GLOBAL_DATA_PTR; #ifdef DEBUG int brate; char *tmp = getenv("baudrate"); diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c index 48753d7e24..36d7e1ed48 100644 --- a/board/cds/mpc8548cds/mpc8548cds.c +++ b/board/cds/mpc8548cds/mpc8548cds.c @@ -362,20 +362,28 @@ pci_init_board(void) ); - /* outbound memory */ + /* inbound */ pci_set_region(hose->regions + 0, + CFG_PCI_MEMORY_BUS, + CFG_PCI_MEMORY_PHYS, + CFG_PCI_MEMORY_SIZE, + PCI_REGION_MEM | PCI_REGION_MEMORY); + + + /* outbound memory */ + pci_set_region(hose->regions + 1, CFG_PCI1_MEM_BASE, CFG_PCI1_MEM_PHYS, CFG_PCI1_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ - pci_set_region(hose->regions + 1, + pci_set_region(hose->regions + 2, CFG_PCI1_IO_BASE, CFG_PCI1_IO_PHYS, CFG_PCI1_IO_SIZE, PCI_REGION_IO); - hose->region_count = 2; + hose->region_count = 3; /* relocate config table pointers */ hose->config_table = \ @@ -534,7 +542,7 @@ ft_pci_setup(void *blob, bd_t *bd) #endif #ifdef CONFIG_PCIE1 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@a000/bus-range", &len); + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@a000/bus-range", &len); if (p != NULL) { p[0] = 0; p[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; diff --git a/board/cm5200/cmd_cm5200.c b/board/cm5200/cmd_cm5200.c index 513c365537..354f2bf6eb 100644 --- a/board/cm5200/cmd_cm5200.c +++ b/board/cm5200/cmd_cm5200.c @@ -27,7 +27,7 @@ #include #include -#ifdef CONFIG_CMD_BSB +#ifdef CONFIG_CMD_BSP int do_i2c(char *argv[]) { diff --git a/board/davinci/dv-evm/dv_board.c b/board/davinci/dv-evm/dv_board.c index 604edb56c3..dce821ba6a 100644 --- a/board/davinci/dv-evm/dv_board.c +++ b/board/davinci/dv-evm/dv_board.c @@ -31,6 +31,8 @@ #define MACH_TYPE_DAVINCI_EVM 901 +DECLARE_GLOBAL_DATA_PTR; + extern void i2c_init(int speed, int slaveaddr); extern void timer_init(void); extern int eth_hw_init(void); @@ -115,8 +117,6 @@ void dsp_on(void) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_EVM; @@ -202,8 +202,6 @@ int misc_init_r (void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/davinci/schmoogie/dv_board.c b/board/davinci/schmoogie/dv_board.c index 9f271a1666..0a07523b12 100644 --- a/board/davinci/schmoogie/dv_board.c +++ b/board/davinci/schmoogie/dv_board.c @@ -31,6 +31,8 @@ #define MACH_TYPE_SCHMOOGIE 1255 +DECLARE_GLOBAL_DATA_PTR; + extern void i2c_init(int speed, int slaveaddr); extern void timer_init(void); extern int eth_hw_init(void); @@ -115,8 +117,6 @@ void dsp_on(void) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_SCHMOOGIE; @@ -244,8 +244,6 @@ int misc_init_r (void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/davinci/sonata/dv_board.c b/board/davinci/sonata/dv_board.c index 99857c4271..cd2dac610d 100644 --- a/board/davinci/sonata/dv_board.c +++ b/board/davinci/sonata/dv_board.c @@ -31,6 +31,8 @@ #define MACH_TYPE_SONATA 1254 +DECLARE_GLOBAL_DATA_PTR; + extern void i2c_init(int speed, int slaveaddr); extern void timer_init(void); extern int eth_hw_init(void); @@ -115,8 +117,6 @@ void dsp_on(void) int board_init(void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number of the board */ gd->bd->bi_arch_number = MACH_TYPE_SONATA; @@ -199,8 +199,6 @@ int misc_init_r (void) int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/fads/fads.h b/board/fads/fads.h index a7fe2e9019..dea8a0dc10 100644 --- a/board/fads/fads.h +++ b/board/fads/fads.h @@ -229,6 +229,7 @@ #define CFG_ENV_SECT_SIZE 0x40000 /* see README - env sector total size */ #define CFG_ENV_OFFSET CFG_ENV_SECT_SIZE #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment */ +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ #define CFG_DIRECT_FLASH_TFTP diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile new file mode 100644 index 0000000000..44f613e418 --- /dev/null +++ b/board/freescale/common/Makefile @@ -0,0 +1,56 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)board/$(VENDOR)/common) +endif + +LIB = $(obj)lib$(VENDOR).a + +COBJS := sys_eeprom.o \ + pixis.o \ + pq-mds-pib.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 99cc2ee197..fd99a938c0 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -25,8 +25,9 @@ #include #include #include -#include +#ifdef CONFIG_FSL_PIXIS +#include #include "pixis.h" @@ -470,3 +471,4 @@ U_BOOT_CMD( " pixis_reset altbank cf \n" " pixis_reset cf \n" ); +#endif /* CONFIG_FSL_PIXIS */ diff --git a/board/freescale/common/pq-mds-pib.c b/board/freescale/common/pq-mds-pib.c index 8c013c72fb..d79f2eb2e8 100644 --- a/board/freescale/common/pq-mds-pib.c +++ b/board/freescale/common/pq-mds-pib.c @@ -12,6 +12,8 @@ #include #include +#ifdef CONFIG_PQ_MDS_PIB + #include "pq-mds-pib.h" int pib_init(void) @@ -100,3 +102,4 @@ int pib_init(void) i2c_set_bus_num(orig_i2c_bus); return 0; } +#endif /* CONFIG_PQ_MDS_PIB */ diff --git a/board/freescale/m5235evb/mii.c b/board/freescale/m5235evb/mii.c index 58fabdf324..1fd4d99c1e 100644 --- a/board/freescale/m5235evb/mii.c +++ b/board/freescale/m5235evb/mii.c @@ -204,7 +204,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { diff --git a/board/freescale/m5329evb/mii.c b/board/freescale/m5329evb/mii.c index 31f1510cc9..8f6abf3eeb 100644 --- a/board/freescale/m5329evb/mii.c +++ b/board/freescale/m5329evb/mii.c @@ -203,7 +203,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { diff --git a/board/freescale/m54455evb/mii.c b/board/freescale/m54455evb/mii.c index c067183aad..7a59aa0674 100644 --- a/board/freescale/m54455evb/mii.c +++ b/board/freescale/m54455evb/mii.c @@ -221,7 +221,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c index e6e84107eb..16ec4bbf54 100644 --- a/board/freescale/mpc8313erdb/sdram.c +++ b/board/freescale/mpc8313erdb/sdram.c @@ -33,10 +33,11 @@ #include +DECLARE_GLOBAL_DATA_PTR; + #ifndef CFG_8313ERDB_BROKEN_PMC static void resume_from_sleep(void) { - DECLARE_GLOBAL_DATA_PTR; u32 magic = *(u32 *)0; typedef void (*func_t)(void); diff --git a/board/freescale/mpc832xemds/Makefile b/board/freescale/mpc832xemds/Makefile index ea52484c06..5ec7a871d4 100644 --- a/board/freescale/mpc832xemds/Makefile +++ b/board/freescale/mpc832xemds/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o pci.o ../common/pq-mds-pib.o +COBJS := $(BOARD).o pci.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/freescale/mpc8360emds/Makefile b/board/freescale/mpc8360emds/Makefile index ea52484c06..5ec7a871d4 100644 --- a/board/freescale/mpc8360emds/Makefile +++ b/board/freescale/mpc8360emds/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o pci.o ../common/pq-mds-pib.o +COBJS := $(BOARD).o pci.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/freescale/mpc8544ds/Makefile b/board/freescale/mpc8544ds/Makefile index 308f707de0..006fdc95e7 100644 --- a/board/freescale/mpc8544ds/Makefile +++ b/board/freescale/mpc8544ds/Makefile @@ -24,14 +24,9 @@ include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -endif - LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o \ - ../common/pixis.o +COBJS := $(BOARD).o SOBJS := init.o diff --git a/board/freescale/mpc8544ds/init.S b/board/freescale/mpc8544ds/init.S index 900c3680c7..68ccba746b 100644 --- a/board/freescale/mpc8544ds/init.S +++ b/board/freescale/mpc8544ds/init.S @@ -237,6 +237,6 @@ law_entry: /* contains both PCIE3 MEM & IO space */ .long (CFG_PCIE3_MEM_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_2M) + .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_4M) 4: entry_end diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 80822bec73..76d909191f 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -222,6 +223,11 @@ pci_init_board(void) printf (" PCIE3 on bus %02x - %02x\n", hose->first_busno,hose->last_busno); + /* + * Activate ULI1575 legacy chip by performing a fake + * memory access. Needed to make ULI RTC work. + */ + in_be32(CFG_PCIE3_MEM_BASE); } else { printf (" PCIE3: disabled\n"); } @@ -516,8 +522,16 @@ ft_board_setup(void *blob, bd_t *bd) *p++ = cpu_to_be32(bd->bi_memstart); *p = cpu_to_be32(bd->bi_memsize); } +#ifdef CONFIG_PCI1 + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8000/bus-range", &len); + if (p != NULL) { + p[0] = 0; + p[1] = pci1_hose.last_busno - pci1_hose.first_busno; + debug("PCI@8000 first_busno=%d last_busno=%d\n",p[0],p[1]); + } +#endif #ifdef CONFIG_PCIE1 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@a000/bus-range", &len); + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@a000/bus-range", &len); if (p != NULL) { p[0] = 0; p[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; @@ -525,7 +539,7 @@ ft_board_setup(void *blob, bd_t *bd) } #endif #ifdef CONFIG_PCIE2 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@9000/bus-range", &len); + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@9000/bus-range", &len); if (p != NULL) { p[0] = 0; p[1] = pcie2_hose.last_busno - pcie2_hose.first_busno; @@ -533,7 +547,7 @@ ft_board_setup(void *blob, bd_t *bd) } #endif #ifdef CONFIG_PCIE3 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@b000/bus-range", &len); + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@b000/bus-range", &len); if (p != NULL) { p[0] = 0; p[1] = pcie3_hose.last_busno - pcie3_hose.first_busno;; diff --git a/board/freescale/mpc8641hpcn/Makefile b/board/freescale/mpc8641hpcn/Makefile index 93b015d474..201da3ebea 100644 --- a/board/freescale/mpc8641hpcn/Makefile +++ b/board/freescale/mpc8641hpcn/Makefile @@ -23,15 +23,9 @@ include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -endif - LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o \ - ../common/sys_eeprom.o \ - ../common/pixis.o +COBJS := $(BOARD).o SOBJS := init.o diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index ffd11cb5f1..931be9f375 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -338,6 +338,22 @@ ft_board_setup(void *blob, bd_t *bd) *p++ = cpu_to_be32(bd->bi_memstart); *p = cpu_to_be32(bd->bi_memsize); } +#ifdef CONFIG_PCI1 + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@8000/bus-range", &len); + if (p != NULL) { + p[0] = 0; + p[1] = pci1_hose.last_busno - pci1_hose.first_busno; + debug("PCI@8000 first_busno=%d last_busno=%d\n",p[0],p[1]); + } +#endif +#ifdef CONFIG_PCI2 + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@9000/bus-range", &len); + if (p != NULL) { + p[0] = 0; + p[1] = pci2_hose.last_busno - pci2_hose.first_busno; + debug("PCI@9000 first_busno=%d last_busno=%d\n",p[0],p[1]); + } +#endif } #endif diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index c027f6f34e..07ba2459d8 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -28,10 +28,7 @@ #include #include #include - -#if defined(CONFIG_OF_FLAT_TREE) -#include -#endif +#include #if defined(CONFIG_LITE5200B) #include "mt46v32m16.h" @@ -386,7 +383,7 @@ void ide_set_reset (int idereset) } #endif -#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c index b2274875e5..efdc333493 100644 --- a/board/jupiter/jupiter.c +++ b/board/jupiter/jupiter.c @@ -28,11 +28,7 @@ #include #include #include - -#if defined(CONFIG_OF_FLAT_TREE) -#include -#endif - +#include #define SDRAM_DDR 0 #if 1 @@ -308,7 +304,7 @@ void ide_set_reset (int idereset) } #endif -#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { diff --git a/board/lpc2292sodimm/lpc2292sodimm.c b/board/lpc2292sodimm/lpc2292sodimm.c index d212c63328..9c2d1af2fc 100644 --- a/board/lpc2292sodimm/lpc2292sodimm.c +++ b/board/lpc2292sodimm/lpc2292sodimm.c @@ -28,8 +28,7 @@ #include #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscelaneous platform dependent initialisations @@ -37,8 +36,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* Activate LED flasher */ IO_LEDFLSH = 0x40; @@ -53,8 +50,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/m5271evb/mii.c b/board/m5271evb/mii.c index f6c63c302b..3830ce7f28 100644 --- a/board/m5271evb/mii.c +++ b/board/m5271evb/mii.c @@ -200,7 +200,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { diff --git a/board/m5272c3/mii.c b/board/m5272c3/mii.c index fadcbb3ef8..0ecc44ace2 100644 --- a/board/m5272c3/mii.c +++ b/board/m5272c3/mii.c @@ -200,7 +200,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { diff --git a/board/m5282evb/mii.c b/board/m5282evb/mii.c index ebd3ed9387..d7c6d1f0e3 100644 --- a/board/m5282evb/mii.c +++ b/board/m5282evb/mii.c @@ -201,7 +201,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index 6eb5fe9cfc..f83998e5aa 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -29,9 +29,7 @@ #include #include #include -#if defined(CONFIG_OF_FLAT_TREE) -#include -#endif +#include #if defined(CONFIG_STATUS_LED) #include @@ -196,12 +194,12 @@ int checkboard(void) } -#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); } -#endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */ +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ #if defined(CONFIG_STATUS_LED) diff --git a/board/mpc7448hpc2/mpc7448hpc2.c b/board/mpc7448hpc2/mpc7448hpc2.c index 63c99de175..81846eba77 100644 --- a/board/mpc7448hpc2/mpc7448hpc2.c +++ b/board/mpc7448hpc2/mpc7448hpc2.c @@ -38,6 +38,8 @@ extern void ft_cpu_setup (void *blob, bd_t *bd); #undef DEBUG +DECLARE_GLOBAL_DATA_PTR; + extern void flush_data_cache (void); extern void invalidate_l1_instruction_cache (void); extern void tsi108_init_f (void); @@ -46,8 +48,6 @@ int display_mem_map (void); void after_reloc (ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; - /* * Jump to the main U-Boot board init code */ diff --git a/board/mpc7448hpc2/tsi108_init.c b/board/mpc7448hpc2/tsi108_init.c index 8a7efef772..30ae17d872 100644 --- a/board/mpc7448hpc2/tsi108_init.c +++ b/board/mpc7448hpc2/tsi108_init.c @@ -33,6 +33,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + extern void mpicInit (int verbose); /* @@ -141,7 +143,6 @@ unsigned long get_board_bus_clk (void) int board_early_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; ulong i; gd->mem_clk = 0; @@ -583,7 +584,6 @@ unsigned long get_l2cr (void) int misc_init_r (void) { - DECLARE_GLOBAL_DATA_PTR; #ifdef CFG_CLK_SPREAD /* Initialize Spread-Spectrum Clock generation */ ulong i; diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c index 44b4112554..227c49272c 100644 --- a/board/mpl/vcma9/cmd_vcma9.c +++ b/board/mpl/vcma9/cmd_vcma9.c @@ -40,6 +40,8 @@ static uchar cs8900_chksum(ushort data) #endif +DECLARE_GLOBAL_DATA_PTR; + extern void print_vcma9_info(void); extern int vcma9_cantest(int); extern int vcma9_nandtest(void); @@ -53,8 +55,6 @@ extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - DECLARE_GLOBAL_DATA_PTR; - if (strcmp(argv[1], "info") == 0) { print_vcma9_info(); diff --git a/board/omap2420h4/flash.c b/board/omap2420h4/flash.c deleted file mode 100644 index d5e106a5ea..0000000000 --- a/board/omap2420h4/flash.c +++ /dev/null @@ -1,537 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2003 - * Texas Instruments, - * Kshitij Gupta - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -#define PHYS_FLASH_SECT_SIZE SZ_128K -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Board support for 1 or 2 flash devices */ -#undef FLASH_PORT_WIDTH32 -#define FLASH_PORT_WIDTH16 - -#ifdef FLASH_PORT_WIDTH16 -# define FLASH_PORT_WIDTH ushort -# define FLASH_PORT_WIDTHV vu_short -# define SWAP(x) __swab16(x) -#else -# define FLASH_PORT_WIDTH ulong -# define FLASH_PORT_WIDTHV vu_long -# define SWAP(x) __swab32(x) -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - - -/* Flash Organization Structure */ -typedef struct OrgDef { - unsigned int sector_number; - unsigned int sector_size; -} OrgDef; - - -/* Flash Organizations */ -OrgDef OrgIntel_28F256L18T[] = { - {4, SZ_32K}, /* 4 * 32kBytes sectors */ - {255, SZ_128K}, /* 255 * 128kBytes sectors */ -}; - - -/*----------------------------------------------------------------------- - * Functions - */ -unsigned long flash_init (void); -static ulong flash_get_size (FPW * addr, flash_info_t * info); -static int write_data (flash_info_t * info, ulong dest, FPW data); -static void flash_get_offsets (ulong base, flash_info_t * info); -void inline spin_wheel (void); -void flash_print_info (flash_info_t * info); -void flash_unprotect_sectors (FPWV * addr); -int flash_erase (flash_info_t * info, int s_first, int s_last); -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt); -void flash_unlock(flash_info_t * info, int bank); -int flash_probe(void); - -/*----------------------------------------------------------------------- - */ - -/* see if flash is ok */ -int flash_probe(void) -{ - return(flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[0])); -} - -unsigned long flash_init (void) -{ - int i; - ulong size = 0; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); - /* to reset the lock bit */ - flash_unlock(&flash_info[i],i); - break; - case 1: - flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_2, &flash_info[i]); - /* to reset the lock bit */ - flash_unlock(&flash_info[i],i); - break; - - default: - panic ("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - -#ifdef CFG_ENV_IS_IN_FLASH - /* Protect monitor and environment sectors - */ - flash_protect (FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); -#endif - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_unlock(flash_info_t * info, int bank) -{ - int j; - if (!bank) - j=2; /* leave 0,1 locked for boot bank */ - else - j=0; /* get the whole bank for #2 */ - - for (;jstart[j]); - if (addr == NULL) { - printf("Warning Flash probe failed\n"); - break; - } - flash_unprotect_sectors (addr); - *addr = (FPW) 0x00500050;/* clear status register */ - *addr = (FPW) 0x00FF00FF;/* resest to read mode */ - } -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t * info) -{ - int i; - volatile int r; /* gcc 3.4.0-1 strangeness, need to follow up.*/ - - if (info->flash_id == FLASH_UNKNOWN) { - return; - } - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - if (i > 254) { /* 255,256,257,258 */ - r=i; - info->start[i] = base + (((r-(int)255) * SZ_32K) + (255*PHYS_FLASH_SECT_SIZE)); - info->protect[i] = 0; - } else { - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F256L18T: - printf ("FLASH 28F256L18T\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (FPW * addr, flash_info_t * info) -{ - volatile FPW value; - /* mb(); this one makes ARM11 err go away, but I want it :) as a guide to problems */ - - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = (FPW) 0x00AA00AA; - addr[0x2AAA] = (FPW) 0x00550055; - addr[0x5555] = (FPW) 0x00900090; - - mb (); - value = addr[0] & 0xFF; /* just looking for 89 (8989 is hw pat)*/ - - switch (value) { - - case (FPW) INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - return(0); /* no or unknown flash */ - } - - mb (); - value = addr[1]; /* device ID */ - switch (value) { - - case (FPW) (INTEL_ID_28F256L18T): /* 880D */ - info->flash_id += FLASH_28F256L18T; - info->sector_count = 259; /*0-258*/ - info->size = SZ_32M; - break; /* => 32 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CFG_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CFG_MAX_FLASH_SECT); - info->sector_count = CFG_MAX_FLASH_SECT; - } - - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - - return(info->size); -} - - -/* unprotects a sector for write and erase - * on some intel parts, this unprotects the entire chip, but it - * wont hurt to call this additional times per sector... - */ -void flash_unprotect_sectors (FPWV * addr) -{ -#define PD_FINTEL_WSMS_READY_MASK 0x0080 - - *addr = (FPW) 0x00500050; /* clear status register */ - - /* this sends the clear lock bit command */ - *addr = (FPW) 0x00600060; - *addr = (FPW) 0x00D000D0; -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int prot, sect; - ulong type, start, last; - int rcode = 0; -#ifdef CONFIG_USE_IRQ - int iflag; -#endif - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - - start = get_timer (0); - last = start; - -#ifdef CONFIG_USE_IRQ - /* Disable interrupts which might cause a timeout here */ - iflag = disable_interrupts (); -#endif - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - FPWV *addr = (FPWV *) (info->start[sect]); - FPW status; - - printf ("Erasing sector %2d ... ", sect); - - flash_unprotect_sectors (addr); - - /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); - - *addr = (FPW) 0x00500050;/* clear status register */ - *addr = (FPW) 0x00200020;/* erase setup */ - *addr = (FPW) 0x00D000D0;/* erase confirm */ - - while (((status = - *addr) & (FPW) 0x00800080) != - (FPW) 0x00800080) { - if (get_timer_masked () > - CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - /* suspend erase */ - *addr = (FPW) 0x00B000B0; - /* reset to read mode */ - *addr = (FPW) 0x00FF00FF; - rcode = 1; - break; - } - } - - /* clear status register cmd. */ - *addr = (FPW) 0x00500050; - *addr = (FPW) 0x00FF00FF;/* resest to read mode */ - printf (" done\n"); - } - } -#ifdef CONFIG_USE_IRQ - if (iflag) - enable_interrupts(); -#endif - - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) { - return 4; - } -/* get lower word aligned address */ -#ifdef FLASH_PORT_WIDTH16 - wp = (addr & ~1); - port_width = 2; -#else - wp = (addr & ~3); - port_width = 4; -#endif - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return(rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return(rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel (); - count = 0; - } - } - - if (cnt == 0) { - return(0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return(write_data (info, wp, SWAP (data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t * info, ulong dest, FPW data) -{ - FPWV *addr = (FPWV *) dest; - ulong status; -#ifdef CONFIG_USE_IRQ - int iflag; -#endif - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); - return(2); - } - /* Disable interrupts which might cause a timeout here */ -#ifdef CONFIG_USE_IRQ - iflag = disable_interrupts (); -#endif - *addr = (FPW) 0x00400040; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - reset_timer_masked (); - - /* wait while polling the status register */ - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) { - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return(1); - } - } - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - -#ifdef CONFIG_USE_IRQ - if (iflag) - enable_interrupts(); -#endif - - return(0); -} - -void inline spin_wheel (void) -{ - static int p = 0; - static char w[] = "\\/-"; - - printf ("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c index e247fee0c1..90e99d3dca 100644 --- a/board/pcs440ep/pcs440ep.c +++ b/board/pcs440ep/pcs440ep.c @@ -30,6 +30,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -867,6 +868,29 @@ U_BOOT_CMD( ); #endif +#if defined (CONFIG_CMD_IDE) +/* These addresses need to be shifted one place to the left + * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0) + * These values are shifted + */ +extern ulong *ide_bus_offset; +void inline ide_outb(int dev, int port, unsigned char val) +{ + debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", + dev, port, val, (ATA_CURR_BASE(dev)+port)); + + out_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)), val); +} +unsigned char inline ide_inb(int dev, int port) +{ + uchar val; + val = in_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1))); + debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", + dev, port, (ATA_CURR_BASE(dev)+port), val); + return (val); +} +#endif + #ifdef CONFIG_IDE_PREINIT int ide_preinit (void) { diff --git a/board/sbc2410x/sbc2410x.c b/board/sbc2410x/sbc2410x.c index b4865e1229..6c894a3869 100644 --- a/board/sbc2410x/sbc2410x.c +++ b/board/sbc2410x/sbc2410x.c @@ -35,7 +35,7 @@ #include #endif -/* ------------------------------------------------------------------------- */ +DECLARE_GLOBAL_DATA_PTR; #define FCLK_SPEED 1 @@ -74,7 +74,6 @@ static inline void delay (unsigned long loops) int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); @@ -128,8 +127,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/siemens/SMN42/smn42.c b/board/siemens/SMN42/smn42.c index cbfc76c463..52d1d7e5f3 100644 --- a/board/siemens/SMN42/smn42.c +++ b/board/siemens/SMN42/smn42.c @@ -31,8 +31,7 @@ #include #include -/* ------------------------------------------------------------------------- */ - +DECLARE_GLOBAL_DATA_PTR; /* * Miscellaneous platform dependent initialisations @@ -40,8 +39,6 @@ int board_init (void) { - DECLARE_GLOBAL_DATA_PTR; - /* arch number MACH_TYPE_ARMADILLO - not official*/ gd->bd->bi_arch_number = 83; @@ -53,8 +50,6 @@ int board_init (void) int dram_init (void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; diff --git a/board/stxssa/stxssa.c b/board/stxssa/stxssa.c index 5882124150..9bacb98d86 100644 --- a/board/stxssa/stxssa.c +++ b/board/stxssa/stxssa.c @@ -378,9 +378,14 @@ static struct pci_config_table pci_stxgp3_config_table[] = { #endif -static struct pci_controller hose = { +static struct pci_controller hose[] = { #ifndef CONFIG_PCI_PNP - config_table: pci_stxgp3_config_table, + { config_table: pci_stxgp3_config_table,}, +#else + {}, +#endif +#ifdef CONFIG_MPC85XX_PCI2 + {}, #endif }; @@ -393,6 +398,6 @@ pci_init_board(void) #ifdef CONFIG_PCI extern void pci_mpc85xx_init(struct pci_controller *hose); - pci_mpc85xx_init(&hose); + pci_mpc85xx_init(hose); #endif /* CONFIG_PCI */ } diff --git a/board/stxssa/u-boot.lds b/board/stxssa/u-boot.lds index 95ecf66a8d..65e1bcfb12 100644 --- a/board/stxssa/u-boot.lds +++ b/board/stxssa/u-boot.lds @@ -145,6 +145,7 @@ SECTIONS . = ALIGN(256); __init_end = .; + . = .; __bss_start = .; .bss : { diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c index 51f4aebc06..29d6f00427 100644 --- a/board/tqm5200/tqm5200.c +++ b/board/tqm5200/tqm5200.c @@ -31,10 +31,7 @@ #include #include #include - -#if defined(CONFIG_OF_FLAT_TREE) -#include -#endif +#include #ifdef CONFIG_VIDEO_SM501 #include @@ -46,6 +43,8 @@ #include "mt48lc16m16a2-75.h" #endif +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_PS2MULT void ps2mult_early_init(void); #endif @@ -480,8 +479,6 @@ int silent_boot (void) int board_early_init_f (void) { - DECLARE_GLOBAL_DATA_PTR; - if (silent_boot()) gd->flags |= GD_FLG_SILENT; @@ -780,9 +777,9 @@ int board_get_height (void) #endif /* CONFIG_VIDEO_SM501 */ -#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); } -#endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */ +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/trizepsiv/Makefile b/board/trizepsiv/Makefile new file mode 100644 index 0000000000..115e17ded9 --- /dev/null +++ b/board/trizepsiv/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := conxs.o eeprom.o +SOBJS := lowlevel_init.o pxavoltage.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/trizepsiv/config.mk b/board/trizepsiv/config.mk new file mode 100644 index 0000000000..4486f6b96d --- /dev/null +++ b/board/trizepsiv/config.mk @@ -0,0 +1,3 @@ +TEXT_BASE =0xa1f00000 +# 0xa1700000 +#TEXT_BASE = 0 diff --git a/board/trizepsiv/conxs.c b/board/trizepsiv/conxs.c new file mode 100644 index 0000000000..7c6c855007 --- /dev/null +++ b/board/trizepsiv/conxs.c @@ -0,0 +1,146 @@ +/* + * (C) Copyright 2007 + * Stefano Babic, DENX Gmbh, sbabic@denx.de + * + * (C) Copyright 2004 + * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net + * + * (C) Copyright 2002 + * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Marius Groeger + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define RH_A_PSM (1 << 8) /* power switching mode */ +#define RH_A_NPS (1 << 9) /* no power switching */ + +extern struct serial_device serial_ffuart_device; +extern struct serial_device serial_btuart_device; +extern struct serial_device serial_stuart_device; + +/* ------------------------------------------------------------------------- */ + +/* + * Miscelaneous platform dependent initialisations + */ + +void usb_board_init(void) +{ + UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & + ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE); + + UHCHR |= UHCHR_FSBIR; + + while (UHCHR & UHCHR_FSBIR); + + UHCHR &= ~UHCHR_SSE; + UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE); + + /* Clear any OTG Pin Hold */ + if (PSSR & PSSR_OTGPH) + PSSR |= PSSR_OTGPH; + + UHCRHDA &= ~(RH_A_NPS); + UHCRHDA |= RH_A_PSM; + + /* Set port power control mask bits, only 3 ports. */ + UHCRHDB |= (0x7<<17); +} + +void usb_board_init_fail(void) +{ + return; +} + +void usb_board_stop(void) +{ + UHCHR |= UHCHR_FHR; + udelay(11); + UHCHR &= ~UHCHR_FHR; + + UHCCOMS |= 1; + udelay(10); + + CKEN &= ~CKEN10_USBHOST; + + puts("Called USB STOP\n"); + return; +} + +int board_init (void) +{ + /* memory and cpu-speed are setup before relocation */ + /* so we do _nothing_ here */ + + /* arch number of ConXS Board */ + gd->bd->bi_arch_number = 776; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0xa000003c; + + return 0; +} + +int board_late_init(void) +{ +#if defined(CONFIG_SERIAL_MULTI) + char *console=getenv("boot_console"); + + if ((strcmp(console,"serial_btuart") == 0) || + (strcmp(console,"serial_stuart") == 0) || + (strcmp(console,"serial_ffuart") == 0)) { + setenv("stdout",console); + setenv("stdin", console); + setenv("stderr",console); + } else { + setenv("stdout", "serial"); + setenv("stdin", "serial"); + setenv("stderr", "serial"); + } +#endif + return 0; +} + +struct serial_device *default_serial_console (void) +{ + return &serial_ffuart_device; +} + +int dram_init (void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + gd->bd->bi_dram[1].start = PHYS_SDRAM_2; + gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; + gd->bd->bi_dram[2].start = PHYS_SDRAM_3; + gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; + gd->bd->bi_dram[3].start = PHYS_SDRAM_4; + gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; + + return 0; +} diff --git a/board/trizepsiv/eeprom.c b/board/trizepsiv/eeprom.c new file mode 100644 index 0000000000..3d3bc00221 --- /dev/null +++ b/board/trizepsiv/eeprom.c @@ -0,0 +1,85 @@ +/* + * (C) Copyright 2007 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +static unsigned char srom[128]; +extern u16 read_srom_word(int); +extern void write_srom_word(int offset, u16 val); + +static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { + int i; + + for (i=0; i < 0x40; i++) { + if (!(i % 0x10)) + printf("\n%08lx:", i); + printf(" %04x", read_srom_word(i)); + } + printf ("\n"); + return (0); +} + +static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { + int offset,value; + + if (argc < 4) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + offset=simple_strtoul(argv[2],NULL,16); + value=simple_strtoul(argv[3],NULL,16); + if (offset > 0x40) { + printf("Wrong offset : 0x%x\n",offset); + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + write_srom_word(offset, value); + return (0); +} + +int do_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { + if (argc < 2) { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + if (strcmp (argv[1],"read") == 0) { + return (do_read_dm9000_eeprom(cmdtp,flag,argc,argv)); + } else if (strcmp (argv[1],"write") == 0) { + return (do_write_dm9000_eeprom(cmdtp,flag,argc,argv)); + } else { + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; + } +} + +U_BOOT_CMD( + dm9000ee,4,1,do_dm9000_eeprom, + "dm9000ee- Read/Write eeprom connected to Ethernet Controller\n", + "\ndm9000ee write \n" + "\tdm9000ee read \n" + "\tword:\t\t00-02 : MAC Address\n" + "\t\t\t03-07 : DM9000 Configuration\n" + "\t\t\t08-63 : User data\n"); diff --git a/board/trizepsiv/lowlevel_init.S b/board/trizepsiv/lowlevel_init.S new file mode 100644 index 0000000000..d8869381ac --- /dev/null +++ b/board/trizepsiv/lowlevel_init.S @@ -0,0 +1,503 @@ +/* + * This was originally from the Lubbock u-boot port. + * + * Most of this taken from Redboot hal_platform_setup.h with cleanup + * + * NOTE: I haven't clean this up considerably, just enough to get it + * running. See hal_platform_setup.h for the source. See + * board/cradle/lowlevel_init.S for another PXA250 setup that is + * much cleaner. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +/* wait for coprocessor write complete */ + .macro CPWAIT reg + mrc p15,0,\reg,c2,c0,0 + mov \reg,\reg + sub pc,pc,#4 + .endm + + +/* + * Memory setup + */ + +.globl lowlevel_init +lowlevel_init: + + /* Set up GPIO pins first ----------------------------------------- */ + + ldr r0, =GPSR0 + ldr r1, =CFG_GPSR0_VAL + str r1, [r0] + + ldr r0, =GPSR1 + ldr r1, =CFG_GPSR1_VAL + str r1, [r0] + + ldr r0, =GPSR2 + ldr r1, =CFG_GPSR2_VAL + str r1, [r0] + + ldr r0, =GPSR3 + ldr r1, =CFG_GPSR3_VAL + str r1, [r0] + + ldr r0, =GPCR0 + ldr r1, =CFG_GPCR0_VAL + str r1, [r0] + + ldr r0, =GPCR1 + ldr r1, =CFG_GPCR1_VAL + str r1, [r0] + + ldr r0, =GPCR2 + ldr r1, =CFG_GPCR2_VAL + str r1, [r0] + + ldr r0, =GPCR3 + ldr r1, =CFG_GPCR3_VAL + str r1, [r0] + + ldr r0, =GRER0 + ldr r1, =CFG_GRER0_VAL + str r1, [r0] + + ldr r0, =GRER1 + ldr r1, =CFG_GRER1_VAL + str r1, [r0] + + ldr r0, =GRER2 + ldr r1, =CFG_GRER2_VAL + str r1, [r0] + + ldr r0, =GRER3 + ldr r1, =CFG_GRER3_VAL + str r1, [r0] + + ldr r0, =GFER0 + ldr r1, =CFG_GFER0_VAL + str r1, [r0] + + ldr r0, =GFER1 + ldr r1, =CFG_GFER1_VAL + str r1, [r0] + + ldr r0, =GFER2 + ldr r1, =CFG_GFER2_VAL + str r1, [r0] + + ldr r0, =GFER3 + ldr r1, =CFG_GFER3_VAL + str r1, [r0] + + ldr r0, =GPDR0 + ldr r1, =CFG_GPDR0_VAL + str r1, [r0] + + ldr r0, =GPDR1 + ldr r1, =CFG_GPDR1_VAL + str r1, [r0] + + ldr r0, =GPDR2 + ldr r1, =CFG_GPDR2_VAL + str r1, [r0] + + ldr r0, =GPDR3 + ldr r1, =CFG_GPDR3_VAL + str r1, [r0] + + ldr r0, =GAFR0_L + ldr r1, =CFG_GAFR0_L_VAL + str r1, [r0] + + ldr r0, =GAFR0_U + ldr r1, =CFG_GAFR0_U_VAL + str r1, [r0] + + ldr r0, =GAFR1_L + ldr r1, =CFG_GAFR1_L_VAL + str r1, [r0] + + ldr r0, =GAFR1_U + ldr r1, =CFG_GAFR1_U_VAL + str r1, [r0] + + ldr r0, =GAFR2_L + ldr r1, =CFG_GAFR2_L_VAL + str r1, [r0] + + ldr r0, =GAFR2_U + ldr r1, =CFG_GAFR2_U_VAL + str r1, [r0] + + ldr r0, =GAFR3_L + ldr r1, =CFG_GAFR3_L_VAL + str r1, [r0] + + ldr r0, =GAFR3_U + ldr r1, =CFG_GAFR3_U_VAL + str r1, [r0] + + ldr r0, =PSSR /* enable GPIO pins */ + ldr r1, =CFG_PSSR_VAL + str r1, [r0] + + /* ---------------------------------------------------------------- */ + /* Enable memory interface */ + /* */ + /* The sequence below is based on the recommended init steps */ + /* detailed in the Intel PXA250 Operating Systems Developers Guide, */ + /* Chapter 10. */ + /* ---------------------------------------------------------------- */ + + /* ---------------------------------------------------------------- */ + /* Step 1: Wait for at least 200 microsedonds to allow internal */ + /* clocks to settle. Only necessary after hard reset... */ + /* FIXME: can be optimized later */ + /* ---------------------------------------------------------------- */ + + ldr r3, =OSCR /* reset the OS Timer Count to zero */ + mov r2, #0 + str r2, [r3] + ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ + /* so 0x300 should be plenty */ +1: + ldr r2, [r3] + cmp r4, r2 + bgt 1b + +mem_init: + + ldr r1, =MEMC_BASE /* get memory controller base addr. */ + + /* ---------------------------------------------------------------- */ + /* Step 2a: Initialize Asynchronous static memory controller */ + /* ---------------------------------------------------------------- */ + + /* MSC registers: timing, bus width, mem type */ + + /* MSC0: nCS(0,1) */ + ldr r2, =CFG_MSC0_VAL + str r2, [r1, #MSC0_OFFSET] + ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ + /* that data latches */ + /* MSC1: nCS(2,3) */ + ldr r2, =CFG_MSC1_VAL + str r2, [r1, #MSC1_OFFSET] + ldr r2, [r1, #MSC1_OFFSET] + + /* MSC2: nCS(4,5) */ + ldr r2, =CFG_MSC2_VAL + str r2, [r1, #MSC2_OFFSET] + ldr r2, [r1, #MSC2_OFFSET] + + /* ---------------------------------------------------------------- */ + /* Step 2b: Initialize Card Interface */ + /* ---------------------------------------------------------------- */ + + /* MECR: Memory Expansion Card Register */ + ldr r2, =CFG_MECR_VAL + str r2, [r1, #MECR_OFFSET] + ldr r2, [r1, #MECR_OFFSET] + + /* MCMEM0: Card Interface slot 0 timing */ + ldr r2, =CFG_MCMEM0_VAL + str r2, [r1, #MCMEM0_OFFSET] + ldr r2, [r1, #MCMEM0_OFFSET] + + /* MCMEM1: Card Interface slot 1 timing */ + ldr r2, =CFG_MCMEM1_VAL + str r2, [r1, #MCMEM1_OFFSET] + ldr r2, [r1, #MCMEM1_OFFSET] + + /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ + ldr r2, =CFG_MCATT0_VAL + str r2, [r1, #MCATT0_OFFSET] + ldr r2, [r1, #MCATT0_OFFSET] + + /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ + ldr r2, =CFG_MCATT1_VAL + str r2, [r1, #MCATT1_OFFSET] + ldr r2, [r1, #MCATT1_OFFSET] + + /* MCIO0: Card Interface I/O Space Timing, slot 0 */ + ldr r2, =CFG_MCIO0_VAL + str r2, [r1, #MCIO0_OFFSET] + ldr r2, [r1, #MCIO0_OFFSET] + + /* MCIO1: Card Interface I/O Space Timing, slot 1 */ + ldr r2, =CFG_MCIO1_VAL + str r2, [r1, #MCIO1_OFFSET] + ldr r2, [r1, #MCIO1_OFFSET] + + /* ---------------------------------------------------------------- */ + /* Step 2c: Write FLYCNFG FIXME: what's that??? */ + /* ---------------------------------------------------------------- */ + ldr r2, =CFG_FLYCNFG_VAL + str r2, [r1, #FLYCNFG_OFFSET] + str r2, [r1, #FLYCNFG_OFFSET] + + /* ---------------------------------------------------------------- */ + /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ + /* ---------------------------------------------------------------- */ + + /* Before accessing MDREFR we need a valid DRI field, so we set */ + /* this to power on defaults + DRI field. */ + + ldr r4, [r1, #MDREFR_OFFSET] + ldr r2, =0xFFF + bic r4, r4, r2 + + ldr r3, =CFG_MDREFR_VAL + and r3, r3, r2 + + orr r4, r4, r3 + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + + orr r4, r4, #MDREFR_K0RUN + orr r4, r4, #MDREFR_K0DB4 + orr r4, r4, #MDREFR_K0FREE + orr r4, r4, #MDREFR_K0DB2 + orr r4, r4, #MDREFR_K1DB2 + bic r4, r4, #MDREFR_K1FREE + bic r4, r4, #MDREFR_K2FREE + + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] + + /* Note: preserve the mdrefr value in r4 */ + + + /* ---------------------------------------------------------------- */ + /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */ + /* ---------------------------------------------------------------- */ + + /* Initialize SXCNFG register. Assert the enable bits */ + + /* Write SXMRS to cause an MRS command to all enabled banks of */ + /* synchronous static memory. Note that SXLCR need not be written */ + /* at this time. */ + + ldr r2, =CFG_SXCNFG_VAL + str r2, [r1, #SXCNFG_OFFSET] + + /* ---------------------------------------------------------------- */ + /* Step 4: Initialize SDRAM */ + /* ---------------------------------------------------------------- */ + + bic r4, r4, #(MDREFR_K2FREE |MDREFR_K1FREE | MDREFR_K0FREE) + + orr r4, r4, #MDREFR_K1RUN + bic r4, r4, #MDREFR_K2DB2 + str r4, [r1, #MDREFR_OFFSET] + ldr r4, [r1, #MDREFR_OFFSET] + + bic r4, r4, #MDREFR_SLFRSH + str r4, [r1, #MDREFR_OFFSET] + ldr r4, [r1, #MDREFR_OFFSET] + + orr r4, r4, #MDREFR_E1PIN + str r4, [r1, #MDREFR_OFFSET] + ldr r4, [r1, #MDREFR_OFFSET] + + nop + nop + + + /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ + /* configure but not enable each SDRAM partition pair. */ + + ldr r4, =CFG_MDCNFG_VAL + bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) + bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3) + + str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ + ldr r4, [r1, #MDCNFG_OFFSET] + + + /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ + /* 100..200 µsec. */ + + ldr r3, =OSCR /* reset the OS Timer Count to zero */ + mov r2, #0 + str r2, [r3] + ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ + /* so 0x300 should be plenty */ +1: + ldr r2, [r3] + cmp r4, r2 + bgt 1b + + + /* Step 4f: Trigger a number (usually 8) refresh cycles by */ + /* attempting non-burst read or write accesses to disabled */ + /* SDRAM, as commonly specified in the power up sequence */ + /* documented in SDRAM data sheets. The address(es) used */ + /* for this purpose must not be cacheable. */ + + ldr r3, =CFG_DRAM_BASE + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + + + /* Step 4g: Write MDCNFG with enable bits asserted */ + /* (MDCNFG:DEx set to 1). */ + + ldr r3, [r1, #MDCNFG_OFFSET] + mov r4, r3 + orr r3, r3, #MDCNFG_DE0 + str r3, [r1, #MDCNFG_OFFSET] + mov r0, r3 + + /* Step 4h: Write MDMRS. */ + + ldr r2, =CFG_MDMRS_VAL + str r2, [r1, #MDMRS_OFFSET] + + /* enable APD */ + ldr r3, [r1, #MDREFR_OFFSET] + orr r3, r3, #MDREFR_APD + str r3, [r1, #MDREFR_OFFSET] + + /* We are finished with Intel's memory controller initialisation */ + + +setvoltage: + + mov r10, lr + bl initPXAvoltage /* In case the board is rebooting with a */ + mov lr, r10 /* low voltage raise it up to a good one. */ + +#if 1 + b initirqs +#endif + +wakeup: + /* Are we waking from sleep? */ + ldr r0, =RCSR + ldr r1, [r0] + and r1, r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR) + str r1, [r0] + teq r1, #RCSR_SMR + + bne initirqs + + ldr r0, =PSSR + mov r1, #PSSR_PH + str r1, [r0] + + /* if so, resume at PSPR */ + ldr r0, =PSPR + ldr r1, [r0] + mov pc, r1 + + /* ---------------------------------------------------------------- */ + /* Disable (mask) all interrupts at interrupt controller */ + /* ---------------------------------------------------------------- */ + +initirqs: + + mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ + ldr r2, =ICLR + str r1, [r2] + + ldr r2, =ICMR /* mask all interrupts at the controller */ + str r1, [r2] + + /* ---------------------------------------------------------------- */ + /* Clock initialisation */ + /* ---------------------------------------------------------------- */ + +initclks: + + /* Disable the peripheral clocks, and set the core clock frequency */ + + /* Turn Off on-chip peripheral clocks (except for memory) */ + /* for re-configuration. */ + ldr r1, =CKEN + ldr r2, =CFG_CKEN + str r2, [r1] + + /* ... and write the core clock config register */ + ldr r2, =CFG_CCCR + ldr r1, =CCCR + str r2, [r1] + + /* Turn on turbo mode */ + mrc p14, 0, r2, c6, c0, 0 + orr r2, r2, #0xB /* Turbo, Fast-Bus, Freq change**/ + mcr p14, 0, r2, c6, c0, 0 + + /* Re-write MDREFR */ + ldr r1, =MEMC_BASE + ldr r2, [r1, #MDREFR_OFFSET] + str r2, [r1, #MDREFR_OFFSET] +#ifdef RTC + /* enable the 32Khz oscillator for RTC and PowerManager */ + ldr r1, =OSCC + mov r2, #OSCC_OON + str r2, [r1] + + /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ + /* has settled. */ +60: + ldr r2, [r1] + ands r2, r2, #1 + beq 60b +#else +#error "RTC not defined" +#endif + + /* Interrupt init: Mask all interrupts */ + ldr r0, =ICMR /* enable no sources */ + mov r1, #0 + str r1, [r0] + /* FIXME */ + +#ifdef NODEBUG + /*Disable software and data breakpoints */ + mov r0,#0 + mcr p15,0,r0,c14,c8,0 /* ibcr0 */ + mcr p15,0,r0,c14,c9,0 /* ibcr1 */ + mcr p15,0,r0,c14,c4,0 /* dbcon */ + + /*Enable all debug functionality */ + mov r0,#0x80000000 + mcr p14,0,r0,c10,c0,0 /* dcsr */ +#endif + + /* ---------------------------------------------------------------- */ + /* End lowlevel_init */ + /* ---------------------------------------------------------------- */ + +endlowlevel_init: + + mov pc, lr diff --git a/board/trizepsiv/pxavoltage.S b/board/trizepsiv/pxavoltage.S new file mode 100644 index 0000000000..9659c2b021 --- /dev/null +++ b/board/trizepsiv/pxavoltage.S @@ -0,0 +1,29 @@ +/* + * (C) Copyright 2007 + * Stefano Babic, DENX Gmbh, sbabic@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + + .global initPXAvoltage + +initPXAvoltage: + mov pc, lr diff --git a/board/trizepsiv/u-boot.lds b/board/trizepsiv/u-boot.lds new file mode 100644 index 0000000000..f0102391b3 --- /dev/null +++ b/board/trizepsiv/u-boot.lds @@ -0,0 +1,56 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/pxa/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index bcb927fd10..6ebedfbc83 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -817,27 +817,34 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int i; /* skip kernel length, initrd length, and terminator */ - of_data = (ulong)(&len_ptr[3]); + of_flat_tree = (char *)(&len_ptr[3]); /* skip any additional image length fields */ for (i=2; len_ptr[i]; ++i) - of_data += 4; + of_flat_tree += 4; /* add kernel length, and align */ - of_data += ntohl(len_ptr[0]); + of_flat_tree += ntohl(len_ptr[0]); if (tail) { - of_data += 4 - tail; + of_flat_tree += 4 - tail; } /* add initrd length, and align */ tail = ntohl(len_ptr[1]) % 4; - of_data += ntohl(len_ptr[1]); + of_flat_tree += ntohl(len_ptr[1]); if (tail) { - of_data += 4 - tail; + of_flat_tree += 4 - tail; } +#ifndef CFG_NO_FLASH + /* move the blob if it is in flash (set of_data to !null) */ + if (addr2info ((ulong)of_flat_tree) != NULL) + of_data = (ulong)of_flat_tree; +#endif + + #if defined(CONFIG_OF_FLAT_TREE) - if (*((ulong *)(of_flat_tree + sizeof(image_header_t))) != OF_DT_HEADER) { + if (*((ulong *)(of_flat_tree)) != OF_DT_HEADER) { #else - if (fdt_check_header(of_flat_tree + sizeof(image_header_t)) != 0) { + if (fdt_check_header (of_flat_tree) != 0) { #endif puts ("ERROR: image is not a fdt - " "must RESET the board to recover.\n"); @@ -845,9 +852,11 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, } #if defined(CONFIG_OF_FLAT_TREE) - if (((struct boot_param_header *)of_data)->totalsize != ntohl(len_ptr[2])) { + if (((struct boot_param_header *)of_flat_tree)->totalsize != + ntohl (len_ptr[2])) { #else - if (be32_to_cpu(fdt_totalsize(of_data)) != ntohl(len_ptr[2])) { + if (be32_to_cpu (fdt_totalsize (of_flat_tree)) != + ntohl(len_ptr[2])) { #endif puts ("ERROR: fdt size != image size - " "must RESET the board to recover.\n"); @@ -957,34 +966,37 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, "must RESET the board to recover.\n"); do_reset (cmdtp, flag, argc, argv); } + puts ("OK\n"); } /* * Add the chosen node if it doesn't exist, add the env and bd_t * if the user wants it (the logic is in the subroutines). */ - if (fdt_chosen(of_flat_tree, initrd_start, initrd_end, 0) < 0) { - puts ("ERROR: /chosen node create failed - " - "must RESET the board to recover.\n"); - do_reset (cmdtp, flag, argc, argv); - } + if (of_flat_tree) { + if (fdt_chosen(of_flat_tree, initrd_start, initrd_end, 0) < 0) { + puts ("ERROR: /chosen node create failed - " + "must RESET the board to recover.\n"); + do_reset (cmdtp, flag, argc, argv); + } #ifdef CONFIG_OF_HAS_UBOOT_ENV - if (fdt_env(of_flat_tree) < 0) { - puts ("ERROR: /u-boot-env node create failed - " - "must RESET the board to recover.\n"); - do_reset (cmdtp, flag, argc, argv); - } + if (fdt_env(of_flat_tree) < 0) { + puts ("ERROR: /u-boot-env node create failed - " + "must RESET the board to recover.\n"); + do_reset (cmdtp, flag, argc, argv); + } #endif #ifdef CONFIG_OF_HAS_BD_T - if (fdt_bd_t(of_flat_tree) < 0) { - puts ("ERROR: /bd_t node create failed - " - "must RESET the board to recover.\n"); - do_reset (cmdtp, flag, argc, argv); - } + if (fdt_bd_t(of_flat_tree) < 0) { + puts ("ERROR: /bd_t node create failed - " + "must RESET the board to recover.\n"); + do_reset (cmdtp, flag, argc, argv); + } #endif #ifdef CONFIG_OF_BOARD_SETUP - /* Call the board-specific fixup routine */ - ft_board_setup(of_flat_tree, gd->bd); + /* Call the board-specific fixup routine */ + ft_board_setup(of_flat_tree, gd->bd); #endif + } #endif /* CONFIG_OF_LIBFDT */ #if defined(CONFIG_OF_FLAT_TREE) #ifdef CFG_BOOTMAPSZ @@ -1011,6 +1023,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, printf (" Loading Device Tree to %08lx, end %08lx ... ", of_start, of_start + of_len - 1); memmove ((void *)of_start, (void *)of_data, of_len); + puts ("OK\n"); } /* * Create the /chosen node and modify the blob with board specific diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c index 3fc4fca9ae..cce23ad70d 100644 --- a/common/cmd_fpga.c +++ b/common/cmd_fpga.c @@ -60,6 +60,7 @@ static int fpga_get_op (char *opstr); /* Convert bitstream data and load into the fpga */ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) { +#if (CONFIG_FPGA & CFG_FPGA_XILINX) unsigned int length; unsigned char* swapdata; unsigned int swapsize; @@ -72,7 +73,6 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) dataptr = (unsigned char *)fpgadata; -#if CFG_FPGA_XILINX /* skip the first bytes of the bitsteam, their meaning is unknown */ length = (*dataptr << 8) + *(dataptr+1); dataptr+=2; diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 89fefed33d..bb064eaa04 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -31,6 +31,7 @@ #include #include #include +#include #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA) # include @@ -128,8 +129,6 @@ ulong ide_bus_offset[CFG_IDE_MAXBUS] = { }; -#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)]) - #ifndef CONFIG_AMIGAONEG3SE static int ide_bus_ok[CFG_IDE_MAXBUS]; #else @@ -172,8 +171,8 @@ static uchar ide_wait (int dev, ulong t); #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */ -static void __inline__ ide_outb(int dev, int port, unsigned char val); -static unsigned char __inline__ ide_inb(int dev, int port); +void inline ide_outb(int dev, int port, unsigned char val); +unsigned char inline ide_inb(int dev, int port); static void input_data(int dev, ulong *sect_buf, int words); static void output_data(int dev, ulong *sect_buf, int words); static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len); @@ -805,45 +804,27 @@ set_pcmcia_timing (int pmode) /* ------------------------------------------------------------------------- */ -#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) -static void __inline__ -ide_outb(int dev, int port, unsigned char val) +void inline +__ide_outb(int dev, int port, unsigned char val) { debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", - dev, port, val, (ATA_CURR_BASE(dev)+port)); - - /* Ensure I/O operations complete */ - EIEIO; - *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))) = val; -} -#else /* ! __PPC__ */ -static void __inline__ -ide_outb(int dev, int port, unsigned char val) -{ - outb(val, ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)); + dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); + outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); } -#endif /* __PPC__ */ - +void inline ide_outb (int dev, int port, unsigned char val) + __attribute__((weak, alias("__ide_outb"))); -#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) -static unsigned char __inline__ -ide_inb(int dev, int port) +unsigned char inline +__ide_inb(int dev, int port) { uchar val; - /* Ensure I/O operations complete */ - EIEIO; - val = *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); + val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", - dev, port, (ATA_CURR_BASE(dev)+port), val); - return (val); + dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val); + return val; } -#else /* ! __PPC__ */ -static unsigned char __inline__ -ide_inb(int dev, int port) -{ - return inb(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)); -} -#endif /* __PPC__ */ +unsigned char inline ide_inb(int dev, int port) + __attribute__((weak, alias("__ide_inb"))); #ifdef __PPC__ # ifdef CONFIG_AMIGAONEG3SE diff --git a/common/cmd_nand.c b/common/cmd_nand.c index 254a7755fc..1fdd7a67f6 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -161,7 +161,11 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) ulong addr, off, size; char *cmd, *s; nand_info_t *nand; +#ifdef CFG_NAND_QUIET + int quiet = CFG_NAND_QUIET; +#else int quiet = 0; +#endif const char *quiet_str = getenv("quiet"); /* at least two arguments please */ @@ -452,7 +456,7 @@ U_BOOT_CMD(nand, 5, 1, do_nand, "info - show available NAND devices\n" "nand device [dev] - show or set current device\n" "nand read[.jffs2] - addr off|partition size\n" - "nand write[.jffs2] - addr off|partiton size - read/write `size' bytes starting\n" + "nand write[.jffs2] - addr off|partition size - read/write `size' bytes starting\n" " at offset `off' to/from memory address `addr'\n" "nand erase [clean] [off size] - erase `size' bytes from\n" " offset `off' (entire device if not specified)\n" diff --git a/common/env_flash.c b/common/env_flash.c index 7a37e550de..eccfb62a3b 100644 --- a/common/env_flash.c +++ b/common/env_flash.c @@ -107,13 +107,6 @@ int env_init(void) ulong addr1 = (ulong)&(flash_addr->data); ulong addr2 = (ulong)&(flash_addr_new->data); -#ifdef CONFIG_OMAP2420H4 - int flash_probe(void); - - if(flash_probe() == 0) - goto bad_flash; -#endif - crc1_ok = (crc32(0, flash_addr->data, ENV_SIZE) == flash_addr->crc); crc2_ok = (crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc); @@ -143,9 +136,6 @@ int env_init(void) gd->env_valid = 2; } -#ifdef CONFIG_OMAP2420H4 -bad_flash: -#endif return (0); } @@ -259,20 +249,12 @@ Done: int env_init(void) { -#ifdef CONFIG_OMAP2420H4 - int flash_probe(void); - - if(flash_probe() == 0) - goto bad_flash; -#endif if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) { gd->env_addr = (ulong)&(env_ptr->data); gd->env_valid = 1; return(0); } -#ifdef CONFIG_OMAP2420H4 -bad_flash: -#endif + gd->env_addr = (ulong)&default_environment[0]; gd->env_valid = 0; return (0); diff --git a/common/environment.c b/common/environment.c index 1d425a7309..24257f7c52 100644 --- a/common/environment.c +++ b/common/environment.c @@ -51,18 +51,7 @@ * a seperate section. Note that ENV_CRC is only defined when building * U-Boot itself. */ -#if (defined(CONFIG_CMI) || \ - defined(CONFIG_FADS) || \ - defined(CONFIG_HYMOD) || \ - defined(CONFIG_ICU862) || \ - defined(CONFIG_R360MPI) || \ - defined(CONFIG_TQM8xxL) || \ - defined(CONFIG_RRVISION) || \ - defined(CONFIG_TRAB) || \ - defined(CONFIG_PPCHAMELEONEVB) || \ - defined(CONFIG_M5271EVB) || \ - defined(CONFIG_IDMR) || \ - defined(CONFIG_NAND_U_BOOT)) && \ +#if (defined(CFG_USE_PPCENV) || defined(CONFIG_NAND_U_BOOT)) && \ defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */ /* XXX - This only works with GNU C */ # define __PPCENV__ __attribute__ ((section(".ppcenv"))) diff --git a/common/serial.c b/common/serial.c index 13e9f30e41..dee1cc0ab9 100644 --- a/common/serial.c +++ b/common/serial.c @@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR; static struct serial_device *serial_devices = NULL; static struct serial_device *serial_current = NULL; -#ifndef CONFIG_LWMON +#if !defined(CONFIG_LWMON) && !defined(CONFIG_PXA27X) struct serial_device *default_serial_console (void) { #if defined(CONFIG_8xx_CONS_SMC1) || defined(CONFIG_8xx_CONS_SMC2) @@ -65,7 +65,7 @@ struct serial_device *default_serial_console (void) } #endif -static int serial_register (struct serial_device *dev) +int serial_register (struct serial_device *dev) { dev->init += gd->reloc_off; dev->setbrg += gd->reloc_off; @@ -110,6 +110,15 @@ void serial_initialize (void) serial_register(&eserial4_device); #endif #endif /* CFG_NS16550_SERIAL */ +#if defined (CONFIG_FFUART) + serial_register(&serial_ffuart_device); +#endif +#if defined (CONFIG_BTUART) + serial_register(&serial_btuart_device); +#endif +#if defined (CONFIG_STUART) + serial_register(&serial_stuart_device); +#endif serial_assign (default_serial_console ()->name); } diff --git a/cpu/arm1136/config.mk b/cpu/arm1136/config.mk index e39e7741c1..6ab0dd35a8 100644 --- a/cpu/arm1136/config.mk +++ b/cpu/arm1136/config.mk @@ -31,4 +31,5 @@ PLATFORM_CPPFLAGS += -march=armv5 # # ========================================================================= PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) diff --git a/cpu/arm720t/serial.c b/cpu/arm720t/serial.c index 15c54af08b..27eb73ad88 100644 --- a/cpu/arm720t/serial.c +++ b/cpu/arm720t/serial.c @@ -129,8 +129,6 @@ serial_puts (const char *s) void serial_setbrg (void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned short divisor = 0; switch (gd->baudrate) { diff --git a/cpu/bf533/serial.c b/cpu/bf533/serial.c index 6cab5daac7..8ac6e3ff64 100644 --- a/cpu/bf533/serial.c +++ b/cpu/bf533/serial.c @@ -76,7 +76,6 @@ void calc_baud(void) void serial_setbrg(void) { int i; - DECLARE_GLOBAL_DATA_PTR; calc_baud(); diff --git a/cpu/bf537/i2c.c b/cpu/bf537/i2c.c index 3b0d026e0d..0daba63b68 100644 --- a/cpu/bf537/i2c.c +++ b/cpu/bf537/i2c.c @@ -22,6 +22,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #define bfin_read16(addr) ({ unsigned __v; \ __asm__ __volatile__ (\ "%0 = w[%1] (z);\n\t"\ @@ -68,7 +70,6 @@ #ifdef DEBUG_I2C #define PRINTD(fmt,args...) do { \ - DECLARE_GLOBAL_DATA_PTR; \ if (gd->have_console) \ printf(fmt ,##args); \ } while (0) diff --git a/cpu/bf537/serial.c b/cpu/bf537/serial.c index e04d08a0e7..f7a2483ffb 100644 --- a/cpu/bf537/serial.c +++ b/cpu/bf537/serial.c @@ -52,6 +52,8 @@ #include #include "serial.h" +DECLARE_GLOBAL_DATA_PTR; + unsigned long pll_div_fact; void calc_baud(void) @@ -74,7 +76,6 @@ void calc_baud(void) void serial_setbrg(void) { int i; - DECLARE_GLOBAL_DATA_PTR; calc_baud(); diff --git a/cpu/bf561/serial.c b/cpu/bf561/serial.c index 7f5c695361..bc5a4f5726 100644 --- a/cpu/bf561/serial.c +++ b/cpu/bf561/serial.c @@ -52,6 +52,8 @@ #include "serial.h" #include +DECLARE_GLOBAL_DATA_PTR; + unsigned long pll_div_fact; void calc_baud(void) @@ -74,7 +76,6 @@ void calc_baud(void) void serial_setbrg(void) { int i; - DECLARE_GLOBAL_DATA_PTR; calc_baud(); diff --git a/cpu/mcf532x/cpu.c b/cpu/mcf532x/cpu.c index 520f5d6939..2f62e956cc 100644 --- a/cpu/mcf532x/cpu.c +++ b/cpu/mcf532x/cpu.c @@ -31,6 +31,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) { volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG); @@ -48,8 +50,6 @@ int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) int checkcpu(void) { - DECLARE_GLOBAL_DATA_PTR; - volatile ccm_t *ccm = (ccm_t *) MMAP_CCM; u16 msk; u16 id = 0; diff --git a/cpu/mcf532x/speed.c b/cpu/mcf532x/speed.c index cf72609b42..001b9f42d6 100644 --- a/cpu/mcf532x/speed.c +++ b/cpu/mcf532x/speed.c @@ -30,6 +30,8 @@ #include +DECLARE_GLOBAL_DATA_PTR; + /* PLL min/max specifications */ #define MAX_FVCO 500000 /* KHz */ #define MAX_FSYS 80000 /* KHz */ @@ -208,8 +210,6 @@ int clock_pll(int fsys, int flags) */ int get_clocks(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->bus_clk = clock_pll(CFG_CLK / 1000, 0) * 1000; gd->cpu_clk = (gd->bus_clk * 3); return (0); diff --git a/cpu/mpc512x/config.mk b/cpu/mpc512x/config.mk index 8a07c5a3b6..3259d53a13 100644 --- a/cpu/mpc512x/config.mk +++ b/cpu/mpc512x/config.mk @@ -19,7 +19,7 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \ -ffixed-r2 -ffixed-r29 -msoft-float -mcpu=603e diff --git a/cpu/mpc512x/fec.c b/cpu/mpc512x/fec.c index 3c142a9e58..675b7a2e09 100644 --- a/cpu/mpc512x/fec.c +++ b/cpu/mpc512x/fec.c @@ -32,6 +32,9 @@ int fec512x_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * re int fec512x_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data); int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis); +static uchar rx_buff[FEC_BUFFER_SIZE]; +static int rx_buff_idx = 0; + /********************************************************************/ #if (DEBUG & 0x2) static void mpc512x_fec_phydump (char *devname) @@ -234,8 +237,8 @@ static int mpc512x_fec_init (struct eth_device *dev, bd_t * bis) /* Set Opcode/Pause Duration Register */ fec->eth->op_pause = 0x00010020; - /* Frame length=1518; MII mode */ - fec->eth->r_cntrl = 0x05ee000c; + /* Frame length=1522; MII mode */ + fec->eth->r_cntrl = (FEC_MAX_FRAME_LEN << 16) | 0x24; /* Half-duplex, heartbeat disabled */ fec->eth->x_cntrl = 0x00000000; @@ -245,7 +248,7 @@ static int mpc512x_fec_init (struct eth_device *dev, bd_t * bis) /* Setup recv fifo start and buff size */ fec->eth->r_fstart = 0x500; - fec->eth->r_buff_size = 0x5e0; + fec->eth->r_buff_size = FEC_BUFFER_SIZE; /* Setup BD base addresses */ fec->eth->r_des_start = (uint32)fec->bdBase->rbd; @@ -520,8 +523,7 @@ static int mpc512x_fec_recv (struct eth_device *dev) mpc512x_fec_priv *fec = (mpc512x_fec_priv *)dev->priv; volatile FEC_RBD *pRbd = &fec->bdBase->rbd[fec->rbdIndex]; unsigned long ievent; - int frame_length, len = 0; - uchar buff[FEC_MAX_PKT_SIZE]; + int frame_length = 0; #if (DEBUG & 0x1) printf ("mpc512x_fec_recv %d Start...\n", fec->rbdIndex); @@ -555,31 +557,37 @@ static int mpc512x_fec_recv (struct eth_device *dev) } if (!(pRbd->status & FEC_RBD_EMPTY)) { - if ((pRbd->status & FEC_RBD_LAST) && - !(pRbd->status & FEC_RBD_ERR) && + if (!(pRbd->status & FEC_RBD_ERR) && ((pRbd->dataLength - 4) > 14)) { /* * Get buffer size */ - frame_length = pRbd->dataLength - 4; - + if (pRbd->status & FEC_RBD_LAST) + frame_length = pRbd->dataLength - 4; + else + frame_length = pRbd->dataLength; #if (DEBUG & 0x20) { int i; - printf ("recv data hdr:"); + printf ("recv data length 0x%08x data hdr: ", + pRbd->dataLength); for (i = 0; i < 14; i++) printf ("%x ", *((uint8*)pRbd->dataPointer + i)); printf("\n"); } #endif - /* * Fill the buffer and pass it to upper layers */ - memcpy (buff, (void*)pRbd->dataPointer, frame_length); - NetReceive ((uchar*)buff, frame_length); - len = frame_length; + memcpy (&rx_buff[rx_buff_idx], (void*)pRbd->dataPointer, + frame_length - rx_buff_idx); + rx_buff_idx = frame_length; + + if (pRbd->status & FEC_RBD_LAST) { + NetReceive ((uchar*)rx_buff, frame_length); + rx_buff_idx = 0; + } } /* @@ -590,7 +598,7 @@ static int mpc512x_fec_recv (struct eth_device *dev) /* Try to fill Buffer Descriptors */ fec->eth->r_des_active = 0x01000000; /* Descriptor polling active */ - return len; + return frame_length; } /********************************************************************/ diff --git a/cpu/mpc512x/fec.h b/cpu/mpc512x/fec.h index d2d877aa52..9c38502870 100644 --- a/cpu/mpc512x/fec.h +++ b/cpu/mpc512x/fec.h @@ -164,10 +164,13 @@ typedef enum { #define FEC_RBD_NUM 32 /* The user can adjust this value */ /* packet size limit */ -#define FEC_MAX_PKT_SIZE 1536 +#define FEC_MAX_FRAME_LEN 1522 /* recommended default value */ + +/* Buffer size must be evenly divisible by 16 */ +#define FEC_BUFFER_SIZE ((FEC_MAX_FRAME_LEN + 0x10) & (~0xf)) typedef struct { - uint8 frame[FEC_MAX_PKT_SIZE]; + uint8 frame[FEC_BUFFER_SIZE]; } mpc512x_frame; typedef struct { diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c index 1eac2bbfbe..7f16b92a6c 100644 --- a/cpu/mpc5xxx/cpu.c +++ b/cpu/mpc5xxx/cpu.c @@ -29,10 +29,12 @@ #include #include #include +#include #include -#if defined(CONFIG_OF_FLAT_TREE) -#include +#if defined(CONFIG_OF_LIBFDT) +#include +#include #endif DECLARE_GLOBAL_DATA_PTR; @@ -111,29 +113,43 @@ unsigned long get_tbclk (void) /* ------------------------------------------------------------------------- */ -#ifdef CONFIG_OF_FLAT_TREE -void -ft_cpu_setup(void *blob, bd_t *bd) +#ifdef CONFIG_OF_LIBFDT +static void do_fixup(void *fdt, const char *node, const char *prop, + const void *val, int len, int create) { - u32 *p; - int len; - - /* Core XLB bus frequency */ - p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(bd->bi_busfreq); - - /* SOC peripherals use the IPB bus frequency */ - p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(bd->bi_ipbfreq); - - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@3000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); - - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@3000/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); +#if defined(DEBUG) + int i; + debug("Updating property '%s/%s' = ", node, prop); + for (i = 0; i < len; i++) + debug(" %.2x", *(u8*)(val+i)); + debug("\n"); +#endif + int rc = fdt_find_and_setprop(fdt, node, prop, val, len, create); + if (rc) + printf("Unable to update property %s:%s, err=%s\n", + node, prop, fdt_strerror(rc)); +} + +static void do_fixup_u32(void *fdt, const char *node, const char *prop, + u32 val, int create) +{ + val = cpu_to_fdt32(val); + do_fixup(fdt, node, prop, &val, sizeof(val), create); +} + +void ft_cpu_setup(void *blob, bd_t *bd) +{ + int div = in_8((void*)CFG_MBAR + 0x204) & 0x0020 ? 8 : 4; + char * cpu_path = "/cpus/" OF_CPU; + char * eth_path = "/" OF_SOC "/ethernet@3000"; + + do_fixup_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); + do_fixup_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); + do_fixup_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); + do_fixup_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipbfreq, 1); + do_fixup_u32(blob, "/" OF_SOC, "system-frequency", + bd->bi_busfreq*div, 1); + do_fixup(blob, eth_path, "mac-address", bd->bi_enetaddr, 6, 0); + do_fixup(blob, eth_path, "local-mac-address", bd->bi_enetaddr, 6, 0); } #endif diff --git a/cpu/mpc5xxx/ide.c b/cpu/mpc5xxx/ide.c index 087ddac109..df5b4acd0e 100644 --- a/cpu/mpc5xxx/ide.c +++ b/cpu/mpc5xxx/ide.c @@ -54,11 +54,19 @@ int ide_preinit (void) /* All sample codes do that... */ *(vu_long *) MPC5XXX_ATA_SHARE_COUNT = 0; +#if defined(CONFIG_UC101) + /* Configure and reset host */ + *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = + MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR; + udelay (10); + *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = 0; +#else /* Configure and reset host */ *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY | MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR; udelay (10); *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY; +#endif /* Disable prefetch on Commbus */ psdma->PtdCntrl |= 1; diff --git a/cpu/mpc5xxx/usb.c b/cpu/mpc5xxx/usb.c index ce709fc652..ed467ab3b8 100644 --- a/cpu/mpc5xxx/usb.c +++ b/cpu/mpc5xxx/usb.c @@ -27,7 +27,7 @@ #include -int usb_cpu_init() +int usb_cpu_init(void) { /* Set the USB Clock */ *(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK; @@ -41,12 +41,12 @@ int usb_cpu_init() return 0; } -int usb_cpu_stop() +int usb_cpu_stop(void) { return 0; } -int usb_cpu_init_fail() +int usb_cpu_init_fail(void) { return 0; } diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 7b9961013c..79ad20c91a 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -247,7 +247,7 @@ int cpu_init_r(void) switch (cache_ctl & 0x30000000) { case 0x20000000: if (ver == SVR_8548 || ver == SVR_8548_E || - ver == SVR_8544) { + ver == SVR_8544 || ver == SVR_8568_E) { printf ("L2 cache 512KB:"); /* set L2E=1, L2I=1, & L2SRAM=0 */ cache_ctl = 0xc0000000; diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c index c8e4666694..4f8956e0af 100644 --- a/cpu/mpc86xx/cpu_init.c +++ b/cpu/mpc86xx/cpu_init.c @@ -29,6 +29,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * Breathe some life into the CPU... * @@ -38,7 +40,6 @@ void cpu_init_f(void) { - DECLARE_GLOBAL_DATA_PTR; volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile ccsr_lbc_t *memctl = &immap->im_lbc; diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c index 312ca12827..23161ca8cb 100644 --- a/cpu/mpc86xx/speed.c +++ b/cpu/mpc86xx/speed.c @@ -29,6 +29,7 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; void get_sys_info(sys_info_t *sysInfo) { @@ -96,7 +97,6 @@ void get_sys_info(sys_info_t *sysInfo) int get_clocks(void) { - DECLARE_GLOBAL_DATA_PTR; sys_info_t sys_info; get_sys_info(&sys_info); diff --git a/cpu/mpc86xx/traps.c b/cpu/mpc86xx/traps.c index c84bfbf6aa..04c2e1331b 100644 --- a/cpu/mpc86xx/traps.c +++ b/cpu/mpc86xx/traps.c @@ -34,6 +34,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_CMD_KGDB) int (*debugger_exception_handler)(struct pt_regs *) = 0; #endif @@ -50,8 +52,6 @@ extern unsigned long search_exception_table(unsigned long); void print_backtrace(unsigned long *sp) { - DECLARE_GLOBAL_DATA_PTR; - int cnt = 0; unsigned long i; diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c index 28379298b7..282e7a1ba4 100644 --- a/cpu/ppc4xx/405gp_pci.c +++ b/cpu/ppc4xx/405gp_pci.c @@ -443,7 +443,7 @@ void pci_init_board(void) static struct pci_controller ppc440_hose = {0}; -void pci_440_init (struct pci_controller *hose) +int pci_440_init (struct pci_controller *hose) { int reg_num = 0; @@ -459,7 +459,7 @@ void pci_440_init (struct pci_controller *hose) if ((strap & SDR0_SDSTP1_PISE_MASK) == 0) { printf("PCI: SDR0_STRP1[PISE] not set.\n"); printf("PCI: Configuration aborted.\n"); - return; + return -1; } #elif defined(CONFIG_440GP) unsigned long strap; @@ -468,7 +468,7 @@ void pci_440_init (struct pci_controller *hose) if ((strap & CPC0_STRP1_PISE_MASK) == 0) { printf("PCI: CPC0_STRP1[PISE] not set.\n"); printf("PCI: Configuration aborted.\n"); - return; + return -1; } #endif #endif /* CONFIG_DISABLE_PISE_TEST */ @@ -477,7 +477,7 @@ void pci_440_init (struct pci_controller *hose) * PCI controller init *--------------------------------------------------------------------------*/ hose->first_busno = 0; - hose->last_busno = 0xff; + hose->last_busno = 0; /* PCI I/O space */ pci_set_region(hose->regions + reg_num++, @@ -515,7 +515,7 @@ void pci_440_init (struct pci_controller *hose) if (pci_pre_init (hose) == 0) { printf("PCI: Board-specific initialization failed.\n"); printf("PCI: Configuration aborted.\n"); - return; + return -1; } pci_register_hose( hose ); @@ -578,13 +578,16 @@ void pci_440_init (struct pci_controller *hose) #endif hose->last_busno = pci_hose_scan(hose); } + return hose->last_busno; } void pci_init_board(void) { - pci_440_init (&ppc440_hose); + int busno; + + busno = pci_440_init (&ppc440_hose); #if defined(CONFIG_440SPE) - pcie_setup_hoses(); + pcie_setup_hoses(busno + 1); #endif } diff --git a/cpu/ppc4xx/440spe_pcie.c b/cpu/ppc4xx/440spe_pcie.c index bf68cc1e96..158f1c5595 100644 --- a/cpu/ppc4xx/440spe_pcie.c +++ b/cpu/ppc4xx/440spe_pcie.c @@ -40,73 +40,126 @@ enum { LNKW_X8 = 0x8 }; -static inline int pcie_in_8(const volatile unsigned char __iomem *addr) +static u8* pcie_get_base(struct pci_controller *hose, unsigned int devfn) { - int ret; - - PCIE_IN(lbzx, ret, addr); + u8 *base = (u8*)hose->cfg_data; + + /* use local configuration space for the first bus */ + if (PCI_BUS(devfn) == 0) { + if (hose->cfg_data == (u8*)CFG_PCIE0_CFGBASE) + base = (u8*)CFG_PCIE0_XCFGBASE; + if (hose->cfg_data == (u8*)CFG_PCIE1_CFGBASE) + base = (u8*)CFG_PCIE1_XCFGBASE; + if (hose->cfg_data == (u8*)CFG_PCIE2_CFGBASE) + base = (u8*)CFG_PCIE2_XCFGBASE; + } - return ret; + return base; } -static inline int pcie_in_le16(const volatile unsigned short __iomem *addr) +static void pcie_dmer_disable(void) { - int ret; - - PCIE_IN(lhbrx, ret, addr) - - return ret; + mtdcr (DCRN_PEGPL_CFG(DCRN_PCIE0_BASE), + mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE0_BASE)) | GPL_DMER_MASK_DISA); + mtdcr (DCRN_PEGPL_CFG(DCRN_PCIE1_BASE), + mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE1_BASE)) | GPL_DMER_MASK_DISA); + mtdcr (DCRN_PEGPL_CFG(DCRN_PCIE2_BASE), + mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE2_BASE)) | GPL_DMER_MASK_DISA); } -static inline unsigned pcie_in_le32(const volatile unsigned __iomem *addr) +static void pcie_dmer_enable(void) { - unsigned ret; - - PCIE_IN(lwbrx, ret, addr); - - return ret; + mtdcr (DCRN_PEGPL_CFG (DCRN_PCIE0_BASE), + mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE0_BASE)) & ~GPL_DMER_MASK_DISA); + mtdcr (DCRN_PEGPL_CFG (DCRN_PCIE1_BASE), + mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE1_BASE)) & ~GPL_DMER_MASK_DISA); + mtdcr (DCRN_PEGPL_CFG (DCRN_PCIE2_BASE), + mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE2_BASE)) & ~GPL_DMER_MASK_DISA); } - static int pcie_read_config(struct pci_controller *hose, unsigned int devfn, int offset, int len, u32 *val) { + u8 *address; *val = 0; + + /* + * Bus numbers are relative to hose->first_busno + */ + devfn -= PCI_BDF(hose->first_busno, 0, 0); + /* - * 440SPE implements only one function per port + * NOTICE: configuration space ranges are currenlty mapped only for + * the first 16 buses, so such limit must be imposed. In case more + * buses are required the TLB settings in board/amcc//init.S + * need to be altered accordingly (one bus takes 1 MB of memory space). */ - if (!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 1))) + if (PCI_BUS(devfn) >= 16) return 0; - devfn = PCI_BDF(0,0,0); + /* + * Only single device/single function is supported for the primary and + * secondary buses of the 440SPe host bridge. + */ + if ((!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 0))) && + ((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1))) + return 0; + + address = pcie_get_base(hose, devfn); offset += devfn << 4; + /* + * Reading from configuration space of non-existing device can + * generate transaction errors. For the read duration we suppress + * assertion of machine check exceptions to avoid those. + */ + pcie_dmer_disable (); + switch (len) { case 1: - *val = pcie_in_8(hose->cfg_data + offset); + *val = in_8(hose->cfg_data + offset); break; case 2: - *val = pcie_in_le16((u16 *)(hose->cfg_data + offset)); + *val = in_le16((u16 *)(hose->cfg_data + offset)); break; default: - *val = pcie_in_le32((u32*)(hose->cfg_data + offset)); + *val = in_le32((u32*)(hose->cfg_data + offset)); break; } + + pcie_dmer_enable (); + return 0; } static int pcie_write_config(struct pci_controller *hose, unsigned int devfn, int offset, int len, u32 val) { + u8 *address; + + /* + * Bus numbers are relative to hose->first_busno + */ + devfn -= PCI_BDF(hose->first_busno, 0, 0); + /* - * 440SPE implements only one function per port + * Same constraints as in pcie_read_config(). */ - if (!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 1))) + if (PCI_BUS(devfn) >= 16) return 0; - devfn = PCI_BDF(0,0,0); + if ((!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 0))) && + ((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1))) + return 0; + + address = pcie_get_base(hose, devfn); offset += devfn << 4; + /* + * Suppress MCK exceptions, similar to pcie_read_config() + */ + pcie_dmer_disable (); + switch (len) { case 1: out_8(hose->cfg_data + offset, val); @@ -118,6 +171,9 @@ static int pcie_write_config(struct pci_controller *hose, unsigned int devfn, out_le32((u32 *)(hose->cfg_data + offset), val); break; } + + pcie_dmer_enable (); + return 0; } @@ -126,7 +182,7 @@ int pcie_read_config_byte(struct pci_controller *hose,pci_dev_t dev,int offset,u u32 v; int rv; - rv = pcie_read_config(hose, dev, offset, 1, &v); + rv = pcie_read_config(hose, dev, offset, 1, &v); *val = (u8)v; return rv; } @@ -783,12 +839,12 @@ void ppc440spe_setup_pcie_rootpoint(struct pci_controller *hose, int port) volatile void *rmbase = NULL; pci_set_ops(hose, - pcie_read_config_byte, - pcie_read_config_word, - pcie_read_config_dword, - pcie_write_config_byte, - pcie_write_config_word, - pcie_write_config_dword); + pcie_read_config_byte, + pcie_read_config_word, + pcie_read_config_dword, + pcie_write_config_byte, + pcie_write_config_word, + pcie_write_config_dword); switch (port) { case 0: @@ -811,14 +867,9 @@ void ppc440spe_setup_pcie_rootpoint(struct pci_controller *hose, int port) /* * Set bus numbers on our root port */ - if (ppc440spe_revB()) { - out_8((u8 *)mbase + PCI_PRIMARY_BUS, 0); - out_8((u8 *)mbase + PCI_SECONDARY_BUS, 1); - out_8((u8 *)mbase + PCI_SUBORDINATE_BUS, 1); - } else { - out_8((u8 *)mbase + PCI_PRIMARY_BUS, 0); - out_8((u8 *)mbase + PCI_SECONDARY_BUS, 0); - } + out_8((u8 *)mbase + PCI_PRIMARY_BUS, 0); + out_8((u8 *)mbase + PCI_SECONDARY_BUS, 1); + out_8((u8 *)mbase + PCI_SUBORDINATE_BUS, 1); /* * Set up outbound translation to hose->mem_space from PLB @@ -875,6 +926,29 @@ void ppc440spe_setup_pcie_rootpoint(struct pci_controller *hose, int port) in_le16((u16 *)(mbase + PCI_COMMAND)) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); printf("PCIE:%d successfully set as rootpoint\n",port); + + /* Set Device and Vendor Id */ + switch (port) { + case 0: + out_le16(mbase + 0x200, 0xaaa0); + out_le16(mbase + 0x202, 0xbed0); + break; + case 1: + out_le16(mbase + 0x200, 0xaaa1); + out_le16(mbase + 0x202, 0xbed1); + break; + case 2: + out_le16(mbase + 0x200, 0xaaa2); + out_le16(mbase + 0x202, 0xbed2); + break; + default: + out_le16(mbase + 0x200, 0xaaa3); + out_le16(mbase + 0x202, 0xbed3); + } + + /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */ + out_le32(mbase + 0x208, 0x06040001); + } int ppc440spe_setup_pcie_endpoint(struct pci_controller *hose, int port) @@ -952,8 +1026,8 @@ int ppc440spe_setup_pcie_endpoint(struct pci_controller *hose, int port) /* Enable I/O, Mem, and Busmaster cycles */ out_le16((u16 *)(mbase + PCI_COMMAND), - in_le16((u16 *)(mbase + PCI_COMMAND)) | - PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + in_le16((u16 *)(mbase + PCI_COMMAND)) | + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); out_le16(mbase + 0x200,0xcaad); /* Setting vendor ID */ out_le16(mbase + 0x202,0xfeed); /* Setting device ID */ attempts = 10; diff --git a/cpu/ppc4xx/440spe_pcie.h b/cpu/ppc4xx/440spe_pcie.h index eb7cecf82f..38745eb797 100644 --- a/cpu/ppc4xx/440spe_pcie.h +++ b/cpu/ppc4xx/440spe_pcie.h @@ -38,6 +38,7 @@ #define DCRN_PEGPL_REGBAL(base) (base + 0x13) #define DCRN_PEGPL_REGMSK(base) (base + 0x14) #define DCRN_PEGPL_SPECIAL(base) (base + 0x15) +#define DCRN_PEGPL_CFG(base) (base + 0x16) /* * System DCRs (SDRs) @@ -161,20 +162,7 @@ mtdcr(DCRN_SDR0_CFGADDR, offset); \ mtdcr(DCRN_SDR0_CFGDATA,data);}) -#define PCIE_IN(opcode, ret, addr) \ - __asm__ __volatile__( \ - "sync\n" \ - #opcode " %0,0,%1\n" \ - "1: twi 0,%0,0\n" \ - "isync\n" \ - "b 3f\n" \ - "2: li %0,-1\n" \ - "3:\n" \ - ".section __ex_table,\"a\"\n" \ - ".balign 4\n" \ - ".long 1b,2b\n" \ - ".previous\n" \ - : "=r" (ret) : "r" (addr), "m" (*addr)); +#define GPL_DMER_MASK_DISA 0x02000000 int ppc440spe_init_pcie(void); int ppc440spe_init_pcie_rootport(int port); diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c index f5365cb76a..38b6f89555 100644 --- a/cpu/ppc4xx/traps.c +++ b/cpu/ppc4xx/traps.c @@ -151,12 +151,6 @@ MachineCheckException(struct pt_regs *regs) int uncorr_ecc = 0; #endif - /* Probing PCI(E) using config cycles may cause this exception - * when a device is not present. To gracefully recover in such - * scenarios config read/write routines need to be instrumented in - * order to return via fixup handler. For examples refer to - * pcie_in_8(), pcie_in_le16() and pcie_in_le32() - */ if ((fixup = search_exception_table(regs->nip)) != 0) { regs->nip = fixup; val = mfspr(MCSR); diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c index cb3a478990..51e7f65887 100644 --- a/cpu/pxa/serial.c +++ b/cpu/pxa/serial.c @@ -30,11 +30,28 @@ #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; -void serial_setbrg (void) +#define FFUART 0 +#define BTUART 1 +#define STUART 2 + +#ifndef CONFIG_SERIAL_MULTI +#if defined (CONFIG_FFUART) +#define UART_INDEX FFUART +#elif defined (CONFIG_BTUART) +#define UART_INDEX BTUART +#elif defined (CONFIG_STUART) +#define UART_INDEX STUART +#else +#error "Bad: you didn't configure serial ..." +#endif +#endif + +void pxa_setbrg_dev (unsigned int uart_index) { unsigned int quot = 0; @@ -53,63 +70,68 @@ void serial_setbrg (void) else hang (); -#ifdef CONFIG_FFUART + switch (uart_index) { + case FFUART: #ifdef CONFIG_CPU_MONAHANS - CKENA |= CKENA_22_FFUART; + CKENA |= CKENA_22_FFUART; #else - CKEN |= CKEN6_FFUART; + CKEN |= CKEN6_FFUART; #endif /* CONFIG_CPU_MONAHANS */ - FFIER = 0; /* Disable for now */ - FFFCR = 0; /* No fifos enabled */ + FFIER = 0; /* Disable for now */ + FFFCR = 0; /* No fifos enabled */ - /* set baud rate */ - FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB; - FFDLL = quot & 0xff; - FFDLH = quot >> 8; - FFLCR = LCR_WLS0 | LCR_WLS1; + /* set baud rate */ + FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB; + FFDLL = quot & 0xff; + FFDLH = quot >> 8; + FFLCR = LCR_WLS0 | LCR_WLS1; - FFIER = IER_UUE; /* Enable FFUART */ + FFIER = IER_UUE; /* Enable FFUART */ + break; -#elif defined(CONFIG_BTUART) + case BTUART: #ifdef CONFIG_CPU_MONAHANS - CKENA |= CKENA_21_BTUART; + CKENA |= CKENA_21_BTUART; #else - CKEN |= CKEN7_BTUART; + CKEN |= CKEN7_BTUART; #endif /* CONFIG_CPU_MONAHANS */ - BTIER = 0; - BTFCR = 0; + BTIER = 0; + BTFCR = 0; - /* set baud rate */ - BTLCR = LCR_DLAB; - BTDLL = quot & 0xff; - BTDLH = quot >> 8; - BTLCR = LCR_WLS0 | LCR_WLS1; + /* set baud rate */ + BTLCR = LCR_DLAB; + BTDLL = quot & 0xff; + BTDLH = quot >> 8; + BTLCR = LCR_WLS0 | LCR_WLS1; - BTIER = IER_UUE; /* Enable BFUART */ + BTIER = IER_UUE; /* Enable BFUART */ -#elif defined(CONFIG_STUART) + break; + + case STUART: #ifdef CONFIG_CPU_MONAHANS - CKENA |= CKENA_23_STUART; + CKENA |= CKENA_23_STUART; #else - CKEN |= CKEN5_STUART; + CKEN |= CKEN5_STUART; #endif /* CONFIG_CPU_MONAHANS */ - STIER = 0; - STFCR = 0; + STIER = 0; + STFCR = 0; - /* set baud rate */ - STLCR = LCR_DLAB; - STDLL = quot & 0xff; - STDLH = quot >> 8; - STLCR = LCR_WLS0 | LCR_WLS1; + /* set baud rate */ + STLCR = LCR_DLAB; + STDLL = quot & 0xff; + STDLH = quot >> 8; + STLCR = LCR_WLS0 | LCR_WLS1; - STIER = IER_UUE; /* Enable STUART */ + STIER = IER_UUE; /* Enable STUART */ + break; -#else -#error "Bad: you didn't configure serial ..." -#endif + default: + hang(); + } } @@ -118,9 +140,9 @@ void serial_setbrg (void) * are always 8 data bits, no parity, 1 stop bit, no start bits. * */ -int serial_init (void) +int pxa_init_dev (unsigned int uart_index) { - serial_setbrg (); + pxa_setbrg_dev (uart_index); return (0); } @@ -129,26 +151,32 @@ int serial_init (void) /* * Output a single byte to the serial port. */ -void serial_putc (const char c) -{ -#ifdef CONFIG_FFUART - /* wait for room in the tx FIFO on FFUART */ - while ((FFLSR & LSR_TEMT) == 0) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - FFTHR = c; -#elif defined(CONFIG_BTUART) - while ((BTLSR & LSR_TEMT ) == 0 ) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - BTTHR = c; -#elif defined(CONFIG_STUART) - while ((STLSR & LSR_TEMT ) == 0 ) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - STTHR = c; -#endif +void pxa_putc_dev (unsigned int uart_index,const char c) +{ + switch (uart_index) { + case FFUART: + /* wait for room in the tx FIFO on FFUART */ + while ((FFLSR & LSR_TEMT) == 0) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + FFTHR = c; + break; + + case BTUART: + while ((BTLSR & LSR_TEMT ) == 0 ) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + BTTHR = c; + break; + + case STUART: + while ((STLSR & LSR_TEMT ) == 0 ) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + STTHR = c; + break; + } /* If \n, also do \r */ if (c == '\n') - serial_putc ('\r'); + pxa_putc_dev (uart_index,'\r'); } /* @@ -156,15 +184,17 @@ void serial_putc (const char c) * otherwise. When the function is succesfull, the character read is * written into its argument c. */ -int serial_tstc (void) -{ -#ifdef CONFIG_FFUART - return FFLSR & LSR_DR; -#elif defined(CONFIG_BTUART) - return BTLSR & LSR_DR; -#elif defined(CONFIG_STUART) - return STLSR & LSR_DR; -#endif +int pxa_tstc_dev (unsigned int uart_index) +{ + switch (uart_index) { + case FFUART: + return FFLSR & LSR_DR; + case BTUART: + return BTLSR & LSR_DR; + case STUART: + return STLSR & LSR_DR; + } + return -1; } /* @@ -172,27 +202,184 @@ int serial_tstc (void) * otherwise. When the function is succesfull, the character read is * written into its argument c. */ -int serial_getc (void) -{ -#ifdef CONFIG_FFUART - while (!(FFLSR & LSR_DR)) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - return (char) FFRBR & 0xff; -#elif defined(CONFIG_BTUART) - while (!(BTLSR & LSR_DR)) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - return (char) BTRBR & 0xff; -#elif defined(CONFIG_STUART) - while (!(STLSR & LSR_DR)) - WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ - return (char) STRBR & 0xff; -#endif +int pxa_getc_dev (unsigned int uart_index) +{ + switch (uart_index) { + case FFUART: + while (!(FFLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) FFRBR & 0xff; + + case BTUART: + while (!(BTLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) BTRBR & 0xff; + case STUART: + while (!(STLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) STRBR & 0xff; + } + return -1; } void -serial_puts (const char *s) +pxa_puts_dev (unsigned int uart_index,const char *s) { while (*s) { - serial_putc (*s++); + pxa_putc_dev (uart_index,*s++); } } + +#if defined (CONFIG_FFUART) +static int ffuart_init(void) +{ + return pxa_init_dev(FFUART); +} + +static void ffuart_setbrg(void) +{ + return pxa_setbrg_dev(FFUART); +} + +static void ffuart_putc(const char c) +{ + return pxa_putc_dev(FFUART,c); +} + +static void ffuart_puts(const char *s) +{ + return pxa_puts_dev(FFUART,s); +} + +static int ffuart_getc(void) +{ + return pxa_getc_dev(FFUART); +} + +static int ffuart_tstc(void) +{ + return pxa_tstc_dev(FFUART); +} + +struct serial_device serial_ffuart_device = +{ + "serial_ffuart", + "PXA", + ffuart_init, + ffuart_setbrg, + ffuart_getc, + ffuart_tstc, + ffuart_putc, + ffuart_puts, +}; +#endif + +#if defined (CONFIG_BTUART) +static int btuart_init(void) +{ + return pxa_init_dev(BTUART); +} + +static void btuart_setbrg(void) +{ + return pxa_setbrg_dev(BTUART); +} + +static void btuart_putc(const char c) +{ + return pxa_putc_dev(BTUART,c); +} + +static void btuart_puts(const char *s) +{ + return pxa_puts_dev(BTUART,s); +} + +static int btuart_getc(void) +{ + return pxa_getc_dev(BTUART); +} + +static int btuart_tstc(void) +{ + return pxa_tstc_dev(BTUART); +} + +struct serial_device serial_btuart_device = +{ + "serial_btuart", + "PXA", + btuart_init, + btuart_setbrg, + btuart_getc, + btuart_tstc, + btuart_putc, + btuart_puts, +}; +#endif + +#if defined (CONFIG_STUART) +static int stuart_init(void) +{ + return pxa_init_dev(STUART); +} + +static void stuart_setbrg(void) +{ + return pxa_setbrg_dev(STUART); +} + +static void stuart_putc(const char c) +{ + return pxa_putc_dev(STUART,c); +} + +static void stuart_puts(const char *s) +{ + return pxa_puts_dev(STUART,s); +} + +static int stuart_getc(void) +{ + return pxa_getc_dev(STUART); +} + +static int stuart_tstc(void) +{ + return pxa_tstc_dev(STUART); +} + +struct serial_device serial_stuart_device = +{ + "serial_stuart", + "PXA", + stuart_init, + stuart_setbrg, + stuart_getc, + stuart_tstc, + stuart_putc, + stuart_puts, +}; +#endif + + +#ifndef CONFIG_SERIAL_MULTI +inline int serial_init(void) { + return (pxa_init_dev(UART_INDEX)); +} +void serial_setbrg(void) { + pxa_setbrg_dev(UART_INDEX); +} +int serial_getc(void) { + return(pxa_getc_dev(UART_INDEX)); +} +int serial_tstc(void) { + return(pxa_tstc_dev(UART_INDEX)); +} +void serial_putc(const char c) { + pxa_putc_dev(UART_INDEX,c); +} +void serial_puts(const char *s) { + pxa_puts_dev(UART_INDEX,s); +} +#endif /* CONFIG_SERIAL_MULTI */ diff --git a/drivers/Makefile b/drivers/Makefile index 3ee6312e9d..6bf05ccad1 100755 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -43,7 +43,7 @@ COBJS = 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o atmel_usart.o \ sed13806.o sed156x.o \ serial.o serial_max3100.o \ serial_pl010.o serial_pl011.o serial_xuartlite.o \ - sl811_usb.o sm501.o smc91111.o smiLynxEM.o \ + sil680.o sl811_usb.o sm501.o smc91111.o smiLynxEM.o \ status_led.o sym53c8xx.o systemace.o ahci.o \ ti_pci1410a.o tigon3.o tsec.o \ tsi108_eth.o tsi108_i2c.o tsi108_pci.o \ diff --git a/drivers/bios_emulator/Makefile b/drivers/bios_emulator/Makefile index 586e83be8f..90c64dad60 100644 --- a/drivers/bios_emulator/Makefile +++ b/drivers/bios_emulator/Makefile @@ -2,9 +2,11 @@ include $(TOPDIR)/config.mk LIB := $(obj)libatibiosemu.a -X86DIR = ./x86emu +X86DIR = x86emu -OBJS = atibios.o biosemu.o besys.o bios.o \ +$(shell mkdir -p $(obj)$(X86DIR)) + +COBJS = atibios.o biosemu.o besys.o bios.o \ $(X86DIR)/decode.o \ $(X86DIR)/ops2.o \ $(X86DIR)/ops.o \ @@ -12,19 +14,24 @@ OBJS = atibios.o biosemu.o besys.o bios.o \ $(X86DIR)/sys.o \ $(X86DIR)/debug.o -CFLAGS += -I. -I./include -I$(X86DIR) -I$(TOPDIR)/include \ +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +EXTRA_CFLAGS += -I. -I./include -I$(TOPDIR)/include \ -D__PPC__ -D__BIG_ENDIAN__ +CFLAGS += $(EXTRA_CFLAGS) +HOST_CFLAGS += $(EXTRA_CFLAGS) + all: $(LIB) -$(LIB): $(OBJS) - $(AR) crv $@ $(OBJS) +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### -.depend: Makefile $(OBJS:.o=.c) - $(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@ +include $(SRCTREE)/rules.mk -sinclude .depend +sinclude $(obj).depend ######################################################################### diff --git a/drivers/dm9000x.c b/drivers/dm9000x.c index 78acb097ef..6131b5c357 100644 --- a/drivers/dm9000x.c +++ b/drivers/dm9000x.c @@ -99,7 +99,7 @@ void eth_halt(void); static int dm9000_probe(void); static u16 phy_read(int); static void phy_write(int, u16); -static u16 read_srom_word(int); +u16 read_srom_word(int); static u8 DM9000_ior(int); static void DM9000_iow(int reg, u8 value); @@ -303,8 +303,8 @@ eth_init(bd_t * bd) for (i = 0; i < 6; i++) ((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i); - if (!is_zero_ether_addr(bd->bi_enetaddr) && - !is_mutlicast_ether_addr(bd->bi_enetaddr)) { + if (is_zero_ether_addr(bd->bi_enetaddr) || + is_multicast_ether_addr(bd->bi_enetaddr)) { /* try reading from environment */ u8 i; char *s, *e; @@ -537,16 +537,28 @@ eth_rx(void) /* Read a word data from SROM */ -static u16 +u16 read_srom_word(int offset) { DM9000_iow(DM9000_EPAR, offset); DM9000_iow(DM9000_EPCR, 0x4); - udelay(200); + udelay(8000); DM9000_iow(DM9000_EPCR, 0x0); return (DM9000_ior(DM9000_EPDRL) + (DM9000_ior(DM9000_EPDRH) << 8)); } +void +write_srom_word(int offset, u16 val) +{ + DM9000_iow(DM9000_EPAR, offset); + DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff)); + DM9000_iow(DM9000_EPDRL, (val & 0xff)); + DM9000_iow(DM9000_EPCR, 0x12); + udelay(8000); + DM9000_iow(DM9000_EPCR, 0); +} + + /* Read a byte from I/O port */ diff --git a/drivers/fsl_pci_init.c b/drivers/fsl_pci_init.c index 1084dc6b78..3a13eea1f2 100644 --- a/drivers/fsl_pci_init.c +++ b/drivers/fsl_pci_init.c @@ -130,9 +130,14 @@ fsl_pci_init(struct pci_controller *hose) } - /* Call setup to allocate PCSRBAR window */ - pciauto_setup_device(hose, dev, 1, hose->pci_mem, + /* Use generic setup_device to initialize standard pci regs, + * but do not allocate any windows since any BAR found (such + * as PCSRBAR) is not in this cpu's memory space. + */ + + pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); + #ifndef CONFIG_PCI_NOSCAN printf (" Scanning PCI bus %02x\n", hose->current_busno); hose->last_busno = pci_hose_scan_bus(hose,hose->current_busno); diff --git a/drivers/nand/nand_util.c b/drivers/nand/nand_util.c index cf05043c0a..4fd4e166e6 100644 --- a/drivers/nand/nand_util.c +++ b/drivers/nand/nand_util.c @@ -210,9 +210,12 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) if (!opts->quiet) { unsigned long long n =(unsigned long long) - (erase.addr+meminfo->erasesize-opts->offset) - * 100; - int percent = (int)do_div(n, erase_length); + (erase.addr + meminfo->erasesize - opts->offset) + * 100; + int percent; + + do_div(n, erase_length); + percent = (int)n; /* output progress message only at whole percent * steps to reduce the number of messages printed @@ -478,7 +481,11 @@ int nand_write_opts(nand_info_t *meminfo, const nand_write_options_t *opts) if (!opts->quiet) { unsigned long long n = (unsigned long long) (opts->length-imglen) * 100; - int percent = (int)do_div(n, opts->length); + int percent; + + do_div(n, opts->length); + percent = (int)n; + /* output progress message only at whole percent * steps to reduce the number of messages printed * on (slow) serial consoles @@ -653,7 +660,11 @@ int nand_read_opts(nand_info_t *meminfo, const nand_read_options_t *opts) if (!opts->quiet) { unsigned long long n = (unsigned long long) (opts->length-imglen) * 100; - int percent = (int)do_div(n ,opts->length); + int percent; + + do_div(n, opts->length); + percent = (int)n; + /* output progress message only at whole percent * steps to reduce the number of messages printed * on (slow) serial consoles diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c index 2378553be5..acfda83ba5 100644 --- a/drivers/pci_auto.c +++ b/drivers/pci_auto.c @@ -28,6 +28,11 @@ #define PCIAUTO_IDE_MODE_MASK 0x05 +/* the user can define CFG_PCI_CACHE_LINE_SIZE to avoid problems */ +#ifndef CFG_PCI_CACHE_LINE_SIZE +#define CFG_PCI_CACHE_LINE_SIZE 8 +#endif + /* * */ @@ -150,7 +155,8 @@ void pciauto_setup_device(struct pci_controller *hose, } pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); - pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); + pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, + CFG_PCI_CACHE_LINE_SIZE); pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); } diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 0f5232a72a..7559e92227 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -30,6 +30,8 @@ qe_map_t *qe_immr = NULL; static qe_snum_t snums[QE_NUM_OF_SNUM]; +DECLARE_GLOBAL_DATA_PTR; + void qe_issue_cmd(uint cmd, uint sbc, u8 mcn, u32 cmd_data) { u32 cecr; @@ -51,8 +53,6 @@ void qe_issue_cmd(uint cmd, uint sbc, u8 mcn, u32 cmd_data) uint qe_muram_alloc(uint size, uint align) { - DECLARE_GLOBAL_DATA_PTR; - uint retloc; uint align_mask, off; uint savebase; @@ -158,8 +158,6 @@ void qe_put_snum(u8 snum) void qe_init(uint qe_base) { - DECLARE_GLOBAL_DATA_PTR; - /* Init the QE IMMR base */ qe_immr = (qe_map_t *)qe_base; @@ -204,7 +202,6 @@ void qe_assign_page(uint snum, uint para_ram_base) int qe_set_brg(uint brg, uint rate) { - DECLARE_GLOBAL_DATA_PTR; volatile uint *bp; u32 divisor; int div16 = 0; diff --git a/drivers/sil680.c b/drivers/sil680.c new file mode 100644 index 0000000000..a6143df4c0 --- /dev/null +++ b/drivers/sil680.c @@ -0,0 +1,110 @@ +/* + * (C) Copyright 2007 + * Gary Jennejohn, DENX Software Engineering, garyj@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +/* sil680.c - ide support functions for the Sil0680A controller */ + +/* + * The following parameters must be defined in the configuration file + * of the target board: + * + * #define CFG_IDE_SIL680 + * + * #define CONFIG_PCI_PNP + * NOTE it may also be necessary to define this if the default of 8 is + * incorrect for the target board (e.g. the sequoia board requires 0). + * #define CFG_PCI_CACHE_LINE_SIZE 0 + * + * #define CONFIG_CMD_IDE + * #undef CONFIG_IDE_8xx_DIRECT + * #undef CONFIG_IDE_LED + * #undef CONFIG_IDE_RESET + * #define CONFIG_IDE_PREINIT + * #define CFG_IDE_MAXBUS 2 - modify to suit + * #define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) - modify to suit + * #define CFG_ATA_BASE_ADDR 0 + * #define CFG_ATA_IDE0_OFFSET 0 + * #define CFG_ATA_IDE1_OFFSET 0 + * #define CFG_ATA_DATA_OFFSET 0 + * #define CFG_ATA_REG_OFFSET 0 + * #define CFG_ATA_ALT_OFFSET 0x0004 + * + * The mapping for PCI IO-space. + * NOTE this is the value for the sequoia board. Modify to suit. + * #define CFG_PCI0_IO_SPACE 0xE8000000 + */ + +#include +#if defined(CFG_IDE_SIL680) +#include +#include +#include + +extern ulong ide_bus_offset[CFG_IDE_MAXBUS]; + +int ide_preinit (void) +{ + int status; + pci_dev_t devbusfn; + int l; + + status = 1; + for (l = 0; l < CFG_IDE_MAXBUS; l++) { + ide_bus_offset[l] = -ATA_STATUS; + } + devbusfn = pci_find_device (0x1095, 0x0680, 0); + if (devbusfn != -1) { + status = 0; + + pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, + (u32 *) &ide_bus_offset[0]); + ide_bus_offset[0] &= 0xfffffff8; + ide_bus_offset[0] += CFG_PCI0_IO_SPACE; + pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2, + (u32 *) &ide_bus_offset[1]); + ide_bus_offset[1] &= 0xfffffff8; + ide_bus_offset[1] += CFG_PCI0_IO_SPACE; + /* init various things - taken from the Linux driver */ + /* set PIO mode */ + pci_write_config_byte(devbusfn, 0x80, 0x00); + pci_write_config_byte(devbusfn, 0x84, 0x00); + /* IDE0 */ + pci_write_config_byte(devbusfn, 0xA1, 0x02); + pci_write_config_word(devbusfn, 0xA2, 0x328A); + pci_write_config_dword(devbusfn, 0xA4, 0x62DD62DD); + pci_write_config_dword(devbusfn, 0xA8, 0x43924392); + pci_write_config_dword(devbusfn, 0xAC, 0x40094009); + /* IDE1 */ + pci_write_config_byte(devbusfn, 0xB1, 0x02); + pci_write_config_word(devbusfn, 0xB2, 0x328A); + pci_write_config_dword(devbusfn, 0xB4, 0x62DD62DD); + pci_write_config_dword(devbusfn, 0xB8, 0x43924392); + pci_write_config_dword(devbusfn, 0xBC, 0x40094009); + } + return (status); +} + +void ide_set_reset (int flag) { + return; +} + +#endif /* CFG_IDE_SIL680 */ diff --git a/drivers/tsec.c b/drivers/tsec.c index 6bca4dc0f3..4ff3339c7d 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -1262,10 +1262,10 @@ uint mii_parse_lxt971_sr2(uint mii_reg, struct tsec_private *priv) case MIIM_LXT971_SR2_100HDX: priv->speed = 100; priv->duplexity = 0; + break; default: priv->speed = 100; priv->duplexity = 1; - break; } } else { priv->speed = 0; diff --git a/drivers/usb_ohci.c b/drivers/usb_ohci.c index f0a37b20a7..7ddcab63e7 100644 --- a/drivers/usb_ohci.c +++ b/drivers/usb_ohci.c @@ -93,6 +93,7 @@ #ifdef CONFIG_PCI_OHCI static struct pci_device_id ohci_pci_ids[] = { {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */ + {0x1033, 0x0035}, /* NEC PCI OHCI module ids */ /* Please add supported PCI OHCI controller ids here */ {0, 0} }; @@ -669,7 +670,7 @@ static int ep_link (ohci_t *ohci, ed_t *edi) ed_p = &(((ed_t *)ed_p)->hwNextED)) inter = ep_rev (6, ((ed_t *)ed_p)->int_interval); ed->hwNextED = *ed_p; - *ed_p = m32_swap(ed); + *ed_p = m32_swap((unsigned long)ed); } break; } @@ -687,11 +688,11 @@ static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed, /* ED might have been unlinked through another path */ while (*ed_p != 0) { - if (((struct ed *)m32_swap (ed_p)) == ed) { + if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) { *ed_p = ed->hwNextED; break; } - ed_p = & (((struct ed *)m32_swap (ed_p))->hwNextED); + ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED); } } } diff --git a/drivers/usbdcore_mpc8xx.c b/drivers/usbdcore_mpc8xx.c index e87284b178..d4c4096565 100644 --- a/drivers/usbdcore_mpc8xx.c +++ b/drivers/usbdcore_mpc8xx.c @@ -64,6 +64,8 @@ #include "usbdcore_mpc8xx.h" #include "usbdcore_ep0.h" +DECLARE_GLOBAL_DATA_PTR; + #define ERR(fmt, args...)\ serial_printf("ERROR : [%s] %s:%d: "fmt,\ __FILE__,__FUNCTION__,__LINE__, ##args) @@ -1216,7 +1218,6 @@ static void mpc8xx_udc_clock_init (volatile immap_t * immr, #elif defined(CFG_USB_BRGCLK) /* This has been tested with brgclk == 50MHz */ - DECLARE_GLOBAL_DATA_PTR; int divisor = 0; if (gd->cpu_clk < 48000000L) { diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index e8cb29903b..9b4da3ae94 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1288,15 +1288,15 @@ typedef void (*ExcpHndlr) (void) ; #define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3) #define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2) -#define GPLR(x) ((((x) & 0x7f) < 96) ? _GPLR(x) : GPLR3) -#define GPDR(x) ((((x) & 0x7f) < 96) ? _GPDR(x) : GPDR3) -#define GPSR(x) ((((x) & 0x7f) < 96) ? _GPSR(x) : GPSR3) -#define GPCR(x) ((((x) & 0x7f) < 96) ? _GPCR(x) : GPCR3) -#define GRER(x) ((((x) & 0x7f) < 96) ? _GRER(x) : GRER3) -#define GFER(x) ((((x) & 0x7f) < 96) ? _GFER(x) : GFER3) -#define GEDR(x) ((((x) & 0x7f) < 96) ? _GEDR(x) : GEDR3) -#define GAFR(x) ((((x) & 0x7f) < 96) ? _GAFR(x) : \ - ((((x) & 0x7f) < 112) ? GAFR3_L : GAFR3_U)) +#define GPLR(x) __REG2(0x40E00000 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GPDR(x) __REG2(0x40E0000C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GPSR(x) __REG2(0x40E00018 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GPCR(x) __REG2(0x40E00024 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GRER(x) __REG2(0x40E00030 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GFER(x) __REG2(0x40E0003C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GEDR(x) __REG2(0x40E00048 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3) +#define GAFR(x) __REG2((((x) & 0x7f) < 96) ? 0x40E00054 : \ + ((((x) & 0x7f) < 112) ? 0x40E0006C : 0x40E00070),((x) & 0x60) >> 3) #else #define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h index 463a111b49..c42ad82c47 100644 --- a/include/asm-mips/string.h +++ b/include/asm-mips/string.h @@ -1,126 +1,31 @@ -/* $Id: string.h,v 1.13 2000/02/19 14:12:14 harald Exp $ - * +/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 1994, 1995, 1996, 1997, 1998 by Ralf Baechle + * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle + * Copyright (c) 2000 by Silicon Graphics, Inc. + * Copyright (c) 2001 MIPS Technologies, Inc. */ -#ifndef __ASM_MIPS_STRING_H -#define __ASM_MIPS_STRING_H - -#include - -#define __HAVE_ARCH_STRCPY -extern __inline__ char *strcpy(char *__dest, __const__ char *__src) -{ - char *__xdest = __dest; - - __asm__ __volatile__( - ".set\tnoreorder\n\t" - ".set\tnoat\n" - "1:\tlbu\t$1,(%1)\n\t" - "addiu\t%1,1\n\t" - "sb\t$1,(%0)\n\t" - "bnez\t$1,1b\n\t" - "addiu\t%0,1\n\t" - ".set\tat\n\t" - ".set\treorder" - : "=r" (__dest), "=r" (__src) - : "0" (__dest), "1" (__src) - : "$1","memory"); - - return __xdest; -} - -#define __HAVE_ARCH_STRNCPY -extern __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n) -{ - char *__xdest = __dest; - - if (__n == 0) - return __xdest; - - __asm__ __volatile__( - ".set\tnoreorder\n\t" - ".set\tnoat\n" - "1:\tlbu\t$1,(%1)\n\t" - "subu\t%2,1\n\t" - "sb\t$1,(%0)\n\t" - "beqz\t$1,2f\n\t" - "addiu\t%0,1\n\t" - "bnez\t%2,1b\n\t" - "addiu\t%1,1\n" - "2:\n\t" - ".set\tat\n\t" - ".set\treorder" - : "=r" (__dest), "=r" (__src), "=r" (__n) - : "0" (__dest), "1" (__src), "2" (__n) - : "$1","memory"); +#ifndef _ASM_STRING_H +#define _ASM_STRING_H - return __dest; -} - -#define __HAVE_ARCH_STRCMP -extern __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct) -{ - int __res; - - __asm__ __volatile__( - ".set\tnoreorder\n\t" - ".set\tnoat\n\t" - "lbu\t%2,(%0)\n" - "1:\tlbu\t$1,(%1)\n\t" - "addiu\t%0,1\n\t" - "bne\t$1,%2,2f\n\t" - "addiu\t%1,1\n\t" - "bnez\t%2,1b\n\t" - "lbu\t%2,(%0)\n\t" -#if defined(CONFIG_CPU_R3000) - "nop\n\t" -#endif - "move\t%2,$1\n" - "2:\tsubu\t%2,$1\n" - "3:\t.set\tat\n\t" - ".set\treorder" - : "=r" (__cs), "=r" (__ct), "=r" (__res) - : "0" (__cs), "1" (__ct) - : "$1"); +/* + * We don't do inline string functions, since the + * optimised inline asm versions are not small. + */ - return __res; -} +#undef __HAVE_ARCH_STRCPY +extern char *strcpy(char *__dest, __const__ char *__src); -#define __HAVE_ARCH_STRNCMP -extern __inline__ int -strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count) -{ - int __res; +#undef __HAVE_ARCH_STRNCPY +extern char *strncpy(char *__dest, __const__ char *__src, size_t __n); - __asm__ __volatile__( - ".set\tnoreorder\n\t" - ".set\tnoat\n" - "1:\tlbu\t%3,(%0)\n\t" - "beqz\t%2,2f\n\t" - "lbu\t$1,(%1)\n\t" - "subu\t%2,1\n\t" - "bne\t$1,%3,3f\n\t" - "addiu\t%0,1\n\t" - "bnez\t%3,1b\n\t" - "addiu\t%1,1\n" - "2:\n\t" -#if defined(CONFIG_CPU_R3000) - "nop\n\t" -#endif - "move\t%3,$1\n" - "3:\tsubu\t%3,$1\n\t" - ".set\tat\n\t" - ".set\treorder" - : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res) - : "0" (__cs), "1" (__ct), "2" (__count) - : "$1"); +#undef __HAVE_ARCH_STRCMP +extern int strcmp(__const__ char *__cs, __const__ char *__ct); - return __res; -} +#undef __HAVE_ARCH_STRNCMP +extern int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count); #undef __HAVE_ARCH_MEMSET extern void *memset(void *__s, int __c, size_t __count); @@ -131,27 +36,4 @@ extern void *memcpy(void *__to, __const__ void *__from, size_t __n); #undef __HAVE_ARCH_MEMMOVE extern void *memmove(void *__dest, __const__ void *__src, size_t __n); -/* Don't build bcopy at all ... */ -#define __HAVE_ARCH_BCOPY - -#define __HAVE_ARCH_MEMSCAN -extern __inline__ void *memscan(void *__addr, int __c, size_t __size) -{ - char *__end = (char *)__addr + __size; - - __asm__(".set\tpush\n\t" - ".set\tnoat\n\t" - ".set\treorder\n\t" - "1:\tbeq\t%0,%1,2f\n\t" - "addiu\t%0,1\n\t" - "lb\t$1,-1(%0)\n\t" - "bne\t$1,%4,1b\n" - "2:\t.set\tpop" - : "=r" (__addr), "=r" (__end) - : "0" (__addr), "1" (__end), "r" (__c) - : "$1"); - - return __addr; -} - -#endif /* __ASM_MIPS_STRING_H */ +#endif /* _ASM_STRING_H */ diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 03289bcc21..11dfa1c57b 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -13,6 +13,9 @@ #define SIO_CONFIG_RA 0x398 #define SIO_CONFIG_RD 0x399 +#ifndef _IO_BASE +#define _IO_BASE 0 +#endif #define readb(addr) in_8((volatile u8 *)(addr)) #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) diff --git a/include/common.h b/include/common.h index d6286bc6de..aca281bdad 100644 --- a/include/common.h +++ b/include/common.h @@ -275,7 +275,7 @@ void pciinfo (int, int); # endif int is_pci_host (struct pci_controller *); #if defined(CONFIG_440SPE) - void pcie_setup_hoses(void); + void pcie_setup_hoses(int busno); #endif #endif @@ -565,7 +565,7 @@ ulong bootcount_load (void); #define BOOTCOUNT_MAGIC 0xB001C041 /* $(CPU)/.../ */ -/*void mii_init (void);*/ +void mii_init (void); /* $(CPU)/.../lcd.c */ ulong lcd_setmem (ulong); diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 0718c85745..9adbba9544 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -158,7 +158,8 @@ #define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ -#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_QUIET 1 /*----------------------------------------------------------------------- * PCI stuff diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 62a2eaa236..0321650f3d 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -399,6 +399,8 @@ #define CFG_ENV_ADDR_REDUND 0xFFFFA000 #define CFG_ENV_SIZE_REDUND 0x2000 +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + #define CFG_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */ #define CFG_NVRAM_SIZE 242 /* NVRAM size */ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 1fd2b53974..21cd9c1f26 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -165,7 +165,8 @@ #define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ -#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_QUIET 1 /*----------------------------------------------------------------------- * PCI stuff diff --git a/include/configs/FADS823.h b/include/configs/FADS823.h index a562b2fa4e..f810af2cec 100644 --- a/include/configs/FADS823.h +++ b/include/configs/FADS823.h @@ -206,6 +206,7 @@ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/FADS850SAR.h b/include/configs/FADS850SAR.h index c8ce25957b..a09c0e0393 100644 --- a/include/configs/FADS850SAR.h +++ b/include/configs/FADS850SAR.h @@ -156,6 +156,7 @@ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/FPS850L.h b/include/configs/FPS850L.h index 322158c7b8..3b0ddb4ec6 100644 --- a/include/configs/FPS850L.h +++ b/include/configs/FPS850L.h @@ -39,28 +39,44 @@ #undef CONFIG_8xx_CONS_SMC1 #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ #undef CONFIG_8xx_CONS_NONE -#define CONFIG_BAUDRATE 19200 -#if 0 -#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ -#else -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ -#endif -#define CONFIG_BOOTCOMMAND "bootm 40020000" /* autoboot command */ +#define CONFIG_BAUDRATE 115200 -#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ +#define CONFIG_BOOTCOUNT_LIMIT + +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_BOARD_TYPES 1 /* support board types */ -#define CONFIG_BOOTARGS "root=/dev/nfs rw " \ - "nfsroot=10.0.0.2:/opt/eldk/ppc_8xx " \ - "nfsaddrs=10.0.0.99:10.0.0.2" +#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm ${kernel_addr}\0" \ + "flash_self=run ramargs addip;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ + "rootpath=/opt/eldk/ppc_8xx\0" \ + "bootfile=/tftpboot/fps850L/uImage\0" \ + "fdt_addr=40040000\0" \ + "kernel_addr=40060000\0" \ + "ramdisk_addr=40200000\0" \ + "" +#define CONFIG_BOOTCOMMAND "run flash_self" #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ #undef CONFIG_WATCHDOG /* watchdog disabled */ - /* * BOOTP options */ @@ -80,24 +96,32 @@ #define CONFIG_BOOTP_NTPSERVER #define CONFIG_BOOTP_TIMEOFFSET +#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ /* * Command line configuration. */ #include -#undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_CACHE +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SNTP /* * Miscellaneous configurable options */ #define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ + +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */ +#ifdef CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#endif + #if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else diff --git a/include/configs/FPS860L.h b/include/configs/FPS860L.h index f8698b5708..6fec07540c 100644 --- a/include/configs/FPS860L.h +++ b/include/configs/FPS860L.h @@ -40,18 +40,37 @@ #define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */ #undef CONFIG_8xx_CONS_NONE #define CONFIG_BAUDRATE 115200 -#if 0 -#define CONFIG_BOOTDELAY -1 /* autoboot disabled */ -#else + +#define CONFIG_BOOTCOUNT_LIMIT + #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ -#endif -#define CONFIG_BOOTCOMMAND "bootm 40040000" /* autoboot command */ #define CONFIG_BOARD_TYPES 1 /* support board types */ -#define CONFIG_BOOTARGS "root=/dev/nfs rw " \ - "nfsroot=10.0.0.2:/opt/eldk/ppc_8xx " \ - "nfsaddrs=10.0.0.99:10.0.0.2" +#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm ${kernel_addr}\0" \ + "flash_self=run ramargs addip;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ + "rootpath=/opt/eldk/ppc_8xx\0" \ + "bootfile=/tftpboot/fps850L/uImage\0" \ + "fdt_addr=40040000\0" \ + "kernel_addr=40060000\0" \ + "ramdisk_addr=40200000\0" \ + "" +#define CONFIG_BOOTCOMMAND "run flash_self" #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ @@ -79,11 +98,11 @@ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ - /* * Command line configuration. */ #include + #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP @@ -95,7 +114,14 @@ * Miscellaneous configurable options */ #define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ + +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */ +#ifdef CFG_HUSH_PARSER +#define CFG_PROMPT_HUSH_PS2 "> " +#endif + #if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else diff --git a/include/configs/HH405.h b/include/configs/HH405.h index ea8e61a764..8967b3fc60 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -217,7 +217,8 @@ #define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ -#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_QUIET 1 /*----------------------------------------------------------------------- * PCI stuff diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index ed669c51da..1ff7108130 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -157,7 +157,8 @@ #define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ -#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_QUIET 1 /*----------------------------------------------------------------------- * PCI stuff diff --git a/include/configs/ICU862.h b/include/configs/ICU862.h index 27a5bc302f..da54cef534 100644 --- a/include/configs/ICU862.h +++ b/include/configs/ICU862.h @@ -234,6 +234,7 @@ #define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment sector */ #define CFG_ENV_SIZE 0x4000 /* Used Size of Environment Sector */ +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index 532615485c..4c16d22959 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -178,12 +178,9 @@ #endif /* CONFIG_MPC5200 */ /* pass open firmware flat tree */ -#define CONFIG_OF_FLAT_TREE 1 +#define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,5200@0" #define OF_SOC "soc5200@f0000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h index 0f97050f21..798ec0c7a4 100644 --- a/include/configs/M5271EVB.h +++ b/include/configs/M5271EVB.h @@ -54,13 +54,12 @@ */ #ifndef CONFIG_MONITOR_IS_IN_RAM #define CFG_ENV_OFFSET 0x4000 -#define CFG_ENV_SECT_SIZE 0x2000 -#define CFG_ENV_IS_IN_FLASH 1 #else #define CFG_ENV_ADDR 0xffe04000 +#endif #define CFG_ENV_SECT_SIZE 0x2000 #define CFG_ENV_IS_IN_FLASH 1 -#endif +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ /* * BOOTP options diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 36b0f160b5..6568fe13b8 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -231,9 +231,6 @@ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8313@0" #define OF_SOC "soc8313@e0000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index efc317288e..c9c6d88cf0 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -321,9 +321,6 @@ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8323@0" #define OF_SOC "soc8323@e0000000" #define OF_QE "qe@e0100000" diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index c1f1c747c9..92555bac42 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -342,9 +342,6 @@ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8349@0" #define OF_SOC "soc8349@e0000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 3311d5c1f3..54cab528bd 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -299,9 +299,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8349@0" #define OF_SOC "soc8349@e0000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 094b66e7c9..41f062ce72 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -351,10 +351,6 @@ #define CONFIG_OF_HAS_BD_T 1 #define CONFIG_OF_HAS_UBOOT_ENV 1 - -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8360@0" #define OF_SOC "soc8360@e0000000" #define OF_QE "qe@e0100000" diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 22de2fb2c7..be603ac117 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -301,9 +301,6 @@ #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8540@0" #define OF_SOC "soc8540@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index a4727b29b8..4e061bd9ff 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -312,9 +312,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8541@0" #define OF_SOC "soc8541@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 746f360f9e..f580ccadee 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -181,6 +181,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_BR3_PRELIM 0xf8100801 /* port size 8bit */ #define CFG_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/ +#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ #define PIXIS_BASE 0xf8100000 /* PIXIS registers */ #define PIXIS_ID 0x0 /* Board ID at offset 0 */ #define PIXIS_VER 0x1 /* Board version at offset 1 */ @@ -252,9 +253,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8544@0" #define OF_SOC "soc8544@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) @@ -312,6 +310,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_PCIE3_IO_BASE 0x00000000 #define CFG_PCIE3_IO_PHYS 0xb0100000 /* reuse mem LAW */ #define CFG_PCIE3_IO_SIZE 0x00100000 /* 1M */ +#define CFG_PCIE3_MEM_BASE2 0xb0200000 +#define CFG_PCIE3_MEM_PHYS2 CFG_PCIE3_MEM_BASE2 +#define CFG_PCIE3_MEM_SIZE2 0x00200000 /* 1M */ #if defined(CONFIG_PCI) diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 58a8ea55c3..6083715189 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -336,9 +336,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8548@0" #define OF_SOC "soc8548@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) @@ -636,7 +633,6 @@ extern unsigned long get_clock_freq(void); #define ENET_ENV "" #endif -#if 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ @@ -649,8 +645,8 @@ extern unsigned long get_clock_freq(void); "consoledev=ttyS1\0" \ "ramdiskaddr=2000000\0" \ "ramdiskfile=ramdisk.uboot\0" \ - "dtbaddr=c00000\0" \ - "dtbfile=mpc8548cds.dtb\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=mpc8548cds.dtb\0" \ "eoi=mw e00400b0 0\0" \ "iack=md e00400a0 1\0" \ "ddrreg=md ${a}000 8; md ${a}080 8;md ${a}100 d; md ${a}140 4; md ${a}bf0 4;" \ @@ -672,8 +668,6 @@ extern unsigned long get_clock_freq(void); PCI_ENV1 \ PCI_ENV2 \ ENET_ENV -#endif - #define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs root=/dev/nfs rw " \ @@ -681,8 +675,8 @@ extern unsigned long get_clock_freq(void); "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ "console=$consoledev,$baudrate $othbootargs;" \ "tftp $loadaddr $bootfile;" \ - "tftp $dtbaddr $dtbfile;" \ - "bootm $loadaddr - $dtbaddr" + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" #define CONFIG_RAMBOOTCOMMAND \ @@ -690,8 +684,8 @@ extern unsigned long get_clock_freq(void); "console=$consoledev,$baudrate $othbootargs;" \ "tftp $ramdiskaddr $ramdiskfile;" \ "tftp $loadaddr $bootfile;" \ - "tftp $dtbaddr $dtbfile;" \ - "bootm $loadaddr $ramdiskaddr $dtbaddr" + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 8d7d6579da..1d1b7c9079 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -312,9 +312,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8555@0" #define OF_SOC "soc8555@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index b3c33d9f7d..a8f362fa13 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -292,9 +292,6 @@ #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8560@0" #define OF_SOC "soc8560@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 80ccda51f7..ba744e99f8 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -63,9 +63,9 @@ extern unsigned long get_clock_freq(void); /* * These can be toggled for performance analysis, otherwise use default. */ -/*#define CONFIG_L2_CACHE*/ /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_BTB /* toggle branch predition */ +#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. @@ -293,9 +293,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8568@0" #define OF_SOC "soc8568@e0000000" #define OF_QE "qe@e0080000" diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 03e815d87d..7d8a380dc0 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -185,6 +185,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/ +#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */ #define PIXIS_BASE 0xf8100000 /* PIXIS registers */ #define PIXIS_ID 0x0 /* Board ID at offset 0 */ #define PIXIS_VER 0x1 /* Board version at offset 1 */ @@ -268,9 +269,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8641@0" #define OF_SOC "soc8641@f8000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 4acbcd5e1c..652210c19d 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -177,7 +177,8 @@ #define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ -#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_QUIET 1 /*----------------------------------------------------------------------- * PCI stuff diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index dd1decdcd9..8a74c4f5c9 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -429,6 +429,8 @@ #define CFG_ENV_ADDR_REDUND 0xFFFFA000 #define CFG_ENV_SIZE_REDUND 0x2000 +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + #endif /* ENVIRONMENT_IN_EEPROM */ diff --git a/include/configs/R360MPI.h b/include/configs/R360MPI.h index 516ec643d6..a98b4af29e 100644 --- a/include/configs/R360MPI.h +++ b/include/configs/R360MPI.h @@ -233,6 +233,7 @@ #define CFG_ENV_OFFSET 0x40000 /* Offset of Environment */ #define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment sector */ #define CFG_ENV_SIZE 0x4000 /* Used Size of Environment sector */ +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/RRvision.h b/include/configs/RRvision.h index 1e6e8c0aa2..32e2285454 100644 --- a/include/configs/RRvision.h +++ b/include/configs/RRvision.h @@ -235,6 +235,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index 3d9850023d..e0c9d81be0 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -701,11 +701,9 @@ * Open firmware flat tree support *----------------------------------------------------------------------- */ -#define CONFIG_OF_FLAT_TREE 1 +#define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 #define OF_CPU "PowerPC,5200@0" #define OF_SOC "soc5200@f0000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h index 2bdcf2cf95..7a3801026f 100644 --- a/include/configs/TQM823L.h +++ b/include/configs/TQM823L.h @@ -70,8 +70,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM823L/uImage\0" \ - "kernel_addr=40040000\0" \ - "ramdisk_addr=40100000\0" \ + "fdt_addr=40040000\0" \ + "kernel_addr=40060000\0" \ + "ramdisk_addr=40200000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -205,6 +206,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h index 58bc5d3f95..e8b6a80b19 100644 --- a/include/configs/TQM823M.h +++ b/include/configs/TQM823M.h @@ -70,8 +70,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM823M/uImage\0" \ - "kernel_addr=40080000\0" \ - "ramdisk_addr=40180000\0" \ + "fdt_addr=40080000\0" \ + "kernel_addr=400A0000\0" \ + "ramdisk_addr=40280000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -202,6 +203,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h index 74b16c7cf9..beeca6343e 100644 --- a/include/configs/TQM850L.h +++ b/include/configs/TQM850L.h @@ -66,8 +66,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM850L/uImage\0" \ - "kernel_addr=40040000\0" \ - "ramdisk_addr=40100000\0" \ + "fdt_addr=40040000\0" \ + "kernel_addr=40060000\0" \ + "ramdisk_addr=40200000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -192,6 +193,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h index e3936c3304..d5609c1d48 100644 --- a/include/configs/TQM850M.h +++ b/include/configs/TQM850M.h @@ -64,8 +64,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM850M/uImage\0" \ - "kernel_addr=40080000\0" \ - "ramdisk_addr=40180000\0" \ + "fdt_addr=40080000\0" \ + "kernel_addr=400A0000\0" \ + "ramdisk_addr=40280000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -191,6 +192,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h index ae22b77d7f..e35b5b2ac1 100644 --- a/include/configs/TQM855L.h +++ b/include/configs/TQM855L.h @@ -69,8 +69,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM855L/uImage\0" \ - "kernel_addr=40040000\0" \ - "ramdisk_addr=40100000\0" \ + "fdt_addr=40040000\0" \ + "kernel_addr=40060000\0" \ + "ramdisk_addr=40200000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -196,6 +197,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h index 5d54f876c8..cd5212eff8 100644 --- a/include/configs/TQM855M.h +++ b/include/configs/TQM855M.h @@ -69,8 +69,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM855M/uImage\0" \ - "kernel_addr=40080000\0" \ - "ramdisk_addr=40180000\0" \ + "fdt_addr=40080000\0" \ + "kernel_addr=400A0000\0" \ + "ramdisk_addr=40280000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -231,6 +232,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 2f23c50493..6dbd3924bd 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -449,7 +449,7 @@ #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ #define CONFIG_EXTRA_ENV_SETTINGS \ - CFG_BOOTFILE \ + "bootfile="CFG_BOOTFILE_PATH"\0" \ "netdev=eth0\0" \ "consdev=ttyS0\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h index 40c0940d5a..d5838dbf37 100644 --- a/include/configs/TQM860L.h +++ b/include/configs/TQM860L.h @@ -69,8 +69,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM860L/uImage\0" \ - "kernel_addr=40040000\0" \ - "ramdisk_addr=40100000\0" \ + "fdt_addr=40040000\0" \ + "kernel_addr=40060000\0" \ + "ramdisk_addr=40200000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -199,6 +200,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index 481e3d0d53..684b86f2ef 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -69,8 +69,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM860M/uImage\0" \ - "kernel_addr=40080000\0" \ - "ramdisk_addr=40180000\0" \ + "fdt_addr=40080000\0" \ + "kernel_addr=400A0000\0" \ + "ramdisk_addr=40280000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -198,6 +199,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h index bb3b1cc541..f09d3d1654 100644 --- a/include/configs/TQM862L.h +++ b/include/configs/TQM862L.h @@ -72,8 +72,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM862L/uImage\0" \ - "kernel_addr=40040000\0" \ - "ramdisk_addr=40100000\0" \ + "fdt_addr=40040000\0" \ + "kernel_addr=40060000\0" \ + "ramdisk_addr=40200000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -200,6 +201,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h index d687d082c9..039aa3af42 100644 --- a/include/configs/TQM862M.h +++ b/include/configs/TQM862M.h @@ -72,8 +72,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM862M/uImage\0" \ - "kernel_addr=40080000\0" \ - "ramdisk_addr=40180000\0" \ + "fdt_addr=40080000\0" \ + "kernel_addr=400A0000\0" \ + "ramdisk_addr=40280000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -201,6 +202,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index ff00c13308..0d778919a2 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -81,8 +81,9 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM866M/uImage\0" \ - "kernel_addr=40080000\0" \ - "ramdisk_addr=40180000\0" \ + "fdt_addr=40080000\0" \ + "kernel_addr=400A0000\0" \ + "ramdisk_addr=40280000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -241,6 +242,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index 3880ec7476..14848abe5b 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -163,7 +163,8 @@ #define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ -#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CFG_NAND_QUIET 1 /*----------------------------------------------------------------------- * PCI stuff diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index e1d8f74c5e..75b153e4a8 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -183,10 +183,9 @@ #define CFG_LONGHELP 1 #define CFG_MEMTEST_START \ - ({ DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start; }) + ({ gd->bd->bi_dram[0].start; }) #define CFG_MEMTEST_END \ ({ \ - DECLARE_GLOBAL_DATA_PTR; \ gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \ }) #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } diff --git a/include/configs/cmi_mpc5xx.h b/include/configs/cmi_mpc5xx.h index cd92af2352..a869364c60 100644 --- a/include/configs/cmi_mpc5xx.h +++ b/include/configs/cmi_mpc5xx.h @@ -59,6 +59,8 @@ */ #include +#undef CONFIG_CMD_NET /* disabeled - causes compile errors */ + #define CONFIG_CMD_MEMORY #define CONFIG_CMD_LOADB #define CONFIG_CMD_REGINFO @@ -169,8 +171,9 @@ #define CFG_ENV_IS_IN_FLASH 1 #ifdef CFG_ENV_IS_IN_FLASH -#define CFG_ENV_OFFSET 0x00020000 /* Environment starts at this adress */ -#define CFG_ENV_SIZE 0x00010000 /* Set whole sector as env */ +#define CFG_ENV_OFFSET 0x00020000 /* Environment starts at this adress */ +#define CFG_ENV_SIZE 0x00010000 /* Set whole sector as env */ +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 2f64ec238c..2547afb3cf 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -406,6 +406,7 @@ #define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ #define CFG_ENV_SECT_SIZE 0x40000 /* see README - env sect real size */ #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_MONITOR_LEN-CFG_ENV_SECT_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/idmr.h b/include/configs/idmr.h index 404e88a4fc..3821ebcf0d 100644 --- a/include/configs/idmr.h +++ b/include/configs/idmr.h @@ -125,6 +125,8 @@ #define CFG_ENV_IS_IN_FLASH #endif /* !CONFIG_MONITOR_IS_IN_RAM */ +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + #define CFG_PROMPT "=> " #define CFG_LONGHELP /* undef to save memory */ diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h index b68c5aa46e..b7100e986c 100644 --- a/include/configs/jupiter.h +++ b/include/configs/jupiter.h @@ -145,12 +145,9 @@ #if 0 /* pass open firmware flat tree */ -#define CONFIG_OF_FLAT_TREE 1 +#define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,5200@0" #define OF_SOC "soc5200@f0000000" #define OF_TBCLK (bd->bi_busfreq / 8) diff --git a/include/configs/katmai.h b/include/configs/katmai.h index b6d0f519a8..7908e5a474 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -66,11 +66,11 @@ #define CFG_PCIE_BASE 0xe0000000 /* PCIe UTL regs */ #define CFG_PCIE0_CFGBASE 0xc0000000 -#define CFG_PCIE0_XCFGBASE 0xc0000400 -#define CFG_PCIE1_CFGBASE 0xc0001000 -#define CFG_PCIE1_XCFGBASE 0xc0001400 -#define CFG_PCIE2_CFGBASE 0xc0002000 -#define CFG_PCIE2_XCFGBASE 0xc0002400 +#define CFG_PCIE1_CFGBASE 0xc1000000 +#define CFG_PCIE2_CFGBASE 0xc2000000 +#define CFG_PCIE0_XCFGBASE 0xc3000000 +#define CFG_PCIE1_XCFGBASE 0xc3001000 +#define CFG_PCIE2_XCFGBASE 0xc3002000 /* System RAM mapped to PCI space */ #define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE @@ -201,6 +201,7 @@ "setenv filesize;saveenv\0" \ "upd=run load;run update\0" \ "kozio=bootm ffc60000\0" \ + "pciconfighost=1\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -322,7 +323,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#undef CONFIG_PCI_CONFIG_HOST_BRIDGE +#define CONFIG_PCI_CONFIG_HOST_BRIDGE /* Board-specific PCI */ #define CFG_PCI_TARGET_INIT /* let board init pci target */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 50df848139..8ec4742c0f 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -473,7 +473,7 @@ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO55 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO56 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO57 Unselect via TraceSelect Bit */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO58 Unselect via TraceSelect Bit */ \ +{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO58 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO59 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO60 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO61 Unselect via TraceSelect Bit */ \ diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index e0a827fdd7..9a21632162 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -417,11 +417,9 @@ extern void __led_set(led_id_t id, int state); #define CFG_RESET_ADDRESS 0xfff00100 /* pass open firmware flat tree */ -#define CONFIG_OF_FLAT_TREE 1 +#define CONFIG_OF_LIBFDT 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 #define OF_CPU "PowerPC,5200@0" #define OF_SOC "soc5200@f0000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index f4f33f3e08..bd3107ab23 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -80,9 +80,6 @@ #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,7448@0" #define OF_TSI "tsi108@c0000000" #define OF_TBCLK (bd->bi_busfreq / 8) diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 8e51d2d3c0..7653ba1d24 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -266,7 +266,10 @@ #define CONFIG_CMD_DIAG #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT #define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII #define CONFIG_CMD_NET @@ -274,12 +277,10 @@ #define CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO +#define CONFIG_CMD_REISER #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT #define CONFIG_CMD_USB - #define CONFIG_SUPPORT_VFAT /* @@ -488,10 +489,4 @@ /* Offset for alternate registers */ #define CFG_ATA_ALT_OFFSET (0x0000) -/* These addresses need to be shifted one place to the left - * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0) - * These values are shifted - */ -#define CFG_ATA_PORT_ADDR(port) ((port) << 1) - #endif /* __CONFIG_H */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 37a8f87055..e7d8a5a662 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -313,9 +313,6 @@ #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8349@0" #define OF_SOC "soc8349@e0000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 3525ab4c5b..54eac38b86 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -270,9 +270,6 @@ #define CONFIG_OF_FLAT_TREE 1 #define CONFIG_OF_BOARD_SETUP 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,8641@0" #define OF_SOC "soc@f8000000" #define OF_TBCLK (bd->bi_busfreq / 4) diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 824a81240c..c2e1386217 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -400,7 +400,8 @@ *----------------------------------------------------------------------*/ /* General PCI */ #define CONFIG_PCI /* include pci support */ -#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */ +#define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CFG_PCI_CACHE_LINE_SIZE 0 /* to avoid problems with PNP */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/ diff --git a/include/configs/spc1920.h b/include/configs/spc1920.h index b4ab9ad972..2efc8f10ec 100644 --- a/include/configs/spc1920.h +++ b/include/configs/spc1920.h @@ -31,14 +31,9 @@ #undef CONFIG_8xx_CONS_NONE #define CONFIG_MII -/* #define MII_DEBUG */ -/* #define CONFIG_FEC_ENET */ #undef CONFIG_ETHER_ON_FEC1 #define CONFIG_ETHER_ON_FEC2 #define FEC_ENET -/* #define CONFIG_FEC2_PHY_NORXERR */ -/* #define CFG_DISCOVER_PHY */ -/* #define CONFIG_PHY_ADDR 0x1 */ #define CONFIG_FEC2_PHY 1 #define CONFIG_BAUDRATE 19200 @@ -100,14 +95,12 @@ #define CONFIG_CMD_ECHO #define CONFIG_CMD_IMMAP #define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_I2C #define CONFIG_CMD_MII -#undef CONFIG_CMD_NET - - /* * Miscellaneous configurable options */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index f32ff67d9f..b41dafaf98 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -230,7 +230,7 @@ #define CFG_PCI2_IO_SIZE 0x01000000 /* 16M */ #if defined(CONFIG_PCI) /* PCI Ethernet card */ - +#define CONFIG_MPC85XX_PCI2 1 #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 0dbf4b7feb..b035857dce 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -592,9 +592,6 @@ typedef unsigned int led_id_t; /* pass open firmware flat tree */ #define CONFIG_OF_FLAT_TREE 1 -/* maximum size of the flat tree (8K) */ -#define OF_FLAT_TREE_MAX_SIZE 8192 - #define OF_CPU "PowerPC,MPC870@0" #define OF_TBCLK (MPC8XX_HZ / 16) #define CONFIG_OF_HAS_BD_T 1 diff --git a/include/configs/trab.h b/include/configs/trab.h index dbccea28ad..b9088a89ab 100644 --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -419,6 +419,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /* Initial value of the on-board touch screen brightness */ #define CFG_BRIGHTNESS 0x20 diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h new file mode 100644 index 0000000000..84998d4392 --- /dev/null +++ b/include/configs/trizepsiv.h @@ -0,0 +1,325 @@ +/* + * (C) Copyright 2007 + * Stefano Babic, DENX Gmbh, sbabic@denx.de + * + * (C) Copyright 2004 + * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net + * + * (C) Copyright 2002 + * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH + * Marius Groeger + * + * Configuation settings for the LUBBOCK board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_PXA27X 1 /* This is an PXA27x CPU */ + +#define LITTLEENDIAN 1 /* used by usb_ohci.c */ + +#define CONFIG_MMC 1 +#define BOARD_LATE_INIT 1 + +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define RTC + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ + +/* + * select serial console configuration + */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_FFUART 1 /* we use FFUART on Conxs */ +#define CONFIG_BTUART 1 /* we use BTUART on Conxs */ +#define CONFIG_STUART 1 /* we use STUART on Conxs */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_BAUDRATE 38400 + +#define CONFIG_DOS_PARTITION 1 + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_MMC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IMLS +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ + +#undef CONFIG_SHOW_BOOT_PROGRESS + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_SERVERIP 192.168.1.99 +#define CONFIG_BOOTCOMMAND "run boot_flash" +#define CONFIG_BOOTARGS "console=ttyS0,38400 ramdisk_size=12288"\ + " rw root=/dev/ram initrd=0xa0800000,5m" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "program_boot_mmc=" \ + "mw.b 0xa0010000 0xff 0x20000; " \ + "if mmcinit && " \ + "fatload mmc 0 0xa0010000 u-boot.bin; " \ + "then " \ + "protect off 0x0 0x1ffff; " \ + "erase 0x0 0x1ffff; " \ + "cp.b 0xa0010000 0x0 0x20000; " \ + "fi\0" \ + "program_uzImage_mmc=" \ + "mw.b 0xa0010000 0xff 0x180000; " \ + "if mmcinit && " \ + "fatload mmc 0 0xa0010000 uzImage; " \ + "then " \ + "protect off 0x40000 0x1bffff; " \ + "erase 0x40000 0x1bffff; " \ + "cp.b 0xa0010000 0x40000 0x180000; " \ + "fi\0" \ + "program_ramdisk_mmc=" \ + "mw.b 0xa0010000 0xff 0x500000; " \ + "if mmcinit && " \ + "fatload mmc 0 0xa0010000 ramdisk.gz; " \ + "then " \ + "protect off 0x1c0000 0x6bffff; " \ + "erase 0x1c0000 0x6bffff; " \ + "cp.b 0xa0010000 0x1c0000 0x500000; " \ + "fi\0" \ + "boot_mmc=" \ + "if mmcinit && " \ + "fatload mmc 0 0xa0030000 uzImage && " \ + "fatload mmc 0 0xa0800000 ramdisk.gz; " \ + "then " \ + "bootm 0xa0030000; " \ + "fi\0" \ + "boot_flash=" \ + "cp.b 0x1c0000 0xa0800000 0x500000; " \ + "bootm 0x40000\0" \ + +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +/* #define CONFIG_INITRD_TAG 1 */ + +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +/* + * Miscellaneous configurable options + */ +#define CFG_HUSH_PARSER 1 +#define CFG_PROMPT_HUSH_PS2 "> " + +#define CFG_LONGHELP /* undef to save memory */ +#ifdef CFG_HUSH_PARSER +#define CFG_PROMPT "$ " /* Monitor Command Prompt */ +#else +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#endif +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_DEVICE_NULLDEV 1 + +#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ + +#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CFG_LOAD_ADDR 0xa1000000 /* default load address */ + +#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CFG_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */ + + /* valid baudrates */ +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +#define CFG_MMC_BASE 0xF0000000 + +/* + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ +#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ +#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */ +#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */ +#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */ +#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */ +#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */ +#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */ + +#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ + +#define CFG_DRAM_BASE 0xa0000000 +#define CFG_DRAM_SIZE 0x04000000 + +#define CFG_FLASH_BASE PHYS_FLASH_1 + +/* + * GPIO settings + */ +#define CFG_GPSR0_VAL 0x00018000 +#define CFG_GPSR1_VAL 0x00000000 +#define CFG_GPSR2_VAL 0x400dc000 +#define CFG_GPSR3_VAL 0x00000000 +#define CFG_GPCR0_VAL 0x00000000 +#define CFG_GPCR1_VAL 0x00000000 +#define CFG_GPCR2_VAL 0x00000000 +#define CFG_GPCR3_VAL 0x00000000 +#define CFG_GPDR0_VAL 0x00018000 +#define CFG_GPDR1_VAL 0x00028801 +#define CFG_GPDR2_VAL 0x520dc000 +#define CFG_GPDR3_VAL 0x0001E000 +#define CFG_GAFR0_L_VAL 0x801c0000 +#define CFG_GAFR0_U_VAL 0x00000013 +#define CFG_GAFR1_L_VAL 0x6990100A +#define CFG_GAFR1_U_VAL 0x00000008 +#define CFG_GAFR2_L_VAL 0xA0000000 +#define CFG_GAFR2_U_VAL 0x010900F2 +#define CFG_GAFR3_L_VAL 0x54000003 +#define CFG_GAFR3_U_VAL 0x00002401 +#define CFG_GRER0_VAL 0x00000000 +#define CFG_GRER1_VAL 0x00000000 +#define CFG_GRER2_VAL 0x00000000 +#define CFG_GRER3_VAL 0x00000000 +#define CFG_GFER0_VAL 0x00000000 +#define CFG_GFER1_VAL 0x00000000 +#define CFG_GFER2_VAL 0x00000000 +#define CFG_GFER3_VAL 0x00000020 + + +#define CFG_PSSR_VAL 0x20 /* CHECK */ + +/* + * Clock settings + */ +#define CFG_CKEN 0x01FFFFFF /* CHECK */ +#define CFG_CCCR 0x02000290 /* 520Mhz */ + +/* + * Memory settings + */ + +#define CFG_MSC0_VAL 0x4df84df0 +#define CFG_MSC1_VAL 0x7ff87ff4 +#define CFG_MSC2_VAL 0xa26936d4 +#define CFG_MDCNFG_VAL 0x880009C9 +#define CFG_MDREFR_VAL 0x20ca201e +#define CFG_MDMRS_VAL 0x00220022 + +#define CFG_FLYCNFG_VAL 0x00000000 +#define CFG_SXCNFG_VAL 0x40044004 + +/* + * PCMCIA and CF Interfaces + */ +#define CFG_MECR_VAL 0x00000001 +#define CFG_MCMEM0_VAL 0x00004204 +#define CFG_MCMEM1_VAL 0x00010204 +#define CFG_MCATT0_VAL 0x00010504 +#define CFG_MCATT1_VAL 0x00010504 +#define CFG_MCIO0_VAL 0x00008407 +#define CFG_MCIO1_VAL 0x0000c108 + +#define CONFIG_DRIVER_DM9000 1 +#define CONFIG_DRIVER_DM9000 1 +#define CONFIG_DM9000_BASE 0x08000000 +#define DM9000_IO CONFIG_DM9000_BASE +#define DM9000_DATA (CONFIG_DM9000_BASE+0x8004) +/* #define CONFIG_DM9000_USE_8BIT */ +/* #define CONFIG_DM9000_USE_16BIT */ +#define CONFIG_DM9000_USE_32BIT + +#define CONFIG_USB_OHCI_NEW 1 +#define CFG_USB_OHCI_BOARD_INIT 1 +#define CFG_USB_OHCI_MAX_ROOT_PORTS 3 +#define CFG_USB_OHCI_REGS_BASE 0x4C000000 +#define CFG_USB_OHCI_SLOT_NAME "trizepsiv" +#define CONFIG_USB_STORAGE 1 +#define CFG_USB_OHCI_CPU_INIT 1 + +/* + * FLASH and environment organization + */ + +#define CFG_FLASH_CFI +#define CFG_FLASH_CFI_DRIVER 1 + +#define CFG_MONITOR_BASE 0 +#define CFG_MONITOR_LEN 0x40000 + +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 4 + 255 /* max number of sectors on one chip */ + +/* timeout values are in ticks */ +#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */ + +/* write flash less slowly */ +#define CFG_FLASH_USE_BUFFER_WRITE 1 + +/* Flash environment locations */ +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) /* Addr of Environment Sector */ +#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment */ +#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */ + +/* Address and size of Redundant Environment Sector */ +#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE) +#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) + +#endif /* __CONFIG_H */ diff --git a/include/configs/uc101.h b/include/configs/uc101.h index 3b471d0a97..aed80ec1e5 100644 --- a/include/configs/uc101.h +++ b/include/configs/uc101.h @@ -332,7 +332,6 @@ #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */ #define CONFIG_IDE_PREINIT 1 -/* #define CONFIG_IDE_RESET 1 beispile siehe tqm5200.c */ #define CFG_ATA_IDE0_OFFSET 0x0000 diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h index 561a8bc47b..edae6f4b98 100644 --- a/include/configs/virtlab2.h +++ b/include/configs/virtlab2.h @@ -207,6 +207,8 @@ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) +#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */ + /*----------------------------------------------------------------------- * Hardware Information Block */ diff --git a/include/configs/yucca.h b/include/configs/yucca.h index 906f046fa7..74033b4aef 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -68,11 +68,11 @@ #define CFG_PCIE_BASE 0xe0000000 /* PCIe UTL regs */ #define CFG_PCIE0_CFGBASE 0xc0000000 -#define CFG_PCIE0_XCFGBASE 0xc0000400 -#define CFG_PCIE1_CFGBASE 0xc0001000 -#define CFG_PCIE1_XCFGBASE 0xc0001400 -#define CFG_PCIE2_CFGBASE 0xc0002000 -#define CFG_PCIE2_XCFGBASE 0xc0002400 +#define CFG_PCIE1_CFGBASE 0xc1000000 +#define CFG_PCIE2_CFGBASE 0xc2000000 +#define CFG_PCIE0_XCFGBASE 0xc3000000 +#define CFG_PCIE1_XCFGBASE 0xc3001000 +#define CFG_PCIE2_XCFGBASE 0xc3002000 /* System RAM mapped to PCI space */ #define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE @@ -182,6 +182,7 @@ "cp.b ${fileaddr} FFFB0000 ${filesize};" \ "setenv filesize;saveenv\0" \ "upd=run load;run update\0" \ + "pciconfighost=1\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -297,7 +298,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#undef CONFIG_PCI_CONFIG_HOST_BRIDGE +#define CONFIG_PCI_CONFIG_HOST_BRIDGE /* Board-specific PCI */ #define CFG_PCI_TARGET_INIT /* let board init pci target */ diff --git a/include/ide.h b/include/ide.h index 6976a6c319..222f4f84e4 100644 --- a/include/ide.h +++ b/include/ide.h @@ -26,6 +26,8 @@ #define IDE_BUS(dev) (dev >> 1) +#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)]) + #ifdef CONFIG_IDE_LED /* diff --git a/include/image.h b/include/image.h index 2f575fd2d7..432fa22393 100644 --- a/include/image.h +++ b/include/image.h @@ -77,6 +77,7 @@ #define IH_CPU_NIOS2 15 /* Nios-II */ #define IH_CPU_BLACKFIN 16 /* Blackfin */ #define IH_CPU_AVR32 17 /* AVR32 */ +#define IH_CPU_ST200 18 /* STMicroelectronics ST200 */ /* * Image Types diff --git a/include/libfdt.h b/include/libfdt.h index 340e89d9ce..38c65a9899 100644 --- a/include/libfdt.h +++ b/include/libfdt.h @@ -140,6 +140,8 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name, }) #define fdt_setprop_string(fdt, nodeoffset, name, str) \ fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) +int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, + const void *val, int len, int create); int fdt_delprop(void *fdt, int nodeoffset, const char *name); int fdt_add_subnode_namelen(void *fdt, int parentoffset, const char *name, int namelen); diff --git a/include/s3c2410.h b/include/s3c2410.h index 86495f6289..87135b45dd 100644 --- a/include/s3c2410.h +++ b/include/s3c2410.h @@ -69,75 +69,75 @@ typedef enum { #include -static inline S3C24X0_MEMCTL * const S3C24X0_GetBase_MEMCTL(void) +static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void) { return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE; } -static inline S3C24X0_USB_HOST * const S3C24X0_GetBase_USB_HOST(void) +static inline S3C24X0_USB_HOST * S3C24X0_GetBase_USB_HOST(void) { return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE; } -static inline S3C24X0_INTERRUPT * const S3C24X0_GetBase_INTERRUPT(void) +static inline S3C24X0_INTERRUPT * S3C24X0_GetBase_INTERRUPT(void) { return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE; } -static inline S3C24X0_DMAS * const S3C24X0_GetBase_DMAS(void) +static inline S3C24X0_DMAS * S3C24X0_GetBase_DMAS(void) { return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE; } -static inline S3C24X0_CLOCK_POWER * const S3C24X0_GetBase_CLOCK_POWER(void) +static inline S3C24X0_CLOCK_POWER * S3C24X0_GetBase_CLOCK_POWER(void) { return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE; } -static inline S3C24X0_LCD * const S3C24X0_GetBase_LCD(void) +static inline S3C24X0_LCD * S3C24X0_GetBase_LCD(void) { return (S3C24X0_LCD * const)S3C24X0_LCD_BASE; } -static inline S3C2410_NAND * const S3C2410_GetBase_NAND(void) +static inline S3C2410_NAND * S3C2410_GetBase_NAND(void) { return (S3C2410_NAND * const)S3C2410_NAND_BASE; } -static inline S3C24X0_UART * const S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr) +static inline S3C24X0_UART * S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr) { return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000)); } -static inline S3C24X0_TIMERS * const S3C24X0_GetBase_TIMERS(void) +static inline S3C24X0_TIMERS * S3C24X0_GetBase_TIMERS(void) { return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE; } -static inline S3C24X0_USB_DEVICE * const S3C24X0_GetBase_USB_DEVICE(void) +static inline S3C24X0_USB_DEVICE * S3C24X0_GetBase_USB_DEVICE(void) { return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE; } -static inline S3C24X0_WATCHDOG * const S3C24X0_GetBase_WATCHDOG(void) +static inline S3C24X0_WATCHDOG * S3C24X0_GetBase_WATCHDOG(void) { return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE; } -static inline S3C24X0_I2C * const S3C24X0_GetBase_I2C(void) +static inline S3C24X0_I2C * S3C24X0_GetBase_I2C(void) { return (S3C24X0_I2C * const)S3C24X0_I2C_BASE; } -static inline S3C24X0_I2S * const S3C24X0_GetBase_I2S(void) +static inline S3C24X0_I2S * S3C24X0_GetBase_I2S(void) { return (S3C24X0_I2S * const)S3C24X0_I2S_BASE; } -static inline S3C24X0_GPIO * const S3C24X0_GetBase_GPIO(void) +static inline S3C24X0_GPIO * S3C24X0_GetBase_GPIO(void) { return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE; } -static inline S3C24X0_RTC * const S3C24X0_GetBase_RTC(void) +static inline S3C24X0_RTC * S3C24X0_GetBase_RTC(void) { return (S3C24X0_RTC * const)S3C24X0_RTC_BASE; } -static inline S3C2410_ADC * const S3C2410_GetBase_ADC(void) +static inline S3C2410_ADC * S3C2410_GetBase_ADC(void) { return (S3C2410_ADC * const)S3C2410_ADC_BASE; } -static inline S3C24X0_SPI * const S3C24X0_GetBase_SPI(void) +static inline S3C24X0_SPI * S3C24X0_GetBase_SPI(void) { return (S3C24X0_SPI * const)S3C24X0_SPI_BASE; } -static inline S3C2410_SDI * const S3C2410_GetBase_SDI(void) +static inline S3C2410_SDI * S3C2410_GetBase_SDI(void) { return (S3C2410_SDI * const)S3C2410_SDI_BASE; } diff --git a/include/serial.h b/include/serial.h index f7412fd173..30bfde3089 100644 --- a/include/serial.h +++ b/include/serial.h @@ -36,6 +36,10 @@ extern struct serial_device eserial4_device; #endif +extern struct serial_device serial_ffuart_device; +extern struct serial_device serial_btuart_device; +extern struct serial_device serial_stuart_device; + extern void serial_initialize(void); extern void serial_devices_init(void); extern int serial_assign(char * name); diff --git a/lib_arm/board.c b/lib_arm/board.c index d37e5dab35..d28afc52f9 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -314,6 +314,10 @@ void start_armboot (void) drv_vfd_init(); #endif /* CONFIG_VFD */ +#ifdef CONFIG_SERIAL_MULTI + serial_initialize(); +#endif + /* IP Address */ gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c index 36a969e731..7c9990f8e0 100644 --- a/lib_blackfin/board.c +++ b/lib_blackfin/board.c @@ -42,6 +42,8 @@ int post_flag; #endif +DECLARE_GLOBAL_DATA_PTR; + #ifndef CFG_NO_FLASH extern flash_info_t flash_info[]; #endif @@ -126,8 +128,6 @@ static void display_flash_config(ulong size) static int init_baudrate(void) { - DECLARE_GLOBAL_DATA_PTR; - char tmp[64]; int i = getenv_r("baudrate", tmp, sizeof(tmp)); gd->bd->bi_baudrate = gd->baudrate = (i > 0) @@ -139,7 +139,6 @@ static int init_baudrate(void) #ifdef DEBUG static void display_global_data(void) { - DECLARE_GLOBAL_DATA_PTR; bd_t *bd; bd = gd->bd; printf("--flags:%x\n", gd->flags); @@ -256,7 +255,6 @@ void init_cplbtables(void) void board_init_f(ulong bootflag) { - DECLARE_GLOBAL_DATA_PTR; ulong addr; bd_t *bd; int i; @@ -325,7 +323,6 @@ static int init_func_i2c(void) void board_init_r(gd_t * id, ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; ulong size; extern void malloc_bin_reloc(void); char *s, *e; diff --git a/lib_blackfin/post.c b/lib_blackfin/post.c index 7c9478def5..3c4d5c51dd 100644 --- a/lib_blackfin/post.c +++ b/lib_blackfin/post.c @@ -32,14 +32,14 @@ #ifdef CONFIG_POST +DECLARE_GLOBAL_DATA_PTR; + #define POST_MAX_NUMBER 32 #define BOOTMODE_MAGIC 0xDEAD0000 int post_init_f(void) { - DECLARE_GLOBAL_DATA_PTR; - int res = 0; unsigned int i; @@ -62,7 +62,6 @@ int post_init_f(void) void post_bootmode_init(void) { - DECLARE_GLOBAL_DATA_PTR; int bootmode = post_bootmode_get(0); int newword; @@ -109,20 +108,17 @@ int post_bootmode_get(unsigned int *last_test) /* POST tests run before relocation only mark status bits .... */ static void post_log_mark_start(unsigned long testid) { - DECLARE_GLOBAL_DATA_PTR; gd->post_log_word |= (testid) << 16; } static void post_log_mark_succ(unsigned long testid) { - DECLARE_GLOBAL_DATA_PTR; gd->post_log_word |= testid; } /* ... and the messages are output once we are relocated */ void post_output_backlog(void) { - DECLARE_GLOBAL_DATA_PTR; int j; for (j = 0; j < post_list_size; j++) { @@ -372,8 +368,6 @@ int post_log(char *format, ...) void post_reloc(void) { - DECLARE_GLOBAL_DATA_PTR; - unsigned int i; /* diff --git a/libfdt/fdt_rw.c b/libfdt/fdt_rw.c index 693bfe43a2..55fcc41d1a 100644 --- a/libfdt/fdt_rw.c +++ b/libfdt/fdt_rw.c @@ -188,6 +188,32 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name, return 0; } +/** + * fdt_find_and_setprop: Find a node and set it's property + * + * @fdt: ptr to device tree + * @node: path of node + * @prop: property name + * @val: ptr to new value + * @len: length of new property value + * @create: flag to create the property if it doesn't exist + * + * Convenience function to directly set a property given the path to the node. + */ +int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, + const void *val, int len, int create) +{ + int nodeoff = fdt_find_node_by_path(fdt, node); + + if (nodeoff < 0) + return nodeoff; + + if ((!create) && (fdt_get_property(fdt, nodeoff, prop, 0) == NULL)) + return 0; /* create flag not set; so exit quietly */ + + return fdt_setprop(fdt, nodeoff, prop, val, len); +} + int fdt_delprop(void *fdt, int nodeoffset, const char *name) { struct fdt_property *prop; diff --git a/nand_spl/board/amcc/bamboo/Makefile b/nand_spl/board/amcc/bamboo/Makefile index 0df86f99d4..8b5461dcf4 100644 --- a/nand_spl/board/amcc/bamboo/Makefile +++ b/nand_spl/board/amcc/bamboo/Makefile @@ -84,6 +84,12 @@ $(obj)nand_ecc.c: @rm -f $(obj)nand_ecc.c ln -s $(SRCTREE)/drivers/nand/nand_ecc.c $(obj)nand_ecc.c +ifneq ($(OBJTREE), $(SRCTREE)) +$(obj)sdram.c: + @rm -f $(obj)sdram.c + ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/sdram.c $(obj)sdram.c +endif + ######################################################################### $(obj)%.o: $(obj)%.S diff --git a/net/bootp.c b/net/bootp.c index be1ee332a5..749d3e5e0c 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -730,7 +730,7 @@ static void DhcpOptionsProcess (uchar * popt, Bootp_t *bp) break; #if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_TIMEOFFSET) case 2: /* Time offset */ - NetCopyLong (&NetTimeOffset, (ulong *) (popt + 2)); + NetCopyLong ((ulong *)&NetTimeOffset, (ulong *) (popt + 2)); NetTimeOffset = ntohl (NetTimeOffset); break; #endif diff --git a/net/net.c b/net/net.c index c47610e745..cde26801b3 100644 --- a/net/net.c +++ b/net/net.c @@ -541,11 +541,11 @@ restart: case NETLOOP_SUCCESS: if (NetBootFileXferSize > 0) { - char buf[10]; + char buf[20]; printf("Bytes transferred = %ld (%lx hex)\n", NetBootFileXferSize, NetBootFileXferSize); - sprintf(buf, "%lx", NetBootFileXferSize); + sprintf(buf, "%lX", NetBootFileXferSize); setenv("filesize", buf); sprintf(buf, "%lX", (unsigned long)load_addr); diff --git a/net/tftp.c b/net/tftp.c index d6db91c058..5ee7676466 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -178,7 +178,7 @@ TftpSend (void) pkt += strlen((char *)pkt) + 1; /* try for more effic. blk size */ pkt += sprintf((char *)pkt,"blksize%c%d%c", - 0,htons(TftpBlkSizeOption),0); + 0,TftpBlkSizeOption,0); #ifdef CONFIG_MCAST_TFTP /* Check all preconditions before even trying the option */ if (!ProhibitMcast @@ -276,8 +276,12 @@ TftpHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len) #endif TftpState = STATE_OACK; TftpServerPort = src; - /* Check for 'blksize' option */ - for (i=0;i