From: John Crispin Date: Fri, 23 Aug 2013 06:31:31 +0000 (+0200) Subject: MIPS: ralink: mt7620: Add wdt clock definition X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=68c9b7ed9ead9c5b38c2efa690b6bdae00a09d8c;p=linux-beck.git MIPS: ralink: mt7620: Add wdt clock definition The watchdog driver of the SoC uses the clk API to get the clock associated with the watchdog device. However the MT7620 specific setup code does not register a clock for the watchdog device yet which leads to the following error: rt2880_wdt: probe of 10000120.watchdog failed with error -2 Register a clock device for the watchdog in order to avoid the error and make the watchdog usable. Signed-off-by: John Crispin Signed-off-by: Gabor Juhos Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5756/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 61dcee8248de..7759c5a59a5d 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -316,6 +316,7 @@ void __init ralink_clk_init(void) ralink_clk_add("cpu", cpu_rate); ralink_clk_add("10000100.timer", periph_rate); + ralink_clk_add("10000120.watchdog", periph_rate); ralink_clk_add("10000500.uart", periph_rate); ralink_clk_add("10000c00.uartlite", periph_rate); }