From: Mike Turquette <mturquette@linaro.org>
Date: Sun, 29 Dec 2013 21:37:56 +0000 (-0800)
Subject: Merge tag 'sunxi-clk-3.14-for-mike' of https://bitbucket.org/emiliolopez/linux into... 
X-Git-Tag: next-20140106~5^2~2
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=6b71e0d9d6bfd24d2426a4ea7edf3c01d872903f;p=karo-tx-linux.git

Merge tag 'sunxi-clk-3.14-for-mike' of https://bitbucket.org/emiliolopez/linux into clk-next-sunxi

Allwinner sunXi SoCs clock changes

This contains the clk driver parts of the "[PATCH v3 00/13] clk: sunxi:
add PLL5 and PLL6 support" series. It adds support for PLL4/5/6 and
mod0 clocks on most sunxi platforms. Additionally, it contains "[PATCH
1/4] clk: sunxi: Allwinner A20 output clock support" (v2) from Chen-Yu
Tsai, which adds support for output clocks present on A20.
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6b71e0d9d6bfd24d2426a4ea7edf3c01d872903f