From: Mike McCormack Date: Sun, 6 Feb 2011 13:56:37 +0000 (+0900) Subject: staging: rtl8192e: Remove rf_chip variable, hardcode to RF_8256 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=6f304eb29125858abff1f87755900e3f89c48aee;p=linux-beck.git staging: rtl8192e: Remove rf_chip variable, hardcode to RF_8256 Signed-off-by: Mike McCormack Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/rtl8192e/r8190_rtl8256.c b/drivers/staging/rtl8192e/r8190_rtl8256.c index 7e948daac055..6f63f9cd1154 100644 --- a/drivers/staging/rtl8192e/r8190_rtl8256.c +++ b/drivers/staging/rtl8192e/r8190_rtl8256.c @@ -299,10 +299,7 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel) #define MAX_DOZE_WAITING_TIMES_9x 64 static bool -SetRFPowerState8190( - struct net_device* dev, - RT_RF_POWER_STATE eRFPowerState - ) +SetRFPowerState8190(struct net_device *dev, RT_RF_POWER_STATE eRFPowerState) { struct r8192_priv *priv = ieee80211_priv(dev); PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); @@ -314,147 +311,138 @@ SetRFPowerState8190( return false; priv->SetRFPowerStateInProgress = true; - switch(priv->rf_chip) + switch( eRFPowerState ) { - case RF_8256: - switch( eRFPowerState ) + case eRfOn: + + // turn on RF + if((priv->ieee80211->eRFPowerState == eRfOff) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) + { // The current RF state is OFF and the RF OFF level is halting the NIC, re-initialize the NIC. + bool rtstatus = true; + u32 InitializeCount = 3; + do + { + InitializeCount--; + rtstatus = NicIFEnableNIC(dev); + }while( (rtstatus != true) &&(InitializeCount >0) ); + + if(rtstatus != true) + { + RT_TRACE(COMP_ERR,"%s():Initialize Adapter fail,return\n",__FUNCTION__); + priv->SetRFPowerStateInProgress = false; + return false; + } + + RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); + } else { + write_nic_byte(priv, ANAPAR, 0x37);//160MHz + mdelay(1); + //enable clock 80/88 MHz + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x1); // 0x880[2] + priv->bHwRfOffAction = 0; + + //RF-A, RF-B + //enable RF-Chip A/B + rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4] + //analog to digital on + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8] + //digital to analog on + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x3); // 0x880[4:3] + //rx antenna on + rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0] + //rx antenna on + rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0] + //analog to digital part2 on + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] + + } + + break; + + // + // In current solution, RFSleep=RFOff in order to save power under 802.11 power save. + // By Bruce, 2008-01-16. + // + case eRfSleep: + + // HW setting had been configured with deeper mode. + if(priv->ieee80211->eRFPowerState == eRfOff) + break; + + for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) { - case eRfOn: - - // turn on RF - if((priv->ieee80211->eRFPowerState == eRfOff) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) - { // The current RF state is OFF and the RF OFF level is halting the NIC, re-initialize the NIC. - bool rtstatus = true; - u32 InitializeCount = 3; - do - { - InitializeCount--; - rtstatus = NicIFEnableNIC(dev); - }while( (rtstatus != true) &&(InitializeCount >0) ); - - if(rtstatus != true) - { - RT_TRACE(COMP_ERR,"%s():Initialize Adapter fail,return\n",__FUNCTION__); - priv->SetRFPowerStateInProgress = false; - return false; - } - - RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); - } else { - write_nic_byte(priv, ANAPAR, 0x37);//160MHz - mdelay(1); - //enable clock 80/88 MHz - rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x1); // 0x880[2] - priv->bHwRfOffAction = 0; - - //RF-A, RF-B - //enable RF-Chip A/B - rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4] - //analog to digital on - rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8] - //digital to analog on - rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x3); // 0x880[4:3] - //rx antenna on - rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0] - //rx antenna on - rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0] - //analog to digital part2 on - rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] + ring = &priv->tx_ring[QueueID]; - } + if(skb_queue_len(&ring->queue) == 0) + { + QueueID++; + continue; + } + else + { + RT_TRACE((COMP_POWER|COMP_RF), "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); + udelay(10); + i++; + } + if(i >= MAX_DOZE_WAITING_TIMES_9x) + { + RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); break; + } + } - // - // In current solution, RFSleep=RFOff in order to save power under 802.11 power save. - // By Bruce, 2008-01-16. - // - case eRfSleep: - - // HW setting had been configured with deeper mode. - if(priv->ieee80211->eRFPowerState == eRfOff) - break; - - for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) - { - ring = &priv->tx_ring[QueueID]; - - if(skb_queue_len(&ring->queue) == 0) - { - QueueID++; - continue; - } - else - { - RT_TRACE((COMP_POWER|COMP_RF), "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); - udelay(10); - i++; - } - - if(i >= MAX_DOZE_WAITING_TIMES_9x) - { - RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); - break; - } - } - - PHY_SetRtl8192eRfOff(dev); + PHY_SetRtl8192eRfOff(dev); - break; + break; - case eRfOff: + case eRfOff: - // - // Disconnect with Any AP or STA. - // - for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) - { - ring = &priv->tx_ring[QueueID]; - - if(skb_queue_len(&ring->queue) == 0) - { - QueueID++; - continue; - } - else - { - RT_TRACE(COMP_POWER, - "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); - udelay(10); - i++; - } - - if(i >= MAX_DOZE_WAITING_TIMES_9x) - { - RT_TRACE(COMP_POWER, "\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); - break; - } - } + // + // Disconnect with Any AP or STA. + // + for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) + { + ring = &priv->tx_ring[QueueID]; + if(skb_queue_len(&ring->queue) == 0) + { + QueueID++; + continue; + } + else + { + RT_TRACE(COMP_POWER, + "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); + udelay(10); + i++; + } - if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) - { // Disable all components. - NicIFDisableNIC(dev); - RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); - } - else if (!(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC)) - { // Normal case. - // IPS should go to this. - PHY_SetRtl8192eRfOff(dev); - } + if(i >= MAX_DOZE_WAITING_TIMES_9x) + { + RT_TRACE(COMP_POWER, "\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); break; - - default: - bResult = false; - RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknow state to set: 0x%X!!!\n", eRFPowerState); - break; + } } + + if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) + { + /* Disable all components. */ + NicIFDisableNIC(dev); + RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); + } + else if (!(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC)) + { + /* Normal case - IPS should go to this. */ + PHY_SetRtl8192eRfOff(dev); + } break; - default: - RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown RF type\n"); - break; + default: + bResult = false; + RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknow state to set: 0x%X!!!\n", eRFPowerState); + break; } if(bResult) diff --git a/drivers/staging/rtl8192e/r8192E.h b/drivers/staging/rtl8192e/r8192E.h index de5649285a8c..81aea8816d35 100644 --- a/drivers/staging/rtl8192e/r8192E.h +++ b/drivers/staging/rtl8192e/r8192E.h @@ -543,15 +543,6 @@ typedef struct _BB_REGISTER_DEFINITION{ u32 rfLSSIReadBack; //LSSI RF readback data // 0x8a0~0x8af [16 bytes] }BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; -typedef enum _RT_RF_TYPE_819xU{ - RF_TYPE_MIN = 0, - RF_8225, - RF_8256, - RF_8258, - RF_PSEUDO_11N = 4, -}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU; - - typedef struct _rate_adaptive { u8 rate_adaptive_disabled; @@ -852,7 +843,6 @@ typedef struct r8192_priv struct semaphore wx_sem; struct semaphore rf_sem; //used to lock rf write operation added by wb, modified by david u8 rf_type; /* 0 means 1T2R, 1 means 2T4R */ - RT_RF_TYPE_819xU rf_chip; short (*rf_set_sens)(struct net_device *dev,short sens); u8 (*rf_set_chan)(struct net_device *dev,u8 ch); diff --git a/drivers/staging/rtl8192e/r8192E_core.c b/drivers/staging/rtl8192e/r8192E_core.c index 29c36c489016..84b56cc27ff7 100644 --- a/drivers/staging/rtl8192e/r8192E_core.c +++ b/drivers/staging/rtl8192e/r8192E_core.c @@ -152,15 +152,9 @@ static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv) Dot11d_Init(ieee); ieee->bGlobalDomain = false; //acturally 8225 & 8256 rf chip only support B,G,24N mode - if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256)) - { - min_chan = 1; - max_chan = 14; - } - else - { - RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__); - } + min_chan = 1; + max_chan = 14; + if (ChannelPlan[channel_plan].Len != 0){ // Clear old channel map memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map)); @@ -1832,25 +1826,9 @@ static void rtl8192_refresh_supportrate(struct r8192_priv* priv) memset(ieee->Regdot11HTOperationalRateSet, 0, 16); } -static u8 rtl8192_getSupportedWireleeMode(struct net_device*dev) +static u8 rtl8192_getSupportedWireleeMode(struct net_device *dev) { - struct r8192_priv *priv = ieee80211_priv(dev); - u8 ret = 0; - switch(priv->rf_chip) - { - case RF_8225: - case RF_8256: - case RF_PSEUDO_11N: - ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B); - break; - case RF_8258: - ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G); - break; - default: - ret = WIRELESS_MODE_B; - break; - } - return ret; + return (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B); } static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode) @@ -2480,8 +2458,6 @@ static void rtl8192_read_eeprom_info(struct r8192_priv *priv) //1 Make a copy for following variables and we can change them if we want - priv->rf_chip= RF_8256; - if(priv->RegChannelPlan == 0xf) { priv->ChannelPlan = priv->eeprom_ChannelPlan; diff --git a/drivers/staging/rtl8192e/r819xE_phy.c b/drivers/staging/rtl8192e/r819xE_phy.c index a1312d8f7511..ef23b0eaf659 100644 --- a/drivers/staging/rtl8192e/r819xE_phy.c +++ b/drivers/staging/rtl8192e/r819xE_phy.c @@ -669,35 +669,28 @@ static u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eR Offset &= 0x3f; //switch page for 8256 RF IC - if (priv->rf_chip == RF_8256) + //analog to digital off, for protection + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8] + if (Offset >= 31) { - //analog to digital off, for protection - rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8] - if (Offset >= 31) - { - priv->RfReg0Value[eRFPath] |= 0x140; - //Switch to Reg_Mode2 for Reg 31-45 - rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) ); - //modify offset - NewOffset = Offset -30; - } - else if (Offset >= 16) - { - priv->RfReg0Value[eRFPath] |= 0x100; - priv->RfReg0Value[eRFPath] &= (~0x40); - //Switch to Reg_Mode 1 for Reg16-30 - rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) ); + priv->RfReg0Value[eRFPath] |= 0x140; + //Switch to Reg_Mode2 for Reg 31-45 + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) ); + //modify offset + NewOffset = Offset -30; + } + else if (Offset >= 16) + { + priv->RfReg0Value[eRFPath] |= 0x100; + priv->RfReg0Value[eRFPath] &= (~0x40); + //Switch to Reg_Mode 1 for Reg16-30 + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) ); - NewOffset = Offset - 15; - } - else - NewOffset = Offset; + NewOffset = Offset - 15; } else - { - RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be 8256\n"); NewOffset = Offset; - } + //put desired read addr to LSSI control Register rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, NewOffset); //Issue a posedge trigger @@ -713,23 +706,18 @@ static u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eR // Switch back to Reg_Mode0; - if(priv->rf_chip == RF_8256) - { - priv->RfReg0Value[eRFPath] &= 0xebf; - - rtl8192_setBBreg( - dev, - pPhyReg->rf3wireOffset, - bMaskDWord, - (priv->RfReg0Value[eRFPath] << 16)); + priv->RfReg0Value[eRFPath] &= 0xebf; - //analog to digital on - rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8] - } + rtl8192_setBBreg( + dev, + pPhyReg->rf3wireOffset, + bMaskDWord, + (priv->RfReg0Value[eRFPath] << 16)); + //analog to digital on + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8] return ret; - } /****************************************************************************** @@ -759,33 +747,25 @@ static void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath]; Offset &= 0x3f; - if (priv->rf_chip == RF_8256) - { - //analog to digital off, for protection - rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8] + //analog to digital off, for protection + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8] - if (Offset >= 31) - { - priv->RfReg0Value[eRFPath] |= 0x140; - rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16)); - NewOffset = Offset - 30; - } - else if (Offset >= 16) - { - priv->RfReg0Value[eRFPath] |= 0x100; - priv->RfReg0Value[eRFPath] &= (~0x40); - rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16)); - NewOffset = Offset - 15; - } - else - NewOffset = Offset; + if (Offset >= 31) + { + priv->RfReg0Value[eRFPath] |= 0x140; + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16)); + NewOffset = Offset - 30; } - else + else if (Offset >= 16) { - RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be 8256\n"); - NewOffset = Offset; + priv->RfReg0Value[eRFPath] |= 0x100; + priv->RfReg0Value[eRFPath] &= (~0x40); + rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16)); + NewOffset = Offset - 15; } + else + NewOffset = Offset; // Put write addr in [5:0] and write data in [31:16] DataAndAddr = (Data<<16) | (NewOffset&0x3f); @@ -798,20 +778,17 @@ static void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E priv->RfReg0Value[eRFPath] = Data; // Switch back to Reg_Mode0; - if(priv->rf_chip == RF_8256) + if(Offset != 0) { - if(Offset != 0) - { - priv->RfReg0Value[eRFPath] &= 0xebf; - rtl8192_setBBreg( - dev, - pPhyReg->rf3wireOffset, - bMaskDWord, - (priv->RfReg0Value[eRFPath] << 16)); - } - //analog to digital on - rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8] + priv->RfReg0Value[eRFPath] &= 0xebf; + rtl8192_setBBreg( + dev, + pPhyReg->rf3wireOffset, + bMaskDWord, + (priv->RfReg0Value[eRFPath] << 16)); } + //analog to digital on + rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8] } /****************************************************************************** @@ -1555,22 +1532,8 @@ void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel) pHalData->CurrentCckTxPwrIdx = powerlevel; pHalData->CurrentOfdm24GTxPwrIdx = powerlevelOFDM24G; #endif - switch(priv->rf_chip) - { - case RF_8225: - // PHY_SetRF8225CckTxPower(Adapter, powerlevel); - // PHY_SetRF8225OfdmTxPower(Adapter, powerlevelOFDM24G); - break; - case RF_8256: - PHY_SetRF8256CCKTxPower(dev, powerlevel); //need further implement - PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G); - break; - case RF_8258: - break; - default: - RT_TRACE(COMP_ERR, "unknown rf chip in funtion %s()\n", __FUNCTION__); - break; - } + PHY_SetRF8256CCKTxPower(dev, powerlevel); //need further implement + PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G); } /****************************************************************************** @@ -1581,28 +1544,7 @@ void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel) * ***************************************************************************/ RT_STATUS rtl8192_phy_RFConfig(struct net_device* dev) { - struct r8192_priv *priv = ieee80211_priv(dev); - RT_STATUS rtStatus = RT_STATUS_SUCCESS; - switch(priv->rf_chip) - { - case RF_8225: -// rtStatus = PHY_RF8225_Config(Adapter); - break; - case RF_8256: - rtStatus = PHY_RF8256_Config(dev); - break; - - case RF_8258: - break; - case RF_PSEUDO_11N: - //rtStatus = PHY_RF8225_Config(Adapter); - break; - - default: - RT_TRACE(COMP_ERR, "error chip id\n"); - break; - } - return rtStatus; + return PHY_RF8256_Config(dev); } /****************************************************************************** @@ -1699,27 +1641,10 @@ static void rtl8192_SetTxPowerLevel(struct net_device *dev, u8 channel) u8 powerlevel = priv->TxPowerLevelCCK[channel-1]; u8 powerlevelOFDM24G = priv->TxPowerLevelOFDM24G[channel-1]; - switch(priv->rf_chip) - { - case RF_8225: -#ifdef TO_DO_LIST - PHY_SetRF8225CckTxPower(Adapter, powerlevel); - PHY_SetRF8225OfdmTxPower(Adapter, powerlevelOFDM24G); -#endif - break; - - case RF_8256: - PHY_SetRF8256CCKTxPower(dev, powerlevel); - PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G); - break; - - case RF_8258: - break; - default: - RT_TRACE(COMP_ERR, "unknown rf chip ID in rtl8192_SetTxPowerLevel()\n"); - break; - } + PHY_SetRF8256CCKTxPower(dev, powerlevel); + PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G); } + /**************************************************************************************** *function: This function set command table variable(struct SwChnlCmd). * input: SwChnlCmd* CmdTable //table to be set. @@ -1823,42 +1748,17 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8* s // <3> Fill up RF dependent command. RfDependCmdCnt = 0; - switch( priv->rf_chip ) - { - case RF_8225: - if (!(channel >= 1 && channel <= 14)) - { - RT_TRACE(COMP_ERR, "illegal channel for Zebra 8225: %d\n", channel); - return false; - } - rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_RF_WriteReg, rZebra1_Channel, RF_CHANNEL_TABLE_ZEBRA[channel], 10); - rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_End, 0, 0, 0); - break; - - case RF_8256: - // TEST!! This is not the table for 8256!! - if (!(channel >= 1 && channel <= 14)) - { - RT_TRACE(COMP_ERR, "illegal channel for Zebra 8256: %d\n", channel); - return false; - } - rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_RF_WriteReg, rZebra1_Channel, channel, 10); - rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_End, 0, 0, 0); - break; - - case RF_8258: - break; - default: - RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip); + // TEST!! This is not the table for 8256!! + if (!(channel >= 1 && channel <= 14)) + { + RT_TRACE(COMP_ERR, "illegal channel for Zebra 8256: %d\n", channel); return false; - break; } - + rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, rZebra1_Channel, channel, 10); + rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); do{ switch(*stage) @@ -2149,11 +2049,6 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz") - if(priv->rf_chip== RF_PSEUDO_11N) - { - priv->SetBWModeInProgress= false; - return; - } if(!priv->up) { priv->SetBWModeInProgress= false; @@ -2241,30 +2136,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 //<3>Set RF related register - switch( priv->rf_chip ) - { - case RF_8225: -#ifdef TO_DO_LIST - PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); -#endif - break; - - case RF_8256: - PHY_SetRF8256Bandwidth(dev, priv->CurrentChannelBW); - break; - - case RF_8258: - // PHY_SetRF8258Bandwidth(); - break; - - case RF_PSEUDO_11N: - // Do Nothing - break; - - default: - RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip); - break; - } + PHY_SetRF8256Bandwidth(dev, priv->CurrentChannelBW); atomic_dec(&(priv->ieee80211->atm_swbw)); priv->SetBWModeInProgress= false;