From: Cyril Chemparathy Date: Fri, 7 May 2010 21:06:38 +0000 (-0400) Subject: Davinci: pinmux - use ioremap() X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=779b0d53ca41873d59225eb776c5d4493a0abd0f;p=linux-beck.git Davinci: pinmux - use ioremap() This patch modifies the pinmux implementation so as to ioremap() the pinmux register area on first use. Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 2c84f0702088..94fe971f276a 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1191,6 +1191,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = { .cpu_clks = da830_clks, .psc_bases = da830_psc_bases, .psc_bases_num = ARRAY_SIZE(da830_psc_bases), + .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, .pinmux_pins = da830_pins, .pinmux_pins_num = ARRAY_SIZE(da830_pins), .intc_base = DA8XX_CP_INTC_BASE, @@ -1213,7 +1214,5 @@ void __init da830_init(void) if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module")) return; - davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120); - davinci_common_init(&davinci_soc_info_da830); } diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 6f5ea2aa1c4a..74d4e49d4064 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -1076,6 +1076,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .cpu_clks = da850_clks, .psc_bases = da850_psc_bases, .psc_bases_num = ARRAY_SIZE(da850_psc_bases), + .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, .pinmux_pins = da850_pins, .pinmux_pins_num = ARRAY_SIZE(da850_pins), .intc_base = DA8XX_CP_INTC_BASE, @@ -1106,8 +1107,6 @@ void __init da850_init(void) if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module")) return; - davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120); - davinci_common_init(&davinci_soc_info_da850); /* diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 5ab39f6360f9..383478116ef5 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -844,7 +844,7 @@ static struct davinci_soc_info davinci_soc_info_dm355 = { .cpu_clks = dm355_clks, .psc_bases = dm355_psc_bases, .psc_bases_num = ARRAY_SIZE(dm355_psc_bases), - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm355_pins, .pinmux_pins_num = ARRAY_SIZE(dm355_pins), .intc_base = DAVINCI_ARM_INTC_BASE, diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index be340ed1b707..e5e3dce4cfba 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1049,7 +1049,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .cpu_clks = dm365_clks, .psc_bases = dm365_psc_bases, .psc_bases_num = ARRAY_SIZE(dm365_psc_bases), - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm365_pins, .pinmux_pins_num = ARRAY_SIZE(dm365_pins), .intc_base = DAVINCI_ARM_INTC_BASE, diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index d3aa1f7d0ab8..7ad15208b841 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -735,7 +735,7 @@ static struct davinci_soc_info davinci_soc_info_dm644x = { .cpu_clks = dm644x_clks, .psc_bases = dm644x_psc_bases, .psc_bases_num = ARRAY_SIZE(dm644x_psc_bases), - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm644x_pins, .pinmux_pins_num = ARRAY_SIZE(dm644x_pins), .intc_base = DAVINCI_ARM_INTC_BASE, diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index e0153b30f446..94045656cff6 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -819,7 +819,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = { .cpu_clks = dm646x_clks, .psc_bases = dm646x_psc_bases, .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases), - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm646x_pins, .pinmux_pins_num = ARRAY_SIZE(dm646x_pins), .intc_base = DAVINCI_ARM_INTC_BASE, diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 005f6242e0ba..2e072482c119 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -51,7 +51,7 @@ struct davinci_soc_info { struct clk_lookup *cpu_clks; u32 *psc_bases; unsigned long psc_bases_num; - void __iomem *pinmux_base; + u32 pinmux_base; const struct mux_config *pinmux_pins; unsigned long pinmux_pins_num; u32 intc_base; diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c index e9d530a8f79f..f34a8dcdae2b 100644 --- a/arch/arm/mach-davinci/mux.c +++ b/arch/arm/mach-davinci/mux.c @@ -22,6 +22,8 @@ #include #include +static void __iomem *pinmux_base; + /* * Sets the DAVINCI MUX register based on the table */ @@ -29,14 +31,19 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) { static DEFINE_SPINLOCK(mux_spin_lock); struct davinci_soc_info *soc_info = &davinci_soc_info; - void __iomem *base = soc_info->pinmux_base; unsigned long flags; const struct mux_config *cfg; unsigned int reg_orig = 0, reg = 0; unsigned int mask, warn = 0; - if (!soc_info->pinmux_pins) - BUG(); + if (WARN_ON(!soc_info->pinmux_pins)) + return -ENODEV; + + if (!pinmux_base) { + pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K); + if (WARN_ON(!pinmux_base)) + return -ENOMEM; + } if (index >= soc_info->pinmux_pins_num) { printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", @@ -57,7 +64,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) unsigned tmp1, tmp2; spin_lock_irqsave(&mux_spin_lock, flags); - reg_orig = __raw_readl(base + cfg->mux_reg); + reg_orig = __raw_readl(pinmux_base + cfg->mux_reg); mask = (cfg->mask << cfg->mask_offset); tmp1 = reg_orig & mask; @@ -69,7 +76,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) if (tmp1 != tmp2) warn = 1; - __raw_writel(reg, base + cfg->mux_reg); + __raw_writel(reg, pinmux_base + cfg->mux_reg); spin_unlock_irqrestore(&mux_spin_lock, flags); }