From: Andrew Lunn Date: Sat, 22 Feb 2014 19:14:48 +0000 (+0100) Subject: ARM: kirkwood: ioremap the cpu_config register before using it. X-Git-Tag: next-20140306~105^2~2^2~1^2~13 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=7f28fd6ebebb70eb2412f2775f2a19e3834601f6;p=karo-tx-linux.git ARM: kirkwood: ioremap the cpu_config register before using it. With the move to mach-mvebu and MULTI_V5, the global iomap for all registers will be going away. So explicitly map the CPU configuration register before using it. Signed-off-by: Andrew Lunn Acked-by: Arnd Bergmann Tested-by: Jason Gunthorpe Signed-off-by: Jason Cooper --- diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index 64151a4a378f..d5d8f4996722 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c @@ -191,15 +191,23 @@ eth_fixup_skip: } } +/* + * Disable propagation of mbus errors to the CPU local bus, as this + * causes mbus errors (which can occur for example for PCI aborts) to + * throw CPU aborts, which we're not set up to deal with. + */ +static void __init kirkwood_disable_mbus_error_propagation(void) +{ + void __iomem *cpu_config; + + cpu_config = ioremap(CPU_CONFIG_PHYS, 4); + writel(readl(cpu_config) & ~CPU_CONFIG_ERROR_PROP, cpu_config); + iounmap(cpu_config); +} + static void __init kirkwood_dt_init(void) { - /* - * Disable propagation of mbus errors to the CPU local bus, - * as this causes mbus errors (which can occur for example - * for PCI aborts) to throw CPU aborts, which we're not set - * up to deal with. - */ - writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG); + kirkwood_disable_mbus_error_propagation(); BUG_ON(mvebu_mbus_dt_init()); diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h index 8b9d1c9ff199..2bd12fde1781 100644 --- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h +++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h @@ -14,6 +14,7 @@ #include #define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0100) +#define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100) #define CPU_CONFIG_ERROR_PROP 0x00000004 #define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)