From: Arnd Bergmann Date: Tue, 9 Apr 2013 13:27:52 +0000 (+0200) Subject: Merge tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git... X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=8024206dbf4e0701f0cdf259a122ea23db3a7a16;p=linux-beck.git Merge tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup From Stephen Warren : ARM: tegra: cleanup This branch includes various cleanup of the core Tegra support. * Unification of the separate board-dt-tegra*.c files into a single tegra.c, now that everything is DT-driven and basically identical. * Use of_clk_get() in the Tegra clocksource driver so that clocks are described in DT rather than hard-coding clock names. * Some cleanup of the PMC-related code, with the aim that the PMC "driver" contains more of the code that touches PMC registers, rather than spreading PMC register accesses through other files. * Conversion of the "PMC" driver to acquire resources describe in device tree rather than hard-coding them. * Use of common code for the CPU sleep TLB invalidation. This branch is based on the previous fixes pull request. * tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: use setup_mm_for_reboot rather than explicit pgd switch ARM: tegra: replace the CPU power on function with PMC call ARM: tegra: pmc: add power on function for secondary CPUs ARM: tegra: pmc: convert PMC driver to support DT only ARM: tegra: fix the PMC compatible string in DT ARM: tegra: pmc: add specific compatible DT string for Tegra30 and Tegra114 ARM: tegra: refactor tegra{20,30}_boot_secondary clocksource: tegra: move to of_clk_get ARM: tegra: Unify Device tree board files ARM: tegra: Rename board-dt-tegra20.c to tegra.c ARM: tegra: Unify tegra{20,30,114}_init_early() Conflicts: drivers/clocksource/tegra20_timer.c Signed-off-by: Arnd Bergmann --- 8024206dbf4e0701f0cdf259a122ea23db3a7a16 diff --cc arch/arm/mach-tegra/platsmp.c index fb86a00ce254,601bd0c3f983..c31db797e199 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@@ -34,15 -34,17 +33,10 @@@ #include "common.h" #include "iomap.h" - extern void tegra_secondary_startup(void); - static cpumask_t tegra_cpu_init_mask; - #define EVP_CPU_RESET_VECTOR \ - (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100) - static void __cpuinit tegra_secondary_init(unsigned int cpu) { - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - cpumask_set_cpu(cpu, &tegra_cpu_init_mask); } diff --cc drivers/clocksource/tegra20_timer.c index 2e4d8a666c36,bc4b8ad78aea..ae877b021b54 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@@ -218,34 -259,12 +218,34 @@@ static void __init tegra20_init_timer(s tegra_clockevent.irq = tegra_timer_irq.irq; clockevents_config_and_register(&tegra_clockevent, 1000000, 0x1, 0x1fffffff); -#ifdef CONFIG_HAVE_ARM_TWD - twd_local_timer_of_register(); -#endif +} +CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer); + +static void __init tegra20_init_rtc(struct device_node *np) +{ + struct clk *clk; + + rtc_base = of_iomap(np, 0); + if (!rtc_base) { + pr_err("Can't map RTC registers"); + BUG(); + } + + /* + * rtc registers are used by read_persistent_clock, keep the rtc clock + * enabled + */ - clk = clk_get_sys("rtc-tegra", NULL); ++ clk = of_clk_get(np, 0); + if (IS_ERR(clk)) + pr_warn("Unable to get rtc-tegra clock\n"); + else + clk_prepare_enable(clk); + + of_node_put(np); + register_persistent_clock(NULL, tegra_read_persistent_clock); } -CLOCKSOURCE_OF_DECLARE(tegra20, "nvidia,tegra20-timer", tegra20_init_timer); +CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc); #ifdef CONFIG_PM static u32 usec_config;