From: Chris Wilson Date: Wed, 18 Apr 2012 16:12:26 +0000 (+0100) Subject: drm/i915/sprite: Avoid incurring extra vblank stall when updating plane on IVB X-Git-Tag: v3.5-rc1~83^2~8^2~87 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=828ed3e1703a2323250f4acdac34f79fd27364d9;p=karo-tx-linux.git drm/i915/sprite: Avoid incurring extra vblank stall when updating plane on IVB IvyBridge requires an extra frame between disabling the low power watermarks and enabling scaling on the sprite plane. If the scaling is already enabled, then we have already disabled the low power watermarks and need not incur an extra wait. Similarly, as we disable the scaling when turning off the sprite plane, we can update the scaling enabled flag and restore the low power watermarks. Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index fbf03b996587..44315674f472 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -110,14 +110,18 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, * when scaling is disabled. */ if (crtc_w != src_w || crtc_h != src_h) { - dev_priv->sprite_scaling_enabled = true; - intel_update_watermarks(dev); - intel_wait_for_vblank(dev, pipe); + if (!dev_priv->sprite_scaling_enabled) { + dev_priv->sprite_scaling_enabled = true; + intel_update_watermarks(dev); + intel_wait_for_vblank(dev, pipe); + } sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h; } else { - dev_priv->sprite_scaling_enabled = false; - /* potentially re-enable LP watermarks */ - intel_update_watermarks(dev); + if (dev_priv->sprite_scaling_enabled) { + dev_priv->sprite_scaling_enabled = false; + /* potentially re-enable LP watermarks */ + intel_update_watermarks(dev); + } } I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]); @@ -151,6 +155,9 @@ ivb_disable_plane(struct drm_plane *plane) /* Activate double buffered register update */ I915_MODIFY_DISPBASE(SPRSURF(pipe), 0); POSTING_READ(SPRSURF(pipe)); + + dev_priv->sprite_scaling_enabled = false; + intel_update_watermarks(dev); } static int