From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Fri, 7 Sep 2012 03:28:58 +0000 (+1000)
Subject: Merge remote-tracking branch 'omap_dss2/for-next'
X-Git-Tag: next-20120907~44
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=8539e739bccc1e64361083fa3dd4bb8e4938a713;p=karo-tx-linux.git

Merge remote-tracking branch 'omap_dss2/for-next'

Conflicts:
	drivers/video/omap2/dss/sdi.c
---

8539e739bccc1e64361083fa3dd4bb8e4938a713
diff --cc drivers/video/omap2/dss/sdi.c
index f43bfe17b3b6,3bf1bfe29585..2f0896f96f85
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/omap2/dss/sdi.c
@@@ -105,21 -107,8 +107,22 @@@ int omapdss_sdi_display_enable(struct o
  
  	sdi_config_lcd_manager(dssdev);
  
 +	/*
 +	 * LCLK and PCLK divisors are located in shadow registers, and we
 +	 * normally write them to DISPC registers when enabling the output.
 +	 * However, SDI uses pck-free as source clock for its PLL, and pck-free
 +	 * is affected by the divisors. And as we need the PLL before enabling
 +	 * the output, we need to write the divisors early.
 +	 *
 +	 * It seems just writing to the DISPC register is enough, and we don't
 +	 * need to care about the shadow register mechanism for pck-free. The
 +	 * exact reason for this is unknown.
 +	 */
 +	dispc_mgr_set_clock_div(dssdev->manager->id,
 +			&sdi.mgr_config.clock_info);
 +
- 	dss_sdi_init(dssdev->phy.sdi.datapairs);
+ 	dss_sdi_init(sdi.datapairs);
+ 
  	r = dss_sdi_enable();
  	if (r)
  		goto err_sdi_enable;