From: Ville Syrjälä Date: Tue, 24 Sep 2013 18:26:27 +0000 (+0300) Subject: drm/i915: Respect p2 divider minimum limit on VLV X-Git-Tag: next-20131017~56^2~107 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=889059d8f0eff8d179d98c3fee64a27d7ff6312f;p=karo-tx-linux.git drm/i915: Respect p2 divider minimum limit on VLV VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm tells us that the minimum p2 divider is 2. Use that limit on the code. Signed-off-by: Ville Syrjälä Reviewed-by: Mika Kuoppala Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c4658e7c3bb6..89d04612cc29 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -319,7 +319,7 @@ static const intel_limit_t intel_limits_vlv_dac = { .p = { .min = 10, .max = 30 }, .p1 = { .min = 2, .max = 3 }, .p2 = { .dot_limit = 270000, - .p2_slow = 2, .p2_fast = 20 }, + .p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */ }; static const intel_limit_t intel_limits_vlv_hdmi = { @@ -332,7 +332,7 @@ static const intel_limit_t intel_limits_vlv_hdmi = { .p = { .min = 10, .max = 30 }, .p1 = { .min = 2, .max = 3 }, .p2 = { .dot_limit = 270000, - .p2_slow = 2, .p2_fast = 20 }, + .p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */ }; static void vlv_clock(int refclk, intel_clock_t *clock) @@ -689,7 +689,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, /* based on hardware requirement, prefer smaller n to precision */ for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) { - for (clock.p2 = limit->p2.p2_fast; clock.p2 > 0; + for (clock.p2 = limit->p2.p2_fast; clock.p2 >= limit->p2.p2_slow; clock.p2 -= clock.p2 > 10 ? 2 : 1) { clock.p = clock.p1 * clock.p2; /* based on hardware requirement, prefer bigger m1,m2 values */