From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Tue, 12 Nov 2013 03:01:14 +0000 (+0900)
Subject: Merge branch 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git... 
X-Git-Tag: v3.13-rc1~131
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=9b66bfb28049594fe2bb2b91607ba302f511ce8b;hp=-c;p=karo-tx-linux.git

Merge branch 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 UV debug changes from Ingo Molnar:
 "Various SGI UV debuggability improvements, amongst them KDB support,
  with related core KDB enabling patches changing kernel/debug/kdb/"

* 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  Revert "x86/UV: Add uvtrace support"
  x86/UV: Add call to KGDB/KDB from NMI handler
  kdb: Add support for external NMI handler to call KGDB/KDB
  x86/UV: Check for alloc_cpumask_var() failures properly in uv_nmi_setup()
  x86/UV: Add uvtrace support
  x86/UV: Add kdump to UV NMI handler
  x86/UV: Add summary of cpu activity to UV NMI handler
  x86/UV: Update UV support for external NMI signals
  x86/UV: Move NMI support
---

9b66bfb28049594fe2bb2b91607ba302f511ce8b
diff --combined arch/x86/kernel/apic/x2apic_uv_x.c
index a419814cea57,0a5a4b8ae36c..ad0dc0428baf
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@@ -39,12 -39,6 +39,6 @@@
  #include <asm/x86_init.h>
  #include <asm/nmi.h>
  
- /* BMC sets a bit this MMR non-zero before sending an NMI */
- #define UVH_NMI_MMR				UVH_SCRATCH5
- #define UVH_NMI_MMR_CLEAR			(UVH_NMI_MMR + 8)
- #define UV_NMI_PENDING_MASK			(1UL << 63)
- DEFINE_PER_CPU(unsigned long, cpu_last_nmi_count);
- 
  DEFINE_PER_CPU(int, x2apic_extra_bits);
  
  #define PR_DEVEL(fmt, args...)	pr_devel("%s: " fmt, __func__, args)
@@@ -58,7 -52,6 +52,6 @@@ int uv_min_hub_revision_id
  EXPORT_SYMBOL_GPL(uv_min_hub_revision_id);
  unsigned int uv_apicid_hibits;
  EXPORT_SYMBOL_GPL(uv_apicid_hibits);
- static DEFINE_SPINLOCK(uv_nmi_lock);
  
  static struct apic apic_x2apic_uv_x;
  
@@@ -113,7 -106,7 +106,7 @@@ static int __init early_get_pnodeid(voi
  		break;
  	case UV3_HUB_PART_NUMBER:
  	case UV3_HUB_PART_NUMBER_X:
 -		uv_min_hub_revision_id += UV3_HUB_REVISION_BASE - 1;
 +		uv_min_hub_revision_id += UV3_HUB_REVISION_BASE;
  		break;
  	}
  
@@@ -847,68 -840,6 +840,6 @@@ void uv_cpu_init(void
  		set_x2apic_extra_bits(uv_hub_info->pnode);
  }
  
- /*
-  * When NMI is received, print a stack trace.
-  */
- int uv_handle_nmi(unsigned int reason, struct pt_regs *regs)
- {
- 	unsigned long real_uv_nmi;
- 	int bid;
- 
- 	/*
- 	 * Each blade has an MMR that indicates when an NMI has been sent
- 	 * to cpus on the blade. If an NMI is detected, atomically
- 	 * clear the MMR and update a per-blade NMI count used to
- 	 * cause each cpu on the blade to notice a new NMI.
- 	 */
- 	bid = uv_numa_blade_id();
- 	real_uv_nmi = (uv_read_local_mmr(UVH_NMI_MMR) & UV_NMI_PENDING_MASK);
- 
- 	if (unlikely(real_uv_nmi)) {
- 		spin_lock(&uv_blade_info[bid].nmi_lock);
- 		real_uv_nmi = (uv_read_local_mmr(UVH_NMI_MMR) & UV_NMI_PENDING_MASK);
- 		if (real_uv_nmi) {
- 			uv_blade_info[bid].nmi_count++;
- 			uv_write_local_mmr(UVH_NMI_MMR_CLEAR, UV_NMI_PENDING_MASK);
- 		}
- 		spin_unlock(&uv_blade_info[bid].nmi_lock);
- 	}
- 
- 	if (likely(__get_cpu_var(cpu_last_nmi_count) == uv_blade_info[bid].nmi_count))
- 		return NMI_DONE;
- 
- 	__get_cpu_var(cpu_last_nmi_count) = uv_blade_info[bid].nmi_count;
- 
- 	/*
- 	 * Use a lock so only one cpu prints at a time.
- 	 * This prevents intermixed output.
- 	 */
- 	spin_lock(&uv_nmi_lock);
- 	pr_info("UV NMI stack dump cpu %u:\n", smp_processor_id());
- 	dump_stack();
- 	spin_unlock(&uv_nmi_lock);
- 
- 	return NMI_HANDLED;
- }
- 
- void uv_register_nmi_notifier(void)
- {
- 	if (register_nmi_handler(NMI_UNKNOWN, uv_handle_nmi, 0, "uv"))
- 		printk(KERN_WARNING "UV NMI handler failed to register\n");
- }
- 
- void uv_nmi_init(void)
- {
- 	unsigned int value;
- 
- 	/*
- 	 * Unmask NMI on all cpus
- 	 */
- 	value = apic_read(APIC_LVT1) | APIC_DM_NMI;
- 	value &= ~APIC_LVT_MASKED;
- 	apic_write(APIC_LVT1, value);
- }
- 
  void __init uv_system_init(void)
  {
  	union uvh_rh_gam_config_mmr_u  m_n_config;
@@@ -1046,6 -977,7 +977,7 @@@
  	map_mmr_high(max_pnode);
  	map_mmioh_high(min_pnode, max_pnode);
  
+ 	uv_nmi_setup();
  	uv_cpu_init();
  	uv_scir_register_cpu_notifier();
  	uv_register_nmi_notifier();