From: Alex Deucher <alexander.deucher@amd.com>
Date: Tue, 13 Nov 2012 23:03:41 +0000 (-0500)
Subject: drm/radeon/dce32+: use fractional fb dividers for high clocks
X-Git-Tag: v3.2.36~62
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=a0d3e01dadd633961769f2c388599b0b6f08c1df;p=karo-tx-linux.git

drm/radeon/dce32+: use fractional fb dividers for high clocks

commit a02dc74b317d78298cb0587b9b1f6f741fd5c139 upstream.

Fixes flickering with some high res montiors.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[bwh: Backported to 3.2: use pll->flags instead of radeon_crtc->pll_flags]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
---

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index ee9d363b61d6..a25d08af62d8 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -544,6 +544,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
 		/* use frac fb div on APUs */
 		if (ASIC_IS_DCE41(rdev))
 			pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
+		if (ASIC_IS_DCE32(rdev) && mode->clock > 165000)
+			pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
 	} else {
 		pll->flags |= RADEON_PLL_LEGACY;