From: Rich Felker Date: Thu, 4 Aug 2016 04:30:37 +0000 (+0000) Subject: dt-bindings: irqchip: Add J-Core interrupt controller bindings X-Git-Tag: v4.9-rc1~151^2~2^2~3^2~2 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=a9da291f25f014c8ee999f498305949332d58cd6;p=karo-tx-linux.git dt-bindings: irqchip: Add J-Core interrupt controller bindings Signed-off-by: Rich Felker Acked-by: Rob Herring Link: https://lkml.kernel.org/r/c8aae4597153595cf965efe96422f699639c9d51.147018b6529.git.dalias@libc.org Signed-off-by: Jason Cooper --- diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt new file mode 100644 index 000000000000..ee2ad36f8df8 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt @@ -0,0 +1,26 @@ +J-Core Advanced Interrupt Controller + +Required properties: + +- compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic + with 8 interrupt lines with programmable priorities, or "jcore,aic2" for + the "aic2" core with 64 interrupts. + +- reg: Memory region(s) for configuration. For SMP, there should be one + region per cpu, indexed by the sequential, zero-based hardware cpu + number. + +- interrupt-controller: Identifies the node as an interrupt controller + +- #interrupt-cells: Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. + + +Example: + +aic: interrupt-controller@200 { + compatible = "jcore,aic2"; + reg = < 0x200 0x30 0x500 0x30 >; + interrupt-controller; + #interrupt-cells = <1>; +};