From: Stephen Boyd Date: Fri, 15 Apr 2016 22:47:54 +0000 (-0700) Subject: Merge tag 'v4.7-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind... X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=ab98e20af56e54597e87dd694c04088d9c0f5614;p=linux-beck.git Merge tag 'v4.7-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next Pull rockchip clk updates from Heiko Stuebner: This is first big chunk of Rockchip clock-related changes for 4.7. Main change is probably the added support for the new rk3399 soc and necessary infrastructure changes surrounding it. The biggest chunk is probably that clock code is now able to handle multiple clock providers in one system, as the rk3399 has two of those. A general one and another smaller one in a separate power domain. The rk3399 also uses another new pll type. Thankfully it just fits nicely into our current structure. It also needs some parts like the cpuclk mux parameters to be a bit more flexible and an new fractional divider subtype without gate. Apart from this big change we have some more fixes and removal of forgotten variables. * tag 'v4.7-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: add clock controller for the RK3399 dt-bindings: add bindings for rk3399 clock controller clk: rockchip: add dt-binding header for rk3399 clk: rockchip: release io resource when failing to init clk clk: rockchip: remove redundant checking of device_node clk: rockchip: fix warning reported by kernel-doc clk: rockchip: remove mux_core_reg from rockchip_cpuclk_reg_data clk: rockchip: add new pll-type for rk3399 and similar socs clk: rockchip: Add support for multiple clock providers clk: rockchip: allow varying mux parameters for cpuclk pll-sources clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type --- ab98e20af56e54597e87dd694c04088d9c0f5614