From: H Hartley Sweeten Date: Fri, 1 May 2015 21:59:04 +0000 (-0700) Subject: staging: comedi: ni_stc.h: tidy up AI_Mode_2_Register and bits X-Git-Tag: v4.2-rc1~88^2~722 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=b134cc58b81069ea6e1322a883e4bd66726a9f2d;p=karo-tx-linux.git staging: comedi: ni_stc.h: tidy up AI_Mode_2_Register and bits Rename the CamelCase. Use the BIT() macro to define the bits. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c index 01015d76af53..7cbe9d9e0bd8 100644 --- a/drivers/staging/comedi/drivers/ni_mio_common.c +++ b/drivers/staging/comedi/drivers/ni_mio_common.c @@ -329,7 +329,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = { [NISTC_DIO_OUT_REG] = { 0, 0 }, /* DOES NOT MAP CLEANLY */ [NISTC_DIO_CTRL_REG] = { 0, 0 }, /* DOES NOT MAP CLEANLY */ [NISTC_AI_MODE1_REG] = { 0x118, 2 }, - [AI_Mode_2_Register] = { 0x11a, 2 }, + [NISTC_AI_MODE2_REG] = { 0x11a, 2 }, [AI_SI_Load_A_Registers] = { 0x11c, 4 }, [AI_SI_Load_B_Registers] = { 0x120, 4 }, [AI_SC_Load_A_Registers] = { 0x124, 4 }, @@ -1634,7 +1634,7 @@ static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s) NISTC_AI_MODE1_RSVD /*| NISTC_AI_MODE1_TRIGGER_ONCE */, NISTC_AI_MODE1_REG); - ni_stc_writew(dev, 0x0000, AI_Mode_2_Register); + ni_stc_writew(dev, 0, NISTC_AI_MODE2_REG); /* generate FIFO interrupts on non-empty */ ni_stc_writew(dev, (0 << 6) | 0x0000, AI_Mode_3_Register); if (devpriv->is_611x) { @@ -2313,10 +2313,10 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) } } - mode2 &= ~AI_Pre_Trigger; - mode2 &= ~AI_SC_Initial_Load_Source; - mode2 &= ~AI_SC_Reload_Mode; - ni_stc_writew(dev, mode2, AI_Mode_2_Register); + mode2 &= ~NISTC_AI_MODE2_PRE_TRIGGER; + mode2 &= ~NISTC_AI_MODE2_SC_INIT_LOAD_SRC; + mode2 &= ~NISTC_AI_MODE2_SC_RELOAD_MODE; + ni_stc_writew(dev, mode2, NISTC_AI_MODE2_REG); if (cmd->chanlist_len == 1 || devpriv->is_611x || devpriv->is_6143) { start_stop_select |= AI_STOP_Polarity; @@ -2374,7 +2374,7 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) /* stop bits for non 611x boards AI_SI_Special_Trigger_Delay=0 - AI_Pre_Trigger=0 + NISTC_AI_MODE2_PRE_TRIGGER=0 AI_START_STOP_Select_Register: AI_START_Polarity=0 (?) rising edge AI_START_Edge=1 edge triggered @@ -2389,11 +2389,10 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ni_stc_writew(dev, start_stop_select, AI_START_STOP_Select_Register); - mode2 |= AI_SI_Reload_Mode(0); - /* AI_SI_Initial_Load_Source=A */ - mode2 &= ~AI_SI_Initial_Load_Source; - /* mode2 |= AI_SC_Reload_Mode; */ - ni_stc_writew(dev, mode2, AI_Mode_2_Register); + mode2 &= ~NISTC_AI_MODE2_SI_INIT_LOAD_SRC; /* A */ + mode2 |= NISTC_AI_MODE2_SI_RELOAD_MODE(0); + /* mode2 |= NISTC_AI_MODE2_SC_RELOAD_MODE; */ + ni_stc_writew(dev, mode2, NISTC_AI_MODE2_REG); /* load SI */ timer = ni_ns_to_timer(dev, cmd->scan_begin_arg, @@ -2430,18 +2429,15 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ni_stc_writew(dev, 1, AI_SI2_Load_A_Register); ni_stc_writew(dev, timer, AI_SI2_Load_B_Register); - /* AI_SI2_Reload_Mode = alternate */ - /* AI_SI2_Initial_Load_Source = A */ - mode2 &= ~AI_SI2_Initial_Load_Source; - mode2 |= AI_SI2_Reload_Mode; - ni_stc_writew(dev, mode2, AI_Mode_2_Register); + mode2 &= ~NISTC_AI_MODE2_SI2_INIT_LOAD_SRC; /* A */ + mode2 |= NISTC_AI_MODE2_SI2_RELOAD_MODE; /* alternate */ + ni_stc_writew(dev, mode2, NISTC_AI_MODE2_REG); ni_stc_writew(dev, NISTC_AI_CMD1_SI2_LOAD, NISTC_AI_CMD1_REG); - mode2 |= AI_SI2_Reload_Mode; /* alternate */ - mode2 |= AI_SI2_Initial_Load_Source; /* B */ - - ni_stc_writew(dev, mode2, AI_Mode_2_Register); + mode2 |= NISTC_AI_MODE2_SI2_INIT_LOAD_SRC; /* B */ + mode2 |= NISTC_AI_MODE2_SI2_RELOAD_MODE; /* alternate */ + ni_stc_writew(dev, mode2, NISTC_AI_MODE2_REG); break; case TRIG_EXT: mode1 |= NISTC_AI_MODE1_CONVERT_SRC(1 + cmd->convert_arg); @@ -2449,8 +2445,9 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) mode1 |= NISTC_AI_MODE1_CONVERT_POLARITY; ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); - mode2 |= AI_Start_Stop_Gate_Enable | AI_SC_Gate_Enable; - ni_stc_writew(dev, mode2, AI_Mode_2_Register); + mode2 |= NISTC_AI_MODE2_SC_GATE_ENA | + NISTC_AI_MODE2_START_STOP_GATE_ENA; + ni_stc_writew(dev, mode2, NISTC_AI_MODE2_REG); break; } diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h index 315579e60216..739061a1be9b 100644 --- a/drivers/staging/comedi/drivers/ni_stc.h +++ b/drivers/staging/comedi/drivers/ni_stc.h @@ -190,6 +190,20 @@ #define NISTC_AI_MODE1_CONTINUOUS BIT(1) #define NISTC_AI_MODE1_TRIGGER_ONCE BIT(0) +#define NISTC_AI_MODE2_REG 13 +#define NISTC_AI_MODE2_SC_GATE_ENA BIT(15) +#define NISTC_AI_MODE2_START_STOP_GATE_ENA BIT(14) +#define NISTC_AI_MODE2_PRE_TRIGGER BIT(13) +#define NISTC_AI_MODE2_EXTMUX_PRESENT BIT(12) +#define NISTC_AI_MODE2_SI2_INIT_LOAD_SRC BIT(9) +#define NISTC_AI_MODE2_SI2_RELOAD_MODE BIT(8) +#define NISTC_AI_MODE2_SI_INIT_LOAD_SRC BIT(7) +#define NISTC_AI_MODE2_SI_RELOAD_MODE(x) (((x) & 0x7) << 4) +#define NISTC_AI_MODE2_SI_WR_SWITCH BIT(3) +#define NISTC_AI_MODE2_SC_INIT_LOAD_SRC BIT(2) +#define NISTC_AI_MODE2_SC_RELOAD_MODE BIT(1) +#define NISTC_AI_MODE2_SC_WR_SWITCH BIT(0) + #define AI_Status_1_Register 2 #define Interrupt_A_St 0x8000 #define AI_FIFO_Full_St 0x4000 @@ -232,20 +246,6 @@ #define DIO_Parallel_Input_Register 7 -#define AI_Mode_2_Register 13 -#define AI_SC_Gate_Enable _bit15 -#define AI_Start_Stop_Gate_Enable _bit14 -#define AI_Pre_Trigger _bit13 -#define AI_External_MUX_Present _bit12 -#define AI_SI2_Initial_Load_Source _bit9 -#define AI_SI2_Reload_Mode _bit8 -#define AI_SI_Initial_Load_Source _bit7 -#define AI_SI_Reload_Mode(a) (((a) & 0x7)<<4) -#define AI_SI_Write_Switch _bit3 -#define AI_SC_Initial_Load_Source _bit2 -#define AI_SC_Reload_Mode _bit1 -#define AI_SC_Write_Switch _bit0 - #define AI_SI_Load_A_Registers 14 #define AI_SI_Load_B_Registers 16 #define AI_SC_Load_A_Registers 18