From: Ralf Baechle <ralf@linux-mips.org>
Date: Fri, 6 May 2005 14:31:13 +0000 (+0000)
Subject: No point in checking cpu_has_tlb before we've computed the CPU options.
X-Git-Tag: v2.6.16.28-rc1~3478^2~1^2~213
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=b382fe848345fe626b74a559fa89d2d966d03b02;p=karo-tx-linux.git

No point in checking cpu_has_tlb before we've computed the CPU options.
So for now we just unconditionally set the option - Linux wouldn't
work without a TLB anyway.

Setting MIPS_CPU_4KTLB was missing for Alchemy and Sandcraft, add that
back.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index ba2dbc266d51..cde88285a52f 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -509,8 +509,7 @@ static inline void decode_configs(struct cpuinfo_mips *c)
 static inline void cpu_probe_mips(struct cpuinfo_mips *c)
 {
 	decode_configs(c);
-	if (cpu_has_tlb)
-		c->options |= MIPS_CPU_4KTLB;
+	c->options |= MIPS_CPU_4KTLB;
 	switch (c->processor_id & 0xff00) {
 	case PRID_IMP_4KC:
 		c->cputype = CPU_4KC;
@@ -544,6 +543,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
 static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
 {
 	decode_configs(c);
+	c->options |= MIPS_CPU_4KTLB;
 	switch (c->processor_id & 0xff00) {
 	case PRID_IMP_AU1_REV1:
 	case PRID_IMP_AU1_REV2:
@@ -574,6 +574,7 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
 static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
 {
 	decode_configs(c);
+	c->options |= MIPS_CPU_4KTLB;
 	switch (c->processor_id & 0xff00) {
 	case PRID_IMP_SB1:
 		c->cputype = CPU_SB1;
@@ -588,8 +589,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
 static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
 {
 	decode_configs(c);
-	if (cpu_has_tlb)
-		c->options |= MIPS_CPU_4KTLB;
+	c->options |= MIPS_CPU_4KTLB;
 	switch (c->processor_id & 0xff00) {
 	case PRID_IMP_SR71000:
 		c->cputype = CPU_SR71000;