From: Abhishek Sahu Date: Fri, 25 Nov 2016 15:41:31 +0000 (+0530) Subject: clk: qcom: ipq4019: correct sdcc frequency and parent name X-Git-Tag: v4.11-rc1~71^2~57^4~2 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=b52a0c2c11401a8f39b4fcb0b59baf0059902a98;p=karo-tx-linux.git clk: qcom: ipq4019: correct sdcc frequency and parent name 1. The parent for sdcc clock is sdccpll. 2. The frequency value was wrong so modified the same. Signed-off-by: Abhishek Sahu Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c index f4780c0aaeee..62a36e05dcde 100644 --- a/drivers/clk/qcom/gcc-ipq4019.c +++ b/drivers/clk/qcom/gcc-ipq4019.c @@ -124,7 +124,7 @@ static struct parent_map gcc_xo_sdcc1_500_map[] = { static const char * const gcc_xo_sdcc1_500[] = { "xo", - "ddrpll", + "ddrpllsdcc", "fepll500", }; @@ -549,7 +549,7 @@ static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = { F(25000000, P_FEPLL500, 1, 1, 20), F(50000000, P_FEPLL500, 1, 1, 10), F(100000000, P_FEPLL500, 1, 1, 5), - F(193000000, P_DDRPLL, 1, 0, 0), + F(192000000, P_DDRPLL, 1, 0, 0), { } };