From: Jayachandran C Date: Tue, 23 Aug 2011 08:05:51 +0000 (+0530) Subject: MIPS: Netlogic: Avoid unnecessary cache flushes X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=b66f953cd00e7c309c33ea35acd95b13a027050f;p=linux-beck.git MIPS: Netlogic: Avoid unnecessary cache flushes XLR dcache is fully coherent across CPUs, so avoid unnecessary dcache flushes. Signed-off-by: Jayachandran C To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2729/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h index 3b728275b9b0..3780743a74b2 100644 --- a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h @@ -25,13 +25,12 @@ #define cpu_has_llsc 1 #define cpu_has_vtag_icache 0 #define cpu_has_dc_aliases 0 -#define cpu_has_ic_fills_f_dc 0 +#define cpu_has_ic_fills_f_dc 1 #define cpu_has_dsp 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 -#define cpu_icache_snoops_remote_store 0 +#define cpu_icache_snoops_remote_store 1 -#define cpu_has_nofpuex 0 #define cpu_has_64bits 1 #define cpu_has_mips32r1 1