From: Arnd Bergmann <arnd@arndb.de>
Date: Tue, 19 Feb 2013 16:01:24 +0000 (+0100)
Subject: Merge branch 'next/soc' into for-next
X-Git-Tag: next-20130220~18^2~15
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=c6f0f52868717d8abcd8a45a941d67f096e434b1;p=karo-tx-linux.git

Merge branch 'next/soc' into for-next

* next/soc: (145 commits)
  ARM: shmobile: r8a7779: Correct TMU clock support again
  ARM: prima2: fix __init section for cpu hotplug
  arm: socfpga: Add SMP support for actual socfpga harware
  arm: Add v7_invalidate_l1 to cache-v7.S
  arm: socfpga: Add entries to enable make dtbs socfpga
  arm: socfpga: Add new device tree source for actual socfpga HW
  ARM: tegra: sort Kconfig selects for Tegra114
  ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
  ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC
  ARM: tegra: Fix build error for gic update
  ARM: tegra: remove empty tegra_smp_init_cpus()
  ARM: shmobile: Register ARM architected timer
  ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move
  ARM: shmobile: r8a7779: Correct TMU clock support
  ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
  ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
  ARM: mxs: use apbx bus clock to drive the timers on timrotv2
  ARM: mxs: Update mxs_defconfig
  ARM: imx_v6_v7_defconfig: enable anatop regulator and snvs rtc
  ARM: imx: support DEBUG_LL uart port selection for all i.MX SoCs
  ...
---

c6f0f52868717d8abcd8a45a941d67f096e434b1
diff --cc arch/arm/include/asm/smp_scu.h
index 86dff32a0737,006f02681cd8..18d169373612
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@@ -6,15 -6,26 +6,32 @@@
  #define SCU_PM_POWEROFF	3
  
  #ifndef __ASSEMBLER__
+ 
+ #include <asm/cputype.h>
+ 
+ static inline bool scu_a9_has_base(void)
+ {
+ 	return read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
+ }
+ 
+ static inline unsigned long scu_a9_get_base(void)
+ {
+ 	unsigned long pa;
+ 
+ 	asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
+ 
+ 	return pa;
+ }
+ 
  unsigned int scu_get_core_count(void __iomem *);
 -void scu_enable(void __iomem *);
  int scu_power_mode(void __iomem *, unsigned int);
 +
 +#ifdef CONFIG_SMP
 +void scu_enable(void __iomem *scu_base);
 +#else
 +static inline void scu_enable(void __iomem *scu_base) {}
 +#endif
 +
  #endif
  
  #endif