From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Thu, 10 Dec 2015 12:00:23 +0000 (+0000)
Subject: arm: dts: apq8064: fix clock names according to new rpmcc
X-Git-Tag: KARO-TXSD-2017-03-24~88^2~46^2~1
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=d4109cc78efccbc5ccd4042c95aa8047a1bd702a;p=karo-tx-linux.git

arm: dts: apq8064: fix clock names according to new rpmcc

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---

diff --git a/arch/arm/boot/dts/qcom-apq8064-coresight.dtsi b/arch/arm/boot/dts/qcom-apq8064-coresight.dtsi
index d69ec6675a49..6a8c4f2222f5 100644
--- a/arch/arm/boot/dts/qcom-apq8064-coresight.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-coresight.dtsi
@@ -11,13 +11,14 @@
  * GNU General Public License for more details.
  */
 
+#include <dt-bindings/clock/qcom,rpmcc.h>
 &soc {
 
 	etb@1a01000 {
 		compatible = "coresight-etb10", "arm,primecell";
 		reg = <0x1a01000 0x1000>;
 
-		clocks = <&rpmcc QCOM_RPM_QDSS_CLK>;
+		clocks = <&rpmcc RPM_QDSS_CLK>;
 		clock-names = "apb_pclk";
 
 		port {
@@ -32,7 +33,7 @@
 		compatible = "arm,coresight-tpiu", "arm,primecell";
 		reg = <0x1a03000 0x1000>;
 
-		clocks = <&rpmcc QCOM_RPM_QDSS_CLK>;
+		clocks = <&rpmcc RPM_QDSS_CLK>;
 		clock-names = "apb_pclk";
 
 		port {
@@ -46,7 +47,7 @@
 	replicator {
 		compatible = "arm,coresight-replicator";
 
-		clocks = <&rpmcc QCOM_RPM_QDSS_CLK>;
+		clocks = <&rpmcc RPM_QDSS_CLK>;
 		clock-names = "apb_pclk";
 
 		ports {
@@ -79,7 +80,7 @@
 		compatible = "arm,coresight-funnel", "arm,primecell";
 		reg = <0x1a04000 0x1000>;
 
-		clocks = <&rpmcc QCOM_RPM_QDSS_CLK>;
+		clocks = <&rpmcc RPM_QDSS_CLK>;
 		clock-names = "apb_pclk";
 
 		ports {
@@ -134,7 +135,7 @@
 		compatible = "arm,coresight-etm3x", "arm,primecell";
 		reg = <0x1a1c000 0x1000>;
 
-		clocks = <&rpmcc QCOM_RPM_QDSS_CLK>;
+		clocks = <&rpmcc RPM_QDSS_CLK>;
 		clock-names = "apb_pclk";
 
 		cpu = <&CPU0>;
@@ -150,7 +151,7 @@
 		compatible = "arm,coresight-etm3x", "arm,primecell";
 		reg = <0x1a1d000 0x1000>;
 
-		clocks = <&rpmcc QCOM_RPM_QDSS_CLK>;
+		clocks = <&rpmcc RPM_QDSS_CLK>;
 		clock-names = "apb_pclk";
 
 		cpu = <&CPU1>;
@@ -166,7 +167,7 @@
 		compatible = "arm,coresight-etm3x", "arm,primecell";
 		reg = <0x1a1e000 0x1000>;
 
-		clocks = <&rpmcc QCOM_RPM_QDSS_CLK>;
+		clocks = <&rpmcc RPM_QDSS_CLK>;
 		clock-names = "apb_pclk";
 
 		cpu = <&CPU2>;
@@ -182,7 +183,7 @@
 		compatible = "arm,coresight-etm3x", "arm,primecell";
 		reg = <0x1a1f000 0x1000>;
 
-		clocks = <&rpmcc QCOM_RPM_QDSS_CLK>;
+		clocks = <&rpmcc RPM_QDSS_CLK>;
 		clock-names = "apb_pclk";
 
 		cpu = <&CPU3>;