From: Ben Dooks <ben@simtec.co.uk>
Date: Thu, 30 Jul 2009 22:23:23 +0000 (+0100)
Subject: ARM: S3C: CPUFREQ: Move struct s3c_cpufreq_config to cpu-freq-core.h
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=d6fc87d3f7d236892e4d0003a07cd2b5171e5e27;p=linux-beck.git

ARM: S3C: CPUFREQ: Move struct s3c_cpufreq_config to cpu-freq-core.h

Move the structure s3c_cpufreq_config from cpu-freq.h to the
less advertised cpu-freq-core.h as it is not needed by anything
outside the core drivers.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---

diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h
index 0ba7670fd075..7b982b7f28cd 100644
--- a/arch/arm/plat-s3c/include/plat/cpu-freq.h
+++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h
@@ -97,26 +97,6 @@ struct s3c_pllval {
 	unsigned long		pll_reg;
 };
 
-/**
- * struct s3c_cpufreq_config - current cpu frequency configuration
- * @freq: The current settings for the core clocks.
- * @pll: The PLL table entry for the current PLL settings.
- * @divs: The divisor settings for the core clocks.
- * @info: The current core driver information.
- * @board: The information for the board we are running on.
- *
- * This is for the core drivers that need to know information about
- * the current settings and values. It should not be needed by any
- * device drivers.
-*/
-struct s3c_cpufreq_config {
-	struct s3c_freq		freq;
-	struct s3c_pllval	pll;
-	struct s3c_clkdivs	divs;
-	struct s3c_cpufreq_info *info;	/* for core, not drivers */
-	struct s3c_cpufreq_board *board;
-};
-
 /**
  * struct s3c_cpufreq_board - per-board cpu frequency informatin
  * @refresh: The SDRAM refresh period in nanoseconds.
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
index e078821b3605..7938fb0bc387 100644
--- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
@@ -64,6 +64,31 @@ struct s3c_plltab {
 	int			 size;
 };
 
+/**
+ * struct s3c_cpufreq_config - current cpu frequency configuration
+ * @freq: The current settings for the core clocks.
+ * @max: Maxium settings, derived from core, board and user settings.
+ * @pll: The PLL table entry for the current PLL settings.
+ * @divs: The divisor settings for the core clocks.
+ * @info: The current core driver information.
+ * @board: The information for the board we are running on.
+ * @lock_pll: Set if the PLL settings cannot be changed.
+ *
+ * This is for the core drivers that need to know information about
+ * the current settings and values. It should not be needed by any
+ * device drivers.
+*/
+struct s3c_cpufreq_config {
+	struct s3c_freq		freq;
+	struct s3c_freq		max;
+	struct cpufreq_frequency_table pll;
+	struct s3c_clkdivs	divs;
+	struct s3c_cpufreq_info *info;	/* for core, not drivers */
+	struct s3c_cpufreq_board *board;
+
+	unsigned int	lock_pll:1;
+};
+
 /**
  * struct s3c_cpufreq_info - Information for the CPU frequency driver.
  * @name: The name of this implementation.