From: Chris Wilson Date: Mon, 27 Apr 2015 12:41:15 +0000 (+0100) Subject: drm/i915: Ensure cache flushes prior to doing CS flips X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=d94b5030d26b4f45510a092262bc2b542a00bd7c;p=linux-beck.git drm/i915: Ensure cache flushes prior to doing CS flips Synchronising to an object active on the same ring is a no-op, for the benefit of execbuffer scheduler. However, for CS flips this means that we can forgo checking whether the last write request of the object is actually queued and more importantly whether the cache flush for the write was emitted. Signed-off-by: Chris Wilson Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c890e03939fa..3c8801cecd3f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -11040,6 +11040,12 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, i915_gem_request_assign(&work->flip_queued_req, obj->last_write_req); } else { + if (obj->last_write_req) { + ret = i915_gem_check_olr(obj->last_write_req); + if (ret) + goto cleanup_unpin; + } + ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, ring, page_flip_flags); if (ret)