From: Thierry Reding Date: Fri, 25 Oct 2013 09:48:44 +0000 (+0200) Subject: Merge remote-tracking branch 'arm-soc/for-next' X-Git-Tag: next-20131025~15 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=dd907a5bbc1296591f4dbb4ff0d922dee755eca2;p=karo-tx-linux.git Merge remote-tracking branch 'arm-soc/for-next' Conflicts: MAINTAINERS arch/arm/boot/dts/omap3-evm.dts arch/arm/mach-tegra/Kconfig arch/arm/mach-ux500/board-mop500.c --- dd907a5bbc1296591f4dbb4ff0d922dee755eca2 diff --cc MAINTAINERS index 5a7ed4c3590e,83685591362a..2906f6af30b2 --- a/MAINTAINERS +++ b/MAINTAINERS @@@ -2838,10 -2829,8 +2846,10 @@@ M: Terje Bergström ; num-eps = <16>; ram-bits = <12>; - ti,has-mailbox; + ctrl-module = <&omap_control_usbotg>; }; + + aes: aes@4b501000 { + compatible = "ti,omap4-aes"; + ti,hwmods = "aes"; + reg = <0x4b501000 0xa0>; + interrupts = ; + dmas = <&sdma 111>, <&sdma 110>; + dma-names = "tx", "rx"; + }; + + des: des@480a5000 { + compatible = "ti,omap4-des"; + ti,hwmods = "des"; + reg = <0x480a5000 0xa0>; + interrupts = ; + dmas = <&sdma 117>, <&sdma 116>; + dma-names = "tx", "rx"; + }; }; }; diff --cc arch/arm/boot/dts/omap5.dtsi index c0ec6dce30fe,6192c458bea1..6d0a1d5f3da7 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@@ -626,19 -626,15 +626,19 @@@ hw-caps-temp-alert; }; - omap_control_usb: omap-control-usb@4a002300 { - compatible = "ti,omap-control-usb"; - reg = <0x4a002300 0x4>, - <0x4a002370 0x4>; - reg-names = "control_dev_conf", "phy_power_usb"; - ti,type = <2>; + omap_control_usb2phy: control-phy@4a002300 { + compatible = "ti,control-phy-usb2"; + reg = <0x4a002300 0x4>; + reg-names = "power"; + }; + + omap_control_usb3phy: control-phy@4a002370 { + compatible = "ti,control-phy-pipe3"; + reg = <0x4a002370 0x4>; + reg-names = "power"; }; - omap_dwc3@4a020000 { + usb3: omap_dwc3@4a020000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss"; reg = <0x4a020000 0x10000>; diff --cc arch/arm/mach-exynos/common.c index c17407b16d7c,a4e7ba828810..61d2906ccefb --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@@ -26,11 -26,8 +26,9 @@@ #include #include #include - #include - #include #include #include +#include #include #include diff --cc arch/arm/mach-highbank/Kconfig index e2ca238cf0ea,fe98df44579c..92d2ad25d463 --- a/arch/arm/mach-highbank/Kconfig +++ b/arch/arm/mach-highbank/Kconfig @@@ -8,11 -8,11 +8,11 @@@ config ARCH_HIGHBAN select ARM_AMBA select ARM_ERRATA_764369 select ARM_ERRATA_775420 - select ARM_ERRATA_798181 + select ARM_ERRATA_798181 if SMP select ARM_GIC + select ARM_PSCI select ARM_TIMER_SP804 select CACHE_L2X0 - select CLKDEV_LOOKUP select COMMON_CLK select CPU_V7 select GENERIC_CLOCKEVENTS diff --cc arch/arm/mach-integrator/pci_v3.c index bb3aeb31a54e,c9c5a33bc802..aebe5f97a834 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@@ -809,50 -808,34 +808,33 @@@ static u8 __init pci_v3_swizzle(struct return pci_common_swizzle(dev, pinp); } - static int irq_tab[4] __initdata = { - IRQ_AP_PCIINT0, IRQ_AP_PCIINT1, IRQ_AP_PCIINT2, IRQ_AP_PCIINT3 - }; - - /* - * map the specified device/slot/pin to an IRQ. This works out such - * that slot 9 pin 1 is INT0, pin 2 is INT1, and slot 10 pin 1 is INT1. - */ - static int __init pci_v3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) - { - int intnr = ((slot - 9) + (pin - 1)) & 3; - - return irq_tab[intnr]; - } - - static struct hw_pci pci_v3 __initdata = { - .swizzle = pci_v3_swizzle, - .setup = pci_v3_setup, - .nr_controllers = 1, - .ops = &pci_v3_ops, - .preinit = pci_v3_preinit, - .postinit = pci_v3_postinit, - }; - - #ifdef CONFIG_OF - static int __init pci_v3_map_irq_dt(const struct pci_dev *dev, u8 slot, u8 pin) { - struct of_irq oirq; + struct of_phandle_args oirq; int ret; - ret = of_irq_map_pci(dev, &oirq); + ret = of_irq_parse_pci(dev, &oirq); if (ret) { - dev_err(&dev->dev, "of_irq_map_pci() %d\n", ret); + dev_err(&dev->dev, "of_irq_parse_pci() %d\n", ret); /* Proper return code 0 == NO_IRQ */ return 0; } - return irq_create_of_mapping(oirq.controller, oirq.specifier, - oirq.size); + return irq_create_of_mapping(&oirq); } - static int __init pci_v3_dtprobe(struct platform_device *pdev, - struct device_node *np) + static struct hw_pci pci_v3 __initdata = { + .swizzle = pci_v3_swizzle, + .setup = pci_v3_setup, + .nr_controllers = 1, + .ops = &pci_v3_ops, + .preinit = pci_v3_preinit, + .postinit = pci_v3_postinit, + }; + + static int __init pci_v3_probe(struct platform_device *pdev) { + struct device_node *np = pdev->dev.of_node; struct of_pci_range_parser parser; struct of_pci_range range; struct resource *res; diff --cc arch/arm/mach-tegra/Kconfig index f26428d8b62a,56bb6c35d958..f8d1276d18af --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@@ -53,9 -51,9 +51,9 @@@ config ARCH_TEGRA_3x_SO config ARCH_TEGRA_114_SOC bool "Enable support for Tegra114 family" - select HAVE_ARM_ARCH_TIMER - select ARM_ERRATA_798181 + select ARM_ERRATA_798181 if SMP select ARM_L1_CACHE_SHIFT_6 + select HAVE_ARM_ARCH_TIMER select PINCTRL_TEGRA114 help Support for NVIDIA Tegra T114 processor family, based on the diff --cc arch/arm/mach-ux500/Kconfig index 7a3fc1af6944,c67f8ad5ccd5..0034d2cd6973 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig @@@ -16,24 -27,9 +27,8 @@@ config ARCH_U850 if ARCH_U8500 - config UX500_SOC_COMMON - bool - default y - select ABX500_CORE - select AB8500_CORE - select ARM_ERRATA_754322 - select ARM_ERRATA_764369 if SMP - select ARM_GIC - select CACHE_L2X0 - select CLKSRC_NOMADIK_MTU - select COMMON_CLK - select PINCTRL - select PINCTRL_NOMADIK - select PINCTRL_ABX500 - select PL310_ERRATA_753970 if CACHE_PL310 - config UX500_SOC_DB8500 bool - select CPU_FREQ_TABLE if CPU_FREQ select MFD_DB8500_PRCMU select PINCTRL_DB8500 select PINCTRL_DB8540 diff --cc drivers/cpuidle/Kconfig.arm index f23bd75426cd,d6f57d5d9631..d988948a89a0 --- a/drivers/cpuidle/Kconfig.arm +++ b/drivers/cpuidle/Kconfig.arm @@@ -2,20 -2,9 +2,20 @@@ # ARM CPU Idle drivers # +config ARM_BIG_LITTLE_CPUIDLE + bool "Support for ARM big.LITTLE processors" + depends on ARCH_VEXPRESS_TC2_PM + select ARM_CPU_SUSPEND + select CPU_IDLE_MULTIPLE_DRIVERS + help + Select this option to enable CPU idle driver for big.LITTLE based + ARM systems. Driver manages CPUs coordination through MCPM and + define different C-states for little and big cores through the + multiple CPU idle drivers infrastructure. + config ARM_HIGHBANK_CPUIDLE bool "CPU Idle Driver for Calxeda processors" - depends on ARCH_HIGHBANK + depends on ARM_PSCI select ARM_CPU_SUSPEND help Select this to enable cpuidle on Calxeda processors. diff --cc drivers/pci/host/pci-mvebu.c index 3a8d01ec50f7,80b2250ea19a..94dc22f6eed8 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@@ -645,12 -665,12 +665,12 @@@ static int mvebu_pcie_setup(int nr, str return 1; } - static int __init mvebu_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) + static int mvebu_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { - struct of_irq oirq; + struct of_phandle_args oirq; int ret; - ret = of_irq_map_pci(dev, &oirq); + ret = of_irq_parse_pci(dev, &oirq); if (ret) return ret;