From: Sylwester Nawrocki Date: Thu, 10 Mar 2011 12:53:36 +0000 (+0900) Subject: ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback X-Git-Tag: v2.6.39-rc1~434^2^2~18 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=e24d208de6bc779c6bd97523cde2665a33f2be4d;p=karo-tx-linux.git ARM: S5P: Extend MIPI-CSIS platform_data with the PHY control callback Extend MIPI-CSIS driver's platform data structure with a callback for D-PHY enable and reset control. Also add a flag indicating whether the external MIPI-CSI (VDD18_MIPI) power supply should be managed in the driver through the "vdd" power supply. On some boards this regulator may be a fixed voltage regulator without an inhibit function. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Kukjin Kim --- diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h index 8b3ada88df7a..9bd254c5ed22 100644 --- a/arch/arm/plat-s5p/include/plat/mipi_csis.h +++ b/arch/arm/plat-s5p/include/plat/mipi_csis.h @@ -11,18 +11,33 @@ #ifndef PLAT_S5P_MIPI_CSIS_H_ #define PLAT_S5P_MIPI_CSIS_H_ __FILE__ +struct platform_device; + /** * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver * @clk_rate: bus clock frequency * @lanes: number of data lanes used * @alignment: data alignment in bits * @hs_settle: HS-RX settle time + * @fixed_phy_vdd: false to enable external D-PHY regulator management in the + * driver or true in case this regulator has no enable function + * @phy_enable: pointer to a callback controlling D-PHY enable/reset */ struct s5p_platform_mipi_csis { unsigned long clk_rate; u8 lanes; u8 alignment; u8 hs_settle; + bool fixed_phy_vdd; + int (*phy_enable)(struct platform_device *pdev, bool on); }; +/** + * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control + * @pdev: MIPI-CSIS platform device + * @on: true to enable D-PHY and deassert its reset + * false to disable D-PHY + */ +int s5p_csis_phy_enable(struct platform_device *pdev, bool on); + #endif /* PLAT_S5P_MIPI_CSIS_H_ */