From: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Date: Wed, 28 Jul 2010 00:57:18 +0000 (+0000)
Subject: viafb: reset correct PLL
X-Git-Tag: v2.6.37-rc1~80^2~28
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=e3812ce4ee43f50a7423de70609f42990039f4ae;p=karo-tx-linux.git

viafb: reset correct PLL

Looks like we did reset the PLL of the (whatever) engine instead of
the PLL of the secondary display (IGA2, LCDCK). This patch fixes it.

Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: Joseph Chan <JosephChan@via.com.tw>
---

diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 7dcb4d5bb9c3..53b06514cd1e 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -1688,8 +1688,8 @@ void viafb_set_vclock(u32 clk, int set_iga)
 	}
 
 	if (set_iga == IGA2) {
-		viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0);
-		viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0);
+		viafb_write_reg_mask(SR40, VIASR, 0x04, BIT2);
+		viafb_write_reg_mask(SR40, VIASR, 0x00, BIT2);
 	}
 
 	/* Fire! */