From: Phil Elwell Date: Mon, 15 May 2017 17:35:04 +0000 (-0700) Subject: clk: bcm2835: Correct the prediv logic X-Git-Tag: v4.13-rc1~117^2~45 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=e45098d703fbb9a7b02eae581aadb684b31e0eec;p=karo-tx-linux.git clk: bcm2835: Correct the prediv logic If a clock has the prediv flag set, both the integer and fractional parts must be scaled when calculating the resulting frequency. Signed-off-by: Phil Elwell Signed-off-by: Eric Anholt Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 025853870619..7a35df6b45bd 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -616,8 +616,10 @@ static unsigned long bcm2835_pll_get_rate(struct clk_hw *hw, using_prediv = cprman_read(cprman, data->ana_reg_base + 4) & data->ana->fb_prediv_mask; - if (using_prediv) + if (using_prediv) { ndiv *= 2; + fdiv *= 2; + } return bcm2835_pll_rate_from_divisors(parent_rate, ndiv, fdiv, pdiv); }