From: Daniel Vetter Date: Wed, 4 Jan 2017 10:41:10 +0000 (+0100) Subject: Merge tag 'drm-misc-next-2016-12-30' of git://anongit.freedesktop.org/git/drm-misc... X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=ef426c103892eed94a9bb0ee59c2d0e6eac5179f;p=linux-beck.git Merge tag 'drm-misc-next-2016-12-30' of git://anongit.freedesktop.org/git/drm-misc into drm-intel-next-queued Directly merge drm-misc into drm-intel since Dave is on vacation and we need the various drm-misc patches (fb format rework, drm mm fixes, selftest framework and others). Also pulled back -rc2 in first to resync with drm-intel-fixes and make sure I can reuse the exact rerere solutions from drm-tip for safety, and because I'm lazy. Signed-off-by: Daniel Vetter --- ef426c103892eed94a9bb0ee59c2d0e6eac5179f diff --cc drivers/gpu/drm/i915/i915_gem_evict.c index 6457fd0c33a8,85ceff1b74b6..50129ec1caab --- a/drivers/gpu/drm/i915/i915_gem_evict.c +++ b/drivers/gpu/drm/i915/i915_gem_evict.c @@@ -96,7 -99,8 +99,8 @@@ i915_gem_evict_something(struct i915_ad u64 start, u64 end, unsigned flags) { - struct drm_i915_private *dev_priv = to_i915(vm->dev); + struct drm_i915_private *dev_priv = vm->i915; + struct drm_mm_scan scan; struct list_head eviction_list; struct list_head *phases[] = { &vm->inactive_list, @@@ -104,9 -108,10 +108,10 @@@ NULL, }, **phase; struct i915_vma *vma, *next; + struct drm_mm_node *node; int ret; - lockdep_assert_held(&vm->dev->struct_mutex); + lockdep_assert_held(&vm->i915->drm.struct_mutex); trace_i915_gem_evict(vm, min_size, alignment, flags); /* @@@ -122,21 -127,12 +127,19 @@@ * On each list, the oldest objects lie at the HEAD with the freshest * object on the TAIL. */ - if (start != 0 || end != vm->total) { - drm_mm_init_scan_with_range(&vm->mm, min_size, - alignment, cache_level, - start, end); - } else - drm_mm_init_scan(&vm->mm, min_size, alignment, cache_level); + drm_mm_scan_init_with_range(&scan, &vm->mm, + min_size, alignment, cache_level, + start, end, + flags & PIN_HIGH ? DRM_MM_CREATE_TOP : 0); - if (flags & PIN_NONBLOCK) + /* Retire before we search the active list. Although we have + * reasonable accuracy in our retirement lists, we may have + * a stray pin (preventing eviction) that can only be resolved by + * retiring. + */ + if (!(flags & PIN_NONBLOCK)) + i915_gem_retire_requests(dev_priv); + else phases[1] = NULL; search_again: diff --cc drivers/gpu/drm/i915/i915_vma.c index e008e4e8b481,325b917c5ad7..d48c68214611 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@@ -327,16 -313,18 +327,16 @@@ bool i915_gem_valid_gtt_space(struct i9 if (vma->vm->mm.color_adjust == NULL) return true; - if (!drm_mm_node_allocated(gtt_space)) - return true; - - if (list_empty(>t_space->node_list)) - return true; + /* Only valid to be called on an already inserted vma */ + GEM_BUG_ON(!drm_mm_node_allocated(node)); + GEM_BUG_ON(list_empty(&node->node_list)); - other = list_entry(gtt_space->node_list.prev, struct drm_mm_node, node_list); - if (other->allocated && !drm_mm_hole_follows(other) && other->color != cache_level) + other = list_prev_entry(node, node_list); - if (color_differs(other, cache_level) && !other->hole_follows) ++ if (color_differs(other, cache_level) && !drm_mm_hole_follows(other)) return false; - other = list_entry(gtt_space->node_list.next, struct drm_mm_node, node_list); - if (other->allocated && !drm_mm_hole_follows(gtt_space) && other->color != cache_level) + other = list_next_entry(node, node_list); - if (color_differs(other, cache_level) && !node->hole_follows) ++ if (color_differs(other, cache_level) && !drm_mm_hole_follows(node)) return false; return true; diff --cc drivers/gpu/drm/i915/intel_overlay.c index c95362327ffb,568d194435fd..4473a611c664 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@@ -722,10 -666,8 +722,10 @@@ static void update_colorkey(struct inte if (overlay->color_key_enabled) flags |= DST_KEY_ENABLE; - switch (fb->format->format) { + if (state->base.visible) - format = state->base.fb->pixel_format; ++ format = state->base.fb->format->format; + + switch (format) { case DRM_FORMAT_C8: key = 0; flags |= CLK_RGB8I_MASK; diff --cc drivers/gpu/drm/i915/intel_pm.c index ccdea53210c0,ce03d9d5aca6..249623d45be0 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@@ -991,13 -960,13 +991,13 @@@ static uint16_t vlv_compute_wm_level(co if (dev_priv->wm.pri_latency[level] == 0) return USHRT_MAX; - if (!state->base.visible) + if (!plane_state->base.visible) return 0; - cpp = drm_format_plane_cpp(plane_state->base.fb->pixel_format, 0); - cpp = state->base.fb->format->cpp[0]; - clock = crtc->config->base.adjusted_mode.crtc_clock; - htotal = crtc->config->base.adjusted_mode.crtc_htotal; - width = crtc->config->pipe_src_w; ++ cpp = plane_state->base.fb->format->cpp[0]; + clock = adjusted_mode->crtc_clock; + htotal = adjusted_mode->crtc_htotal; + width = crtc_state->pipe_src_w; if (WARN_ON(htotal == 0)) htotal = 1; diff --cc drivers/gpu/drm/i915/intel_sprite.c index 63154a5a9305,ff766c0cb873..7031bc733d97 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@@ -443,23 -443,23 +443,23 @@@ vlv_update_plane(struct drm_plane *dpla sprctl |= SP_SOURCE_KEY; if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) - chv_update_csc(intel_plane, fb->pixel_format); + chv_update_csc(intel_plane, fb->format->format); - I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]); - I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x); + I915_WRITE(SPSTRIDE(pipe, plane_id), fb->pitches[0]); + I915_WRITE(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x); if (fb->modifier == I915_FORMAT_MOD_X_TILED) - I915_WRITE(SPTILEOFF(pipe, plane), (y << 16) | x); + I915_WRITE(SPTILEOFF(pipe, plane_id), (y << 16) | x); else - I915_WRITE(SPLINOFF(pipe, plane), linear_offset); + I915_WRITE(SPLINOFF(pipe, plane_id), linear_offset); - I915_WRITE(SPCONSTALPHA(pipe, plane), 0); + I915_WRITE(SPCONSTALPHA(pipe, plane_id), 0); - I915_WRITE(SPSIZE(pipe, plane), (crtc_h << 16) | crtc_w); - I915_WRITE(SPCNTR(pipe, plane), sprctl); - I915_WRITE(SPSURF(pipe, plane), + I915_WRITE(SPSIZE(pipe, plane_id), (crtc_h << 16) | crtc_w); + I915_WRITE(SPCNTR(pipe, plane_id), sprctl); + I915_WRITE(SPSURF(pipe, plane_id), intel_fb_gtt_offset(fb, rotation) + sprsurf_offset); - POSTING_READ(SPSURF(pipe, plane)); + POSTING_READ(SPSURF(pipe, plane_id)); } static void