From: Takeshi Kihara Date: Wed, 19 Apr 2017 17:46:25 +0000 (+0900) Subject: clk: renesas: r8a7795: Add HS-USB ch3 clock X-Git-Tag: v4.13-rc1~117^2~51^2~26 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=f5ca01141c8c7df5c492b8d9f2e4b784b0822388;p=karo-tx-linux.git clk: renesas: r8a7795: Add HS-USB ch3 clock This patch adds valid HS-USB ch3 clock from R8A7795 ES2.0 SoC. Signed-off-by: Takeshi Kihara Signed-off-by: Yoshihiro Kaneko Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index 58dd5b6bef0d..5808803cec48 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -196,6 +196,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = { DEF_MOD("ehci1", 702, R8A7795_CLK_S3D4), DEF_MOD("ehci0", 703, R8A7795_CLK_S3D4), DEF_MOD("hsusb", 704, R8A7795_CLK_S3D4), + DEF_MOD("hsusb3", 705, R8A7795_CLK_S3D4), DEF_MOD("csi21", 713, R8A7795_CLK_CSI0), /* ES1.x */ DEF_MOD("csi20", 714, R8A7795_CLK_CSI0), DEF_MOD("csi41", 715, R8A7795_CLK_CSI0),