From: Eric Anholt Date: Thu, 19 Jan 2012 18:50:06 +0000 (-0800) Subject: drm/i915: Correct the bit number for the MI_FLUSH_ENABLE. X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=fc74d8e01165b567922921d110b6d16320a61fa6;p=mv-sheeva.git drm/i915: Correct the bit number for the MI_FLUSH_ENABLE. Older specs claimed this was bit 11, but newer specs and the actual simulator code say it was bit 12. Regardless, we don't use MI_FLUSH, or try to enable it any more. Signed-off-by: Eric Anholt Reviewed-by: Kenneth Graunke Reviewed-by: Ben Widawsky [danvet: Anyone trying to use this bit, please read all the relevant discussions, it's epic.] Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c3afb783cb9..bbad7885348 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -391,7 +391,7 @@ #define MI_MODE 0x0209c # define VS_TIMER_DISPATCH (1 << 6) -# define MI_FLUSH_ENABLE (1 << 11) +# define MI_FLUSH_ENABLE (1 << 12) #define GFX_MODE 0x02520 #define GFX_MODE_GEN7 0x0229c