From: Vladimir Zapolskiy <vz@mleia.com>
Date: Wed, 19 Oct 2011 19:39:12 +0000 (+0300)
Subject: staging: tidspbridge: MMU2 registers are limited to 32-bit data access
X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=fcde2bf0b9a0581db9fe5382e0c90f526c011114;p=linux-beck.git

staging: tidspbridge: MMU2 registers are limited to 32-bit data access

According to OMAP3 TRM access to MMU registers shall be strictly 32-bit
aligned.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
---

diff --git a/drivers/staging/tidspbridge/hw/hw_mmu.c b/drivers/staging/tidspbridge/hw/hw_mmu.c
index c214df9b205e..8a93d55ca596 100644
--- a/drivers/staging/tidspbridge/hw/hw_mmu.c
+++ b/drivers/staging/tidspbridge/hw/hw_mmu.c
@@ -558,5 +558,5 @@ static hw_status mmu_set_ram_entry(const void __iomem *base_address,
 
 void hw_mmu_tlb_flush_all(const void __iomem *base)
 {
-	__raw_writeb(1, base + MMU_GFLUSH);
+	__raw_writel(1, base + MMU_GFLUSH);
 }