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10 years agoarm: socfpga: clock: Sync with reference code
Marek Vasut [Tue, 16 Sep 2014 17:54:32 +0000 (19:54 +0200)]
arm: socfpga: clock: Sync with reference code

Add the missing pieces from the reference clock code from Altera. This
puts the code on par with the Altera U-Boot fork for all but the SDRAM
self-refresh bits, which are not part of this patch.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agoarm: socfpga: clock: Clean up bit definitions
Marek Vasut [Tue, 16 Sep 2014 15:21:00 +0000 (17:21 +0200)]
arm: socfpga: clock: Clean up bit definitions

Clean up the clock code definitions so they are aligned with mainline
standards. There are no functional changes in this patch.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agoarm: socfpga: clock: Trim down code duplication
Marek Vasut [Sat, 13 Sep 2014 06:27:16 +0000 (08:27 +0200)]
arm: socfpga: clock: Trim down code duplication

Pull out functions to read frequency of Main clock VCO and
PLL clock VCO as the code is duplicated multiple times.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agoarm: socfpga: clock: Add code to read clock configuration
Pavel Machek [Mon, 8 Sep 2014 12:08:45 +0000 (14:08 +0200)]
arm: socfpga: clock: Add code to read clock configuration

Add the entire bulk of code to read out clock configuration from the SoCFPGA
CPU registers. This is important for MMC, QSPI and UART drivers as otherwise
they cannot determine the frequency of their upstream clock.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
V2: Fixed the L4 MP clock divider and synced the clock code with latest
    rocketboards codebase (thanks Dinh for pointing this out)

10 years agoarm: socfpga: clock: Add missing stubs into board file
Marek Vasut [Sat, 13 Sep 2014 06:16:49 +0000 (08:16 +0200)]
arm: socfpga: clock: Add missing stubs into board file

Add some stub defines, which are used by the clock code, but are
missing from the auto-generated header file for the SoCFPGA family.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agoarm: socfpga: clock: Drop nonsense inlining from clock manager code
Marek Vasut [Mon, 8 Sep 2014 12:08:45 +0000 (14:08 +0200)]
arm: socfpga: clock: Drop nonsense inlining from clock manager code

The inlining is done by GCC when needed, there is no need to do it
explicitly. Furthermore, the inline keyword does not force-inline
the code, but is only a hint for the compiler. Scrub this hint.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agoarm: socfpga: clock: Implant order into bit definitions
Marek Vasut [Sat, 13 Sep 2014 05:21:16 +0000 (07:21 +0200)]
arm: socfpga: clock: Implant order into bit definitions

The bit definitions for clock manager are complete chaos. Implement
some basic logical order into them.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agoarm: socfpga: sysmgr: Clean up system manager
Marek Vasut [Mon, 8 Sep 2014 12:08:45 +0000 (14:08 +0200)]
arm: socfpga: sysmgr: Clean up system manager

Clean up the system manager register definition and add the missing
register definitions in place.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agoarm: socfpga: Add watchdog disable for socfpga
Pavel Machek [Tue, 9 Sep 2014 12:03:28 +0000 (14:03 +0200)]
arm: socfpga: Add watchdog disable for socfpga

This adds watchdog disable. It is neccessary for running Linux kernel.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
V2: Move RSTMGR_PERMODRST_L4WD0_LSB to reset_manager.h
    Reset watchdog only if CONFIG_HW_WATCHDOG is undefined (the default)

10 years agoarm: socfpga: Clean up base address file
Marek Vasut [Sun, 14 Sep 2014 23:44:39 +0000 (01:44 +0200)]
arm: socfpga: Clean up base address file

Sort the list of functional block addresses and fix indentation.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
10 years agoarm: socfpga: Complete the list of base addresses
Pavel Machek [Tue, 9 Sep 2014 12:05:39 +0000 (14:05 +0200)]
arm: socfpga: Complete the list of base addresses

Add base addresses for all subsystems as documented in the
Cyclone V HPS documentation.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
10 years agoMerge branches 'topic/drivers/fpga-20141006', 'topic/drivers/mmc-20141006', 'topic...
Marek Vasut [Mon, 6 Oct 2014 15:45:55 +0000 (17:45 +0200)]
Merge branches 'topic/drivers/fpga-20141006', 'topic/drivers/mmc-20141006', 'topic/drivers/net-20141006', 'topic/tools/mkimage-20141006' and 'topic/arm/cache-20141006' into HEAD

10 years agoarm: cache: Add support for write-allocate D-Cache
Marek Vasut [Mon, 15 Sep 2014 00:44:36 +0000 (02:44 +0200)]
arm: cache: Add support for write-allocate D-Cache

Add configuration for the write-allocate mode of L1 D-Cache on ARM.
This is needed for D-Cache operation on Cortex-A9 on the SoCFPGA .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agotools: socfpga: Add socfpga preloader signing to mkimage
Charles Manning [Thu, 6 Mar 2014 02:40:50 +0000 (15:40 +1300)]
tools: socfpga: Add socfpga preloader signing to mkimage

Like many platforms, the Altera socfpga platform requires that the
preloader be "signed" in a certain way or the built-in boot ROM will
not boot the code.

This change automatically creates an appropriately signed preloader
from an SPL image.

The signed image includes a CRC which must, of course, be generated
with a CRC generator that the SoCFPGA boot ROM agrees with otherwise
the boot ROM will reject the image.

Unfortunately the CRC used in this boot ROM is not the same as the
Adler CRC in lib/crc32.c. Indeed the Adler code is not technically a
CRC but is more correctly described as a checksum.

Thus, the appropriate CRC generator is added to lib/ as crc32_alt.c.

Signed-off-by: Charles Manning <cdhmanning@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
V2: - Zap unused constant
    - Explicitly print an error message in case of error
    - Rework the hdr_checksum() function to take the *header directly
      instead of a plan buffer pointer

10 years agonet: dwc: Make the cache handling less cryptic
Marek Vasut [Sun, 14 Sep 2014 23:05:23 +0000 (01:05 +0200)]
net: dwc: Make the cache handling less cryptic

Add a few new variables to make the cache handling less cryptic.
Add a variable for DMA and DATA descriptor start and end, so the
correctness of the code is easier to inspect.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
10 years agonet: dwc: Fix cache alignment issues
Marek Vasut [Sun, 14 Sep 2014 22:50:37 +0000 (00:50 +0200)]
net: dwc: Fix cache alignment issues

Fix remaining cache alignment issues in the DWC Ethernet driver.
Please note that the cache handling in the driver is making the
code hideous and thus the next patch cleans that up. In order to
make this change reviewable though, the cleanup is split from it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agonet: phy: Cleanup drivers/net/phy/micrel.c
Pavel Machek [Tue, 9 Sep 2014 12:26:51 +0000 (14:26 +0200)]
net: phy: Cleanup drivers/net/phy/micrel.c

Old saying says that more than three exclamation marks in a row are
sign of mental disease. Cleanup micrel.c.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Chin Liang See <clsee@altera.com>
10 years agonet: Remove unused CONFIG_DW_SEARCH_PHY from configs
Pavel Machek [Tue, 9 Sep 2014 00:45:03 +0000 (02:45 +0200)]
net: Remove unused CONFIG_DW_SEARCH_PHY from configs

Remove this symbol from configs, since it's unused.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Chin Liang See <clsee@altera.com>
10 years agommc: dw_mmc: Fix cache alignment issue
Marek Vasut [Sun, 14 Sep 2014 23:18:15 +0000 (01:18 +0200)]
mmc: dw_mmc: Fix cache alignment issue

The DMA descriptors used by the DW MMC block must be aligned to cacheline
size, otherwise we are unable to properly flush/inval cache over them and
we get data corruption.

The reason I chose this approach of expanding the structure is because
the driver allocates the descriptors in bulk. This approach does waste
space by inserting slop inbetween the descriptors, but it makes access
to the descriptors easy as the compiler does know the real size of the
structure. It also makes cache operations easy, since the size of the
structure is cache aligned and the structure start address is as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agommc: dw_mmc: cleanups
Pavel Machek [Fri, 5 Sep 2014 10:49:48 +0000 (12:49 +0200)]
mmc: dw_mmc: cleanups

The dw_mmc driver was responding to errors with debug(). Change that
to prinf()/puts() respectively so that any errors are immediately
obvious. Also adjust english in comments.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Chin Liang See <clsee@altera.com>
10 years agofpga: altera: Turn the switches into table lookup
Marek Vasut [Tue, 16 Sep 2014 19:17:51 +0000 (21:17 +0200)]
fpga: altera: Turn the switches into table lookup

Add a table of FPGA family with matching functions associated with
it and make all the code just look up the family in that table and
call the associated function instead of the horrible switch voodoo
which was duplicated all over the place.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agofpga: altera: Clean up enums in altera.h
Marek Vasut [Tue, 16 Sep 2014 18:48:33 +0000 (20:48 +0200)]
fpga: altera: Clean up enums in altera.h

Get rid of the line-over-80 problems and zap the typedef that
went alongside those enums.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agofpga: altera: Make altera_validate return normal values
Marek Vasut [Tue, 16 Sep 2014 18:33:54 +0000 (20:33 +0200)]
fpga: altera: Make altera_validate return normal values

Make the function return either 0 or -EINVAL, that is, normal
expected error codes and success codes instead of true/false
nonsense.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agofpga: altera: Move altera_validate to the top
Marek Vasut [Tue, 16 Sep 2014 18:32:51 +0000 (20:32 +0200)]
fpga: altera: Move altera_validate to the top

Move the function to the top of the file to avoid forward declaration.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agofpga: altera: More indentation trimdown
Marek Vasut [Tue, 16 Sep 2014 18:29:24 +0000 (20:29 +0200)]
fpga: altera: More indentation trimdown

Further improve the indentation in the rest of the file, where
the indentation is initially a bit less brutal. There is no
functional change in this patch.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agofpga: altera: Clean up altera_validate function
Marek Vasut [Tue, 16 Sep 2014 18:26:07 +0000 (20:26 +0200)]
fpga: altera: Clean up altera_validate function

Boldly go, where no programmer has gone before and just clean up
the indentation mayhem. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
10 years agofpga: altera: Clean up the printing and debug
Marek Vasut [Tue, 16 Sep 2014 18:21:42 +0000 (20:21 +0200)]
fpga: altera: Clean up the printing and debug

Clean up the printf() statements and get rid of the PRINTF()
macro by replacing it with debug_cond().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
10 years agoMerge branch 'for-tom' of git://git.denx.de/u-boot-dm
Tom Rini [Sat, 27 Sep 2014 00:10:48 +0000 (20:10 -0400)]
Merge branch 'for-tom' of git://git.denx.de/u-boot-dm

10 years agospi: Add brackets and tidy defines in spi.h
Simon Glass [Mon, 15 Sep 2014 12:33:23 +0000 (06:33 -0600)]
spi: Add brackets and tidy defines in spi.h

Some of the #defines in spi.h are not bracketed. To avoid future mistakes
add brackets. Also add an explanatory comment for SPI_CONN_DUAL_...

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agodm: spi: Move cmd device code into its own function
Simon Glass [Mon, 15 Sep 2014 12:33:22 +0000 (06:33 -0600)]
dm: spi: Move cmd device code into its own function

In preparation for changing the error handling in this code for driver
model, move it into its own function.

Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: config: Enable all SPI flash chips
Simon Glass [Mon, 15 Sep 2014 12:33:20 +0000 (06:33 -0600)]
sandbox: config: Enable all SPI flash chips

Sandbox may as well support everything. This increases the amount of code
that is built/tested by sandbox, and also provides access to all the
supported SPI flash devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosandbox: Convert SPI flash emulation to use sf_params
Simon Glass [Mon, 15 Sep 2014 12:33:19 +0000 (06:33 -0600)]
sandbox: Convert SPI flash emulation to use sf_params

At present sandbox has its own table of supported SPI flash chips. Now that
the SPI flash system is fully consolidated and has its own list, sandbox
should use that.

This enables us to expand the number of chips that sandbox supports.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Fri, 26 Sep 2014 13:57:52 +0000 (09:57 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Fri, 26 Sep 2014 13:51:18 +0000 (09:51 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

10 years agonand/denali: Document CONFIG symbols
Scott Wood [Thu, 25 Sep 2014 18:54:29 +0000 (13:54 -0500)]
nand/denali: Document CONFIG symbols

The patch "nand/denali: Adding Denali NAND driver support"
introduced two config symbols without documenting them.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agonand/denali: Adding Denali NAND driver support
Chin Liang See [Fri, 12 Sep 2014 05:42:17 +0000 (00:42 -0500)]
nand/denali: Adding Denali NAND driver support

To add the Denali NAND driver support into U-Boot.
This driver is leveraged from Linux with commit ID
fdbad98dff8007f2b8bee6698b5d25ebba0471c9. For Denali
controller 64 variance, you need to declare macro
CONFIG_SYS_NAND_DENALI_64BIT.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agomtd: nand: Fix length bug in ioread16_rep() and iowrite16_rep()
Stefan Roese [Fri, 5 Sep 2014 07:57:01 +0000 (09:57 +0200)]
mtd: nand: Fix length bug in ioread16_rep() and iowrite16_rep()

The ioread16_rep() and iowrite16_rep() implementations are U-Boot specific
and have been introduced with the Linux MTD v3.14 sync. While introducing
these functions, the length for the loop has been miscalculated. The ">> 1"
is already present in the caller. So lets remove it in the function.

Tested on omap3_ha.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
10 years agomtd: nand: am335x: Fix 'bit-flip' errors in SPL
Rostislav Lisovy [Tue, 9 Sep 2014 13:54:30 +0000 (15:54 +0200)]
mtd: nand: am335x: Fix 'bit-flip' errors in SPL

OMAP GPMC driver used with some NAND Flash devices
(e.g. Spansion S34ML08G1) causes that U-boot shows
hundreds of 'nand: bit-flip corrected' error messages.
Possible cause was discussed in the mailinglist thread:
http://lists.denx.de/pipermail/u-boot/2014-April/177508.html

The issue was partially fixed with the cc81a5291910d7a.git
however this has to be done to fix the SPL.

The original author of the code is Belisko Marek
<marek.belisko@gmail.com>

Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
10 years agopowerpc: add --bss-plt to LDFLAGS
Chris Packham [Wed, 10 Sep 2014 04:03:10 +0000 (16:03 +1200)]
powerpc: add --bss-plt to LDFLAGS

With some versions of gcc (that we know of 4.6.3 and 4.8.2 are affected)
it is necessary to specify --bss-plt to get the final blrl in the
_GOT2_TABLE_. Without this the last symbol does not get it's address
relocated.  For the P2041RDB board this ended up being
NetArpWaitTimerStart which caused the ARP packets to timeout
immediately.

Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoboard/ls1021aqds: Add DDR4 support
York Sun [Thu, 11 Sep 2014 20:32:07 +0000 (13:32 -0700)]
board/ls1021aqds: Add DDR4 support

LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig
for this variant to enable DDR4 support. RAW timing parameters are not
added for DDR4. The board timing parameters are only tuned for single-
rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM
availability.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alison Wang <alison.wang@freescale.com>
10 years agodriver/ddr/fsl: Fix DDR4 driver
York Sun [Thu, 11 Sep 2014 20:32:06 +0000 (13:32 -0700)]
driver/ddr/fsl: Fix DDR4 driver

When accumulated ECC is enabled, the DQ_MAP for ECC[4:7] needs to be set
to 0, i.e. 0->0, 1->1, etc., required by controller logic, even these pins
are not actually connected.

Also fix a bug when reading from DDR register to use proper accessor for
correct endianess.

Signed-off-by: York Sun <yorksun@freescale.com>
10 years agoARMv8/ls2085a: Move u-boot location to make room for RCW
York Sun [Mon, 8 Sep 2014 19:20:02 +0000 (12:20 -0700)]
ARMv8/ls2085a: Move u-boot location to make room for RCW

When booting with SP, RCW resides at the beginning of IFC NOR flash.

Signed-off-by: York Sun <yorksun@freescale.com>
10 years agoARMv8/ls2085a: Enable secondary cores
York Sun [Mon, 8 Sep 2014 19:20:01 +0000 (12:20 -0700)]
ARMv8/ls2085a: Enable secondary cores

Spin table is at the very beginning of boot code. Each core has an individual
release address within the spin table, the ft_cpu_setup fn updates the
"cpu-release-addr" property of each cpu node with the corresponding release
address.

Also fix CPU_RELEASE_ADDR to point to secondary_boot_func.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
10 years agoarmv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page
York Sun [Mon, 8 Sep 2014 19:20:00 +0000 (12:20 -0700)]
armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page

Secondary cores need to be released from holdoff by boot release
registers. With GPP bootrom, they can boot from main memory
directly. Individual spin table is used for each core. Spin table
and the boot page is reserved in device tree so OS won't overwrite.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
10 years agofdt_support: Make of_bus_default_count_cells non static
Arnab Basu [Mon, 8 Sep 2014 19:19:59 +0000 (12:19 -0700)]
fdt_support: Make of_bus_default_count_cells non static

of_bus_default_count_cells can be used to get the #address-cells
and #size-cells defined by the current node's parent node. This
is required when using of_read_number to read from FDT nodes that
can be 32 or 64 bytes depending on values defined by the parent.

Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
10 years agofdt_support: Move of_read_number to fdt_support.h
Arnab Basu [Mon, 8 Sep 2014 19:19:58 +0000 (12:19 -0700)]
fdt_support: Move of_read_number to fdt_support.h

This is being done so that it can be used outside 'fdt_support.c'. Making
life more convenient when reading device node properties that can be 32
or 64 bits long.

Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
10 years agodriver/ddr/fsl: Fix tXP and tCKE
York Sun [Thu, 21 Aug 2014 23:13:22 +0000 (16:13 -0700)]
driver/ddr/fsl: Fix tXP and tCKE

The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.

Signed-off-by: York Sun <yorksun@freescale.com>
10 years agoARMv8/ls2085a_emu: Enable DP-DDR as standalone memory block
York Sun [Wed, 13 Aug 2014 17:21:05 +0000 (10:21 -0700)]
ARMv8/ls2085a_emu: Enable DP-DDR as standalone memory block

DP-DDR is used for DPAA, separated from main memory pool for general
use. It has 32-bit bus width and use a standard DDR4 DIMM (64-bit).

Signed-off-by: York Sun <yorksun@freescale.com>
10 years agodriver/ddr: Restruct driver to allow standalone memory space
York Sun [Fri, 1 Aug 2014 22:51:00 +0000 (15:51 -0700)]
driver/ddr: Restruct driver to allow standalone memory space

U-boot has been initializing DDR for the main memory. The presumption
is the memory stays as a big continuous block, either linear or
interleaved. This change is to support putting some DDR controllers
to separated space without counting into main memory. The standalone
memory controller could use different number of DIMM slots.

Signed-off-by: York Sun <yorksun@freescale.com>
10 years agoboard/ls2085a: Add support of NOR and NAND flash for simulator
Prabhakar Kushwaha [Wed, 16 Jul 2014 03:51:12 +0000 (09:21 +0530)]
board/ls2085a: Add support of NOR and NAND flash for simulator

Add support of NOR and NAND flash for simulator target.
Here
  IFC - CS0: NOR flash
  IFC - CS1: NAND flash

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agodriver/mtd: Use generic timer API for FSL IFC, eLBC
Prabhakar Kushwaha [Tue, 23 Sep 2014 04:27:47 +0000 (09:57 +0530)]
driver/mtd: Use generic timer API for FSL IFC, eLBC

Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks

Replace usec2ticks with get_timer() (generic timer API)

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agocheckpatch: remove unnecessary + after {8,8}
Joe Perches [Tue, 23 Sep 2014 10:41:02 +0000 (12:41 +0200)]
checkpatch: remove unnecessary + after {8,8}

Pick the following commit from Linux kernel:
commit 66cb4ee0e52ca721f609fd5eec16187189ae5fda
Author: Joe Perches <joe@perches.com>
Date:   Wed Sep 10 09:40:47 2014 +1000

checkpatch: remove unnecessary + after {8,8}

There's a useless "+" use that needs to be removed as perl 5.20 emits a
"Useless use of greediness modifier '+'" message each time it's hit.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
10 years agokconfig: move CONFIG_DEFAULT_DEVICE_TREE to kconfig
Masahiro Yamada [Mon, 22 Sep 2014 10:59:06 +0000 (19:59 +0900)]
kconfig: move CONFIG_DEFAULT_DEVICE_TREE to kconfig

This option specifies the default Device Tree used for the run-time
configuration of U-Boot.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Michal Simek <michal.simek@xilinx.com>
10 years agokconfig: move CONFIG_OF_* to Kconfig
Masahiro Yamada [Mon, 22 Sep 2014 10:59:05 +0000 (19:59 +0900)]
kconfig: move CONFIG_OF_* to Kconfig

This commit moves:
  CONFIG_OF_CONTROL
  CONFIG_OF_SEPARATE
  CONFIG_OF_EMBED
  CONFIG_OF_HOSTFILE

Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.

Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
10 years agotools: remove reformat.py
Masahiro Yamada [Mon, 22 Sep 2014 06:06:15 +0000 (15:06 +0900)]
tools: remove reformat.py

This tools is unnecessary since commit f6c8f38ec601
(tools/genboardscfg.py: improve performance more with Kconfiglib).

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoREADME.clang: update FreeBSD instructions
Jeroen Hofstee [Sun, 21 Sep 2014 08:20:22 +0000 (10:20 +0200)]
README.clang: update FreeBSD instructions

The mentioned binutils port got removed while the patch was
pending. As Ian pointed out there is another port providing
the binutils for arm now. Update the instructions accordingly.

Cc: ian@FreeBSD.org
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
10 years agocompiler_gcc: prevent redefining attributes
Jeroen Hofstee [Thu, 18 Sep 2014 18:10:27 +0000 (20:10 +0200)]
compiler_gcc: prevent redefining attributes

The libc headers on FreeBSD and likely related projects as well contain an
header file, cdefs.h which provides similiar functionality as linux/compiler.h.
It provides compiler independent defines like __weak __packed, to allow
compiling with multiple compilers which might have a different syntax for such
extension.

Since that header file is included in multiple standard headers, like stddef.h
and stdarg.h, multiple definitions of those defines will be present if both are
included. When compiling u-boot the compiler will warn about it hundreds of
times since e.g. common.h will include both files indirectly.

commit 7ea50d52849fe8ffa5b5b74c979b60b1045d6fc9 "compiler_gcc: do not redefine
__gnu_attributes" prevented such redefinitions, but this was undone by commit
fb8ffd7cfc68b3dc44e182356a207d784cb30b34 "compiler*.h: sync
include/linux/compiler*.h with Linux 3.16".

Add the checks back where necessary to prevent such warnings.

As the original patch this checkpatch warning is ignored:
"WARNING: Adding new packed members is to be done with care"

Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agokbuild: refactor some makefiles
Masahiro Yamada [Thu, 18 Sep 2014 06:43:41 +0000 (15:43 +0900)]
kbuild: refactor some makefiles

[1] Move driver/core/, driver/input/ and drivers/input/ entries
    from the top Makefile to drivers/Makefile

[2] Remove the conditional by CONFIG_DM in drivers/core/Makefile
    because the whole drivers/core directory is already selected
    by CONFIG_DM in the upper level

[3] Likewise for CONFIG_DM_DEMO in drivers/demo/Makefile

[4] Simplify common/Makefile - both CONFIG_DDR_SPD and
    CONFIG_SPD_EEPROM are boolean macros so they can directly
    select objects

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
10 years agocommon.h: remove MIN, MAX, MIN3, MAX3 macros
Masahiro Yamada [Thu, 18 Sep 2014 04:28:07 +0000 (13:28 +0900)]
common.h: remove MIN, MAX, MIN3, MAX3 macros

Now MIN, MAX, MIN3, MAX are not used.
Going forward, use min, max, min3, max3.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agocosmetic: replace MIN, MAX with min, max
Masahiro Yamada [Thu, 18 Sep 2014 04:28:06 +0000 (13:28 +0900)]
cosmetic: replace MIN, MAX with min, max

The macro MIN, MAX is defined as the aliase of min, max,
respectively.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agocompiler.h: remove duplicated uninitialized_var
Jeroen Hofstee [Wed, 17 Sep 2014 18:33:48 +0000 (20:33 +0200)]
compiler.h: remove duplicated uninitialized_var

Since clang has a different definition for uninitialized_var
it will complain that it is redefined in include/compiler.h.
Since these are already defined in linux/compiler.h just remove
this instance.

Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
10 years agocmd_nand: Update (nand_info_t*)nand after arg_off(_size) call
Rostislav Lisovy [Tue, 16 Sep 2014 12:38:52 +0000 (14:38 +0200)]
cmd_nand: Update (nand_info_t*)nand after arg_off(_size) call

The arg_off() and arg_off_size() update the 'current NAND
device' variable (dev). This is then used when assigning the
(nand_info_t*)nand value. Place the assignment after the
arg_off(_size) calls to prevent using incorrect (nand_info_t*)
nand value.

Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
10 years agolinker_lists: fix comment
Masahiro Yamada [Tue, 16 Sep 2014 11:21:15 +0000 (20:21 +0900)]
linker_lists: fix comment

The section name and the C variable name seem to be opposite.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
10 years agokconfig: remove config_cmd_defaults.h
Masahiro Yamada [Tue, 16 Sep 2014 07:33:05 +0000 (16:33 +0900)]
kconfig: remove config_cmd_defaults.h

Now config_cmd_defaults.h is empty so it can be deleted safely.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: move CONFIG_CMD_IMPORTENV to Kconfig
Masahiro Yamada [Tue, 16 Sep 2014 07:33:04 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_IMPORTENV to Kconfig

Since CONFIG_CMD_IMPORTENV is defined in config_cmd_defaults.h,
it should be enabled for all the boards except bf506f-ezkit
that undefs it explicitely.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: move CONFIG_CMD_GO to Kconfig
Masahiro Yamada [Tue, 16 Sep 2014 07:33:03 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_GO to Kconfig

Since CONFIG_CMD_GO is defined in config_cmd_defaults.h
(and no board undefs it its own header), it can be moved to
Kconfig with the default value "y".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: move CONFIG_CMD_EXPORTENV to Kconfig
Masahiro Yamada [Tue, 16 Sep 2014 07:33:02 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_EXPORTENV to Kconfig

Since CONFIG_CMD_EXPORTENV is defined in config_cmd_defaults.h,
it should be enabled for all the boards except bf506f-ezkit
that undefs it explicitely.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: move CONFIG_CMD_CRC32 to Kconfig
Masahiro Yamada [Tue, 16 Sep 2014 07:33:01 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_CRC32 to Kconfig

Since CONFIG_CMD_CRC32 is defined in config_cmd_defaults.h,
it is enabled for all the boards except the ones undefining it
explicitly:
  kwb
  tseries_mmc
  tseries_nand
  tseries_spi
  vct_platinum_onenand_small
  vct_platinum_small
  vct_platinumavc_onenand_small
  vct_platinumavc_small
  vct_premium_onenand_small
  vct_premium_small

The default value of this config option should be "y" and
"# CONFIG_CMD_CRC32 is not set" should be added for those exceptions.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: move CONFIG_CMD_BOOTM to Kconfig
Masahiro Yamada [Tue, 16 Sep 2014 07:33:00 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_BOOTM to Kconfig

CONFIG_CMD_BOOTM is defined in config_cmd_defaults.h
which is forcebly included from each board.
So, the default value of "config CMD_BOOTM" should be "y".

For some boards undefining it (bf506f-ezkit, controlcenterd_TRAILBLA,
controlcenterd_TRAILBLAZER_DEVELOP, controlcenterd_TRAILBLAZER),
"# CONFIG_CMD_BOOTM is not set" should be added to their defconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: move CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED to Kconfig
Masahiro Yamada [Tue, 16 Sep 2014 07:32:59 +0000 (16:32 +0900)]
kconfig: move CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED to Kconfig

If this option is enabled, the objects under lib/ directory
are compiled with speed optimization, not size optimization.
(Currently, only used by some Blackfin boards.)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: add blank Kconfig files
Masahiro Yamada [Tue, 16 Sep 2014 07:32:58 +0000 (16:32 +0900)]
kconfig: add blank Kconfig files

This would be useful to start moving various config options.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agoconfig_distro_bootcmd: Run 'scsi scan' before trying scsi disks
Hans de Goede [Tue, 16 Sep 2014 07:26:23 +0000 (09:26 +0200)]
config_distro_bootcmd: Run 'scsi scan' before trying scsi disks

Scsi disks need to be probed before we try to access them, otherwise all
accesses fail with: ** Bad device size - scsi 0 **.

Reported-by: Karsten Merker <merker@debian.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Karsten Merker <merker@debian.org>
10 years agoMAINTAINERS: comment out blank M: field
Masahiro Yamada [Tue, 16 Sep 2014 05:11:51 +0000 (14:11 +0900)]
MAINTAINERS: comment out blank M: field

Since commit ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4
(patman: RunPipe() should not pipe stdout/stderr unless asked),
Patman spits lots of "Invalid MAINTAINERS address: '-'"
error messages for patches with global changes.
It takes too long for Patman to process them.

Anyway, "M:    -" does not carry any important information.
Rather, it is just like a place holder in case of assigning
a new board maintainer.  Let's comment out.

This commit can be reproduced by the following command:

find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/'

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoMAINTAINERS: comment out invalid maintainers
Masahiro Yamada [Tue, 16 Sep 2014 05:11:50 +0000 (14:11 +0900)]
MAINTAINERS: comment out invalid maintainers

The "S:    Orphan" in MAINTAINERS means that the maintainer in the
"M:" field is unreachable (i.e. the email address is not working).
(Refer to the definition of "Orphan" adopted in U-Boot
in the log of commit 31f1b654b2f395b69faa5d0d3c1eb0803923bd3b,
"boards.cfg: move boards with invalid emails to Orphan")

For patch files adding global changes, scripts/get_maintainer.pl
adds bunch of such invalid email addresses, which results in
tons of annoying bounce emails.

This commit can be reproduced by the following command:

find . -name MAINTAINERS | xargs sed -i -e '
/^M:[[:blank:]]/ {
      N
      /S:[[:blank:]]Orphan/s/^/#/
}
'

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agotools/genboardscfg.py: pick up also commented maitainers
Masahiro Yamada [Tue, 16 Sep 2014 05:11:49 +0000 (14:11 +0900)]
tools/genboardscfg.py: pick up also commented maitainers

We are still keeping invalid email addressed in MAINTAINERS
because they carry information.

The problem is that scripts/get_maintainer.pl adds emails in the
"M:" field including invalid ones.

We want to comment out invalid email addresses in MAINTAINERS
to prevent scripts/get_maintainer.pl from picking them up.
On the other hand, we want to collect them for boards.cfg
to know the last known maintainer of each board.

This commit adjusts tools/genboardscfg.py to parse also
the commented "M:" fields, which is useful for the next commit.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agotest: Add a test for command repeat
Simon Glass [Sun, 14 Sep 2014 18:40:17 +0000 (12:40 -0600)]
test: Add a test for command repeat

This performs a command, then repeats it, and checks that the repeat
happens.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agotest: Remove tabs from trace test
Simon Glass [Sun, 14 Sep 2014 18:40:16 +0000 (12:40 -0600)]
test: Remove tabs from trace test

These cause U-Boot to print a list of available commands. It doesn't break
the test, but it is best to remove them from the output.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agosandbox: Disable Ctrl-C
Simon Glass [Sun, 14 Sep 2014 18:40:15 +0000 (12:40 -0600)]
sandbox: Disable Ctrl-C

This is not supported properly on sandbox, and interferes with running
tests, since when a test script is piped in, some commands will call
ctrlc() which will drop characters from the test script.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agoReactivate the tracing feature
Simon Glass [Sun, 14 Sep 2014 18:40:14 +0000 (12:40 -0600)]
Reactivate the tracing feature

This was lost sometime in the Kbuild conversion. Add it back.

Check that the trace test now passes:

$ ./test/trace/test-trace.sh
Simple trace test / sanity check using sandbox

/tmp/filemHKPGw
Build sandbox
O=sandbox FTRACE=1
  GEN     /home/sjg/c/src/third_party/u-boot/files/sandbox/Makefile
Configuring for sandbox board...
Check results
Test passed

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agocleanup disk/part.c whitespace
Pavel Machek [Tue, 9 Sep 2014 13:19:42 +0000 (15:19 +0200)]
cleanup disk/part.c whitespace

Cleanup disk/part.c

Signed-off-by: Pavel Machek <pavel@denx.de>
10 years agompc8xx: move common linker scripts into the CPU directory
Masahiro Yamada [Tue, 9 Sep 2014 06:12:08 +0000 (15:12 +0900)]
mpc8xx: move common linker scripts into the CPU directory

Each CPU of PowerPC has its default linker script under the CPU
directory, except mpc8xx.

Every mpc8xx board has its own linker script under the board
directory, resulting in lots of duplication of linker scripts.

I notice eight mpc8xx boards have the same linker script.
We can decrease the number of linker scripts by putting a single
default linker script, arch/powerpc/cpu/mpc8xx/u-boot.lds.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
10 years agoe1000: fix no nvm build
Marcel Ziswiler [Sun, 7 Sep 2014 22:02:11 +0000 (00:02 +0200)]
e1000: fix no nvm build

Fix the following build error in case CONFIG_E1000_NO_NVM is enabled:
  CC      drivers/net/e1000.o
drivers/net/e1000.c: In function ‘e1000_initialize’:
drivers/net/e1000.c:5365:5: error: ‘struct e1000_hw’ has no
member named ‘eeprom_semaphore_present’
make[1]: *** [drivers/net/e1000.o] Error 1
make: *** [drivers/net] Error 2
Acked-by: Marek Vasut <marex@denx.de>
10 years agotools/env: change stripping strategy to allow no-stripping
Thomas Petazzoni [Wed, 27 Aug 2014 12:29:00 +0000 (14:29 +0200)]
tools/env: change stripping strategy to allow no-stripping

When building the U-Boot tools for non-ELF platforms (such as Blackfin
FLAT), since commit 79fc0c5f498c3982aa4740c273ab1a9255063d9c
("tools/env: cross-compile fw_printenv without setting HOSTCC"), the
build fails because it tries to strip a FLAT binary, which does not
make sense.

This commit solves this by changing the stripping logic in
tools/env/Makefile to be similar to the one in tools/Makefile. This
logic continues to apply strip to the final binary, but does not abort
the build if it fails, and does the stripping in place on the final
binary. This allows the logic to work fine if stripping doesn't work,
as it leaves the final binary untouched.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Sonic Zhang <sonic.zhang@analog.com>
10 years agousb/gadget: fastboot: implement sparse format
Steve Rae [Tue, 26 Aug 2014 18:47:30 +0000 (11:47 -0700)]
usb/gadget: fastboot: implement sparse format

- add capability to "fastboot flash" with sparse format images

Signed-off-by: Steve Rae <srae@broadcom.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
10 years agousb/gadget: fastboot: minor cleanup
Steve Rae [Tue, 26 Aug 2014 18:47:29 +0000 (11:47 -0700)]
usb/gadget: fastboot: minor cleanup

- update static function
- additional debugging statements
- update "fastboot command" information
- add missing include file
- update spelling

Signed-off-by: Steve Rae <srae@broadcom.com>
10 years agousb/gadget: fastboot: add support for flash command
Steve Rae [Tue, 26 Aug 2014 18:47:28 +0000 (11:47 -0700)]
usb/gadget: fastboot: add support for flash command

- implement 'fastboot flash' for eMMC devices

Signed-off-by: Steve Rae <srae@broadcom.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Marek Vasut <marex@denx.de>
10 years agousb/gadget: fastboot: add eMMC support for flash command
Steve Rae [Tue, 26 Aug 2014 18:47:27 +0000 (11:47 -0700)]
usb/gadget: fastboot: add eMMC support for flash command

- add support for 'fastboot flash' command for eMMC devices

Signed-off-by: Steve Rae <srae@broadcom.com>
10 years agoboard/t1040qds: Add sgmii ports support in 0xA7 protocol
Priyanka Jain [Mon, 8 Sep 2014 07:50:52 +0000 (13:20 +0530)]
board/t1040qds: Add sgmii ports support in 0xA7 protocol

T1042QDS (T1042 is T1040 Personality without L2 switch) supports following
sgmii interfaces with serdes protocol 0xA7
-SGMII-MAC3 on Lane B - slot 7
-SGMII-MAC5 on Lane H - slot 7
-SGMII2.5G-MAC1 on Lane C - slot 6
-SGMII2.5G-MAC2 on Lane D - slot 5

Add support of above sgmii interfaces

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
10 years agopowerpc/t104xrdb: Set DDR ODT to 75ohm
Priyanka Jain [Fri, 5 Sep 2014 09:48:31 +0000 (15:18 +0530)]
powerpc/t104xrdb: Set DDR ODT to 75ohm

DDR-ODT require cfg_dram_type switch set properly as per DDR type.
T1040RDB, T1042RDB boards have DDR3L type DDR, so cfg_dram_type
should be set to OFF for DDR3L
Update t104xrdb/README for switch setting

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx: Serdes protocol "00" is supported
Ebony Zhu [Thu, 4 Sep 2014 16:53:00 +0000 (11:53 -0500)]
powerpc/mpc85xx: Serdes protocol "00" is supported

"0x00" is a valid serdes protocol for QorIQ parts, and can not be
used to test whether the serdes is enabled or disabled.

Signed-off-by: Ebony Zhu <b45385@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoB4860QDS: Enable mac command support
Shaveta Leekha [Thu, 4 Sep 2014 10:47:09 +0000 (16:17 +0530)]
B4860QDS: Enable mac command support

One of the I2C EEPROM is used to store/save and edit mac
addresses of ports.
this patch add required CONFIG to support the same

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
10 years agopowerpc/b4860: Updated default hwconfig to enable only cpc2
Shaveta Leekha [Thu, 4 Sep 2014 06:13:57 +0000 (11:43 +0530)]
powerpc/b4860: Updated default hwconfig to enable only cpc2

CPC1 is not being enabled by default as powerpc is supposed to
use only CPC2. Though by editing hwconfig en_cpc option,
CPC1 can also be enabled.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/8xxx: Fix in USB device-tree fixup
ramneek mehresh [Fri, 22 Aug 2014 05:26:05 +0000 (10:56 +0530)]
powerpc/8xxx: Fix in USB device-tree fixup

Fix following issues in USB device-tree fixup:
        - returns when either dr_mode or phy_type not defined.
          This was terminating fix-up when only either property
          was defined in hwconfig string
        - updates dr_mode_type or dr_phy_type with junk value when
          their index is -1. Now these are updated only when their
          respective index is pointing to relevant types
          in modes[] and phys[] array
        - dr_mode_type and dr_phy_type were not NULL for
          each controller

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t104xrdb: Add T1042RDB board support
vijay rai [Tue, 19 Aug 2014 07:16:53 +0000 (12:46 +0530)]
powerpc/t104xrdb: Add T1042RDB board support

T1042RDB is a Freescale reference board that hosts the T1042 SoC
(and variants). The board is similar to T1040RDB, T1042 is a reduced
personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch).

T1042RDB is configured with serdes protocol 0x86 which can support
following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
DTSEC1, DTSEC2 are not connected on board.

This Patch
- add T1042RDB support
- updates README file for T1042RDB details and update commands for switching
  to alternate banks from vBank0 to vBank4 and vice versa

This patch also does minor clean ups for fdt defines for T1042RDB and
T1042RDB_PI board

Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t104xrdb: Add Support of rcw for T1042RDB in u-boot
vijay rai [Wed, 23 Jul 2014 12:55:47 +0000 (18:25 +0530)]
powerpc/t104xrdb: Add Support of rcw for T1042RDB in u-boot

This patch adds support of rcw for T1042RDB, it makes following changes :
- Adds t1042_rcw.cfg file for serdes protocol 0x86 for T1042RDB
- Renames t1042_pi_rcw.cfg file from t1042_rcw.cfg and also updates
  comments for valid serdes protocol which is 0x06
- Also updates CONFIG_SYS_FSL_PBL_RCW for T1042RDB

Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoboard/ls2085a: Update env_addr after NOR flash relocation
Prabhakar Kushwaha [Mon, 14 Jul 2014 11:45:44 +0000 (17:15 +0530)]
board/ls2085a: Update env_addr after NOR flash relocation

LS2085a has 2 regions in system memory map. Region1 is default map from
where system boots. Once u-boot is moved to DDR, IFC is re-mapped to
Region2.

So, update gd->env_addr to reflect correct address.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t104xrdb: Enable SPI flash Extend address support
Zhiqiang Hou [Wed, 17 Sep 2014 09:37:44 +0000 (17:37 +0800)]
powerpc/t104xrdb: Enable SPI flash Extend address support

Enable the Extend address to support SPI flash more than 16MB.

Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
10 years agospi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
Stefan Roese [Tue, 2 Sep 2014 12:02:53 +0000 (14:02 +0200)]
spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agospi: kirkwood_spi.c: Make global variable static
Stefan Roese [Tue, 2 Sep 2014 12:02:52 +0000 (14:02 +0200)]
spi: kirkwood_spi.c: Make global variable static

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agospi: kirkwood_spi.c: Some fixes and cleanup
Stefan Roese [Tue, 2 Sep 2014 12:02:51 +0000 (14:02 +0200)]
spi: kirkwood_spi.c: Some fixes and cleanup

This patch introduces the clrsetbits_le32() accessor functions in the
kirkwood SPI driver. Note that it also includes a fix:

-  writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl);
+  writel(KWSPI_SMEMRDY, &spireg->ctrl);

Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead
0xfffffffe is written into this control register. This is the main
reason to use the clrsetbits() functions now. As they make clearing
bits much less error prone.

Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and
spi_cs_deactivate() any more. Its the wrong macro but has the same
value as the correct one (KWSPI_CSN_ACT).

This is in preparation for use of this driver on the Marvell Armada XP
platform as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>