Alex Deucher [Mon, 21 Nov 2016 21:34:29 +0000 (16:34 -0500)]
drm/amdgpu/uvd: reduce IB parsing overhead on UVD5+ (v2)
UVD 5 and newer do not have the same placement limitations
as older chips, so skip the first pass since it's just
overhead on chips where we don't have to force placement.
v2: fix inverted logic
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Trigger Huang [Wed, 16 Nov 2016 15:13:45 +0000 (10:13 -0500)]
drm/amdgpu: Disable DPM in virtualization
This patch is used for virtualization support. In virtualization,
only SMU manager is needed, DPM should be disabled. This is a
use case for commit 2f9346b6f984
("drm/amdgpu/powerplay: pp module only enable smu when dpm disabled.")
Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 17 Nov 2016 14:40:02 +0000 (15:40 +0100)]
drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM PD/PTs (v2)
Doesn't make much sense to have the same functionality twice.
v2: rebase on dma_fence renaming
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Drop this whole reserve/unreserve dance, just lock the
reservation object manually when creating the BO.
v2: rebase on dma_fence renaming
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 17 Nov 2016 11:16:34 +0000 (12:16 +0100)]
drm/amdgpu: fix error handling in amdgpu_bo_create_restricted
Manually checking why a function could fail is not a good idea
if you can just check the functions return code.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 17 Nov 2016 11:06:38 +0000 (12:06 +0100)]
drm/amdgpu: fix amdgpu_fill_buffer (v2)
The mem start is relative to the domain in the address space, so this
worked only when VRAM was mapped at offset 0.
It also didn't handled multiple drm_mm_nodes for split VRAM.
v2: rebase on dma_fence renaming
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 14 Nov 2016 13:25:41 +0000 (14:25 +0100)]
drm/amdgpu: remove amdgpu_irq_get_delayed
Not used any more.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu: Wrap dev_err() calls on vm faults with printk_ratelimit()
It can be the case that upon GPU page faults we start trashing
the logs, and so let us ratelimit here to avoid that.
V2. Fix issue where calling dev_err_ratelimited separately for
each line means that some lines corresponding to a single
VM fault may or may not appear depending on the rate.
- Michel Dänzer.
Reviewed-by: Christian König <christian.koenig@amd.com> (v1) Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu: Use dev_err() over vanilla printk() in vm_decode_fault()
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 14 Nov 2016 18:55:17 +0000 (13:55 -0500)]
drm/amd/amdgpu: port of DCE v6 to new headers (v3)
Port of SI DCE v6 over to new AMDGPU headers. Tested on a
Tahiti with GNOME through various hot plugs/rotations/sizes/fullscreen/windowed and
staging drm/xf86-video-amdgpu.
(v2) Re-factored to remove formatting changes to si_enums.h
as well rename various defines.
(v3) Rebase on upstream
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 14 Nov 2016 12:44:34 +0000 (20:44 +0800)]
drm/amdgpu: cleanup unused iterator members for sdma v2.4
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 14 Nov 2016 12:43:45 +0000 (20:43 +0800)]
drm/amdgpu: cleanup unused iterator members for sdma v3
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tesselation picture vm fault disappeared after vgt-flush
introduced.
v2:implement vgt-flush for CI & SI.
v3:move vgt flush inside of cntx_cntrl
v4:count vgt flush in frame_size
v5:squash in typo fix
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 14 Nov 2016 18:12:27 +0000 (13:12 -0500)]
drm/amdgpu/sdma: fix typo in packet setup
Use the correct define. No functional change as both
defines are equivalent.
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 8 Nov 2016 16:55:42 +0000 (11:55 -0500)]
drm/amd/amdgpu: Port GMC v6 driver to new SI headers (v2)
Port the GMC v6 driver over to the new SI headers.
Tested with a Tahiti SI ASIC.
(v2) Fixed a couple of typos (in commented code) and moved
defines to si_enums.h
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 4 Nov 2016 10:34:07 +0000 (11:34 +0100)]
drm/amdgpu: remove extra placement for AMDGPU_GEM_CREATE_NO_CPU_ACCESS
This only has the effect of scanning the invisible range twice
since the topdown flag is given anyway.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: JimQu <Jim.Qu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 4 Nov 2016 09:12:38 +0000 (10:12 +0100)]
drm/amdgpu: disable the VRAM manager on special placements v2
This disables the VRAM manager when a special placement is requested, otherwise
we play ping/pong with the buffers on every command submission.
v2: only check lpfn
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: JimQu <Jim.Qu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 8 Nov 2016 12:43:50 +0000 (20:43 +0800)]
drm/amdgpu: refine uvd 5.0 clock gate feature.
1. fix uvd cg status not correct.
2. fix uvd pg can't work on tonga.
3. enable uvd mgcg.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 7 Nov 2016 19:07:59 +0000 (14:07 -0500)]
drm/amd/amdgpu: add wave reader to gfx v6
Add support for the debugfs wave reader.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 7 Nov 2016 19:07:47 +0000 (14:07 -0500)]
drm/amd/amdgpu: port gfx6 over to new si headers (v2)
This changes the gfx v6 driver to use the new AMDGPU style
SI headers. Also fixes a variety of coding style issues, white
space issues, and uses WREG32_FIELD in a few places where
appropriate.
Tested with a Tahiti 0x679A.
v2: Squash in typo fix patch
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 7 Nov 2016 19:06:01 +0000 (14:06 -0500)]
drm/amd/amdgpu: add SI defines/registers
Add missing gca MMIO registers and defines necessary for the
next patch which re-works a lot of gfx v6 to use the new SI
headers.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 26 Oct 2016 15:58:25 +0000 (11:58 -0400)]
drm/amd/amdgpu: Introduction of SI registers (v2)
This introduces the SI registers in the amdgpu
driver style.
v2: squash duplicates fix
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Replace direct comparisons to NULL i.e.
'x == NULL' with '!x'. As per coding standard.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ravikant B Sharma <ravikant.s2@samsung.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 7 Nov 2016 15:33:47 +0000 (10:33 -0500)]
drm/amd/amdgpu: Clean up wave gfx8 helper
De-numberify indirect register access for gfx v8.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 7 Nov 2016 15:32:50 +0000 (10:32 -0500)]
drm/amd/amdgpu: Clean up wave gfx7 helper
De-numberify indirect register access for gfx v7.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Trigger Huang [Tue, 11 Oct 2016 05:21:11 +0000 (13:21 +0800)]
drm/amd/powerplay:Tonga not to start SMC if SRIOV
This patch is used for virtualization support. In virtualization case,
Tonga SMC should not be started and SMU firmware should not be loaded
if in SRIOV environment. The same operation will be applied on FIJI in
other patch.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This patch is used for virtualization support. In virtualization case,
the initialization sequences are not totally the same as
non-Virtualization's. The avfs event manager should be bypassed if in
SRIOV virtualization case. At the same, this patch will also bypass
starting SMC within SRIOV in FIJI, so the SMU firmware loading will be
avoid, which is required in SRIOV.
Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Trigger Huang [Wed, 2 Nov 2016 09:43:44 +0000 (05:43 -0400)]
drm/amdgpu:no gpu scheduler for KIQ
KIQ is used for interaction between driver and
CP, and not exposed to outside client, as such it
doesn't need to be handled by GPU scheduler.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 31 Oct 2016 09:00:21 +0000 (17:00 +0800)]
drm/amdgpu: remove amdgpu_cs_handle_lockup
In fence waiting, it never return -EDEADLK yet, so drop this function
here.
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sun, 30 Oct 2016 15:05:47 +0000 (23:05 +0800)]
drm/amdgpu: cleanup amdgpu_cs_ioctl to make code logicality clear
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Fri, 11 Nov 2016 00:03:15 +0000 (10:03 +1000)]
Merge tag 'zxdrm-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into drm-next
ZTE zxdrm driver support for 4.10:
This is the initial ZTE VOU display controller DRM/KMS driver. There
are still some features to be added, like overlay plane, scaling, and
more output devices support. But it's already useful with dual CRTCs
and HDMI display working.
[airlied: use drm_format_plane_cpp instead of legacy api]
* tag 'zxdrm-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
MAINTAINERS: add an entry for ZTE ZX DRM driver
drm: zte: add initial vou drm driver
dt-bindings: add bindings doc for ZTE VOU display controller
Dave Airlie [Fri, 11 Nov 2016 00:00:58 +0000 (10:00 +1000)]
Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-next
Here is the list of fixes that I have for drm/mali-dp. They've been on the mailing
lists for a while and merged into linux-next for a few weeks, but due to holiday and
travel to Linux Plumbers I did not send the pull request earlier. I don't know if
these patches can be pulled into v4.9 still (they will conflict with Ville Syrjälä's
cleanup of DRM_ROTATE series that is already in drm-next), but if you do that would
be great.
* 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld:
drm: mali-dp: Clear CVAL when leaving config mode
drm/arm: mark symbols static where possible
drm: mali-dp: Add support for setting plane's rotation property from userspace.
drm: mali-dp: Don't set DRM_PLANE_COMMIT_ACTIVE_ONLY
drm: mali-dp: Store internal format and n_planes in plane state
drm: mali-dp: Enable alpha blending
drm: mali-dp: Refactor plane initialisation
arm: mali-dp: Extract mode_config cleanup into malidp_fini
drm: mali-dp: Add pitch alignment check for planes
drm: mali-dp: Add pitch alignment check function
drm: mali-dp: Set the drm->irq_enabled flag to match driver's state.
drm: mali-dp: Clear the config_valid flag before using it in wait_event.
Dave Airlie [Thu, 10 Nov 2016 23:57:54 +0000 (09:57 +1000)]
Merge tag 'dw-hdmi-next-2016-09-19' of git://git.pengutronix.de/git/pza/linux into drm-next
dw-hdmi i2c master controller
- add support for the HDMI I2C master controller, for boards that
can have their DDC pins connected only to the HDMI TX directly.
* tag 'dw-hdmi-next-2016-09-19' of git://git.pengutronix.de/git/pza/linux:
drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support
drm: dw_hdmi: use of_get_i2c_adapter_by_node interface
Dave Airlie [Thu, 10 Nov 2016 23:31:27 +0000 (09:31 +1000)]
Merge tag 'imx-drm-next-2016-11-10' of git://git.pengutronix.de/git/pza/linux into drm-next
imx-drm plane update cleanup, YUV formats
- request modeset if plane offsets changed, only the plane base
address can be changed without disabling the plane IDMAC channel.
- cleanup of plane atomic_update
- remove unused ipu_cpmem_set_yuv_planar function
- support YUV 4:4:4, 4:2:2, NV12 and NV16 plane formats
- not only mask interrupts during irq init, also clear them
- remove a legacy check from imx-ldb
- add support to set the CSI downsizing bits
- silence an obnoxious warning during modeset
* tag 'imx-drm-next-2016-11-10' of git://git.pengutronix.de/git/pza/linux:
gpu: ipu-di: silence videomode logspam
gpu: ipu-v3: add ipu_csi_set_downsize
drm/imx: imx-ldb: remove unnecessary double disable check
gpu: ipu-v3: initially clear all interrupts
drm/imx: ipuv3-plane: add support for YUV 4:2:2 and 4:4:4, NV12, and NV16 formats
gpu: ipu-v3: add YUV 4:4:4 support
gpu: ipu-cpmem: remove unused ipu_cpmem_set_yuv_planar function
drm/imx: ipuv3-plane: let drm_plane_state_to_ubo/vbo handle chroma subsampling other than 4:2:0
drm/imx: ipuv3-plane: merge ipu_plane_atomic_set_base into atomic_update
drm/imx: ipuv3-plane: request modeset if plane offsets changed
Dave Airlie [Thu, 10 Nov 2016 23:28:44 +0000 (09:28 +1000)]
Merge tag 'topic/drm-misc-2016-11-10' of git://anongit.freedesktop.org/drm-intel into drm-next
- better atomic state debugging from Rob
- fence prep from gustavo
- sumits flushed out his backlog of pending dma-buf/fence patches from
various people
- drm_mm leak debugging plus trying to appease Kconfig (Chris)
- a few misc things all over
* tag 'topic/drm-misc-2016-11-10' of git://anongit.freedesktop.org/drm-intel: (35 commits)
drm: Make DRM_DEBUG_MM depend on STACKTRACE_SUPPORT
drm/i915: Restrict DRM_DEBUG_MM automatic selection
drm: Restrict stackdepot usage to builtin drm.ko
drm/msm: module param to dump state on error irq
drm/msm/mdp5: add atomic_print_state support
drm/atomic: add debugfs file to dump out atomic state
drm/atomic: add new drm_debug bit to dump atomic state
drm: add helpers to go from plane state to drm_rect
drm: add helper for printing to log or seq_file
drm: helper macros to print composite types
reservation: revert "wait only with non-zero timeout specified (v3)" v2
drm/ttm: fix ttm_bo_wait
dma-buf/fence: revert "don't wait when specified timeout is zero" (v2)
dma-buf/fence: make timeout handling in fence_default_wait consistent (v2)
drm/amdgpu: add the interface of waiting multiple fences (v4)
dma-buf: return index of the first signaled fence (v2)
MAINTAINERS: update Sync File Framework files
dma-buf/sw_sync: put fence reference from the fence creation
dma-buf/sw_sync: mark sync_timeline_create() static
drm: Add stackdepot include for DRM_DEBUG_MM
...
Dave Airlie [Thu, 10 Nov 2016 23:25:32 +0000 (09:25 +1000)]
Merge tag 'drm-intel-next-2016-11-08' of git://anongit.freedesktop.org/git/drm-intel into drm-next
- gpu idling rework for s/r (Imre)
- vlv mappable scanout fix
- speed up probing in resume (Lyude)
- dp audio workarounds for gen9 (Dhinakaran)
- more conversion to using dev_priv internally (Ville)
- more gen9+ wm fixes and cleanups (Maarten)
- shrinker cleanup&fixes (Chris)
- reorg plane init code (Ville)
- implement support for multiple timelines (prep work for scheduler)
from Chris and all
- untangle dev->struct_mutex locking as prep for multiple timelines
(Chris)
- refactor bxt phy code and collect it all in intel_dpio_phy.c (Ander)
- another gvt with bugfixes all over from Zhenyu
- piles of lspcon fixes from Imre
- 90/270 rotation fixes (Ville)
- guc log buffer support (Akash+Sagar)
- fbc fixes from Paulo
- untangle rpm vs. tiling-fences/mmaps (Chris)
- fix atomic commit to wait on the right fences (Daniel Stone)
* tag 'drm-intel-next-2016-11-08' of git://anongit.freedesktop.org/git/drm-intel: (181 commits)
drm/i915: Update DRIVER_DATE to 20161108
drm/i915: Mark CPU cache as dirty when used for rendering
drm/i915: Add assert for no pending GPU requests during suspend/resume in LR mode
drm/i915: Make sure engines are idle during GPU idling in LR mode
drm/i915: Avoid early GPU idling due to race with new request
drm/i915: Avoid early GPU idling due to already pending idle work
drm/i915: Limit Valleyview and earlier to only using mappable scanout
drm/i915: Round tile chunks up for constructing partial VMAs
drm/i915: Remove the vma from the object list upon close
drm/i915: Reinit polling before hpd when resuming
drm/i915: Remove redundant reprobe in i915_drm_resume
drm/i915/dp: Extend BDW DP audio workaround to GEN9 platforms
drm/i915/dp: BDW cdclk fix for DP audio
drm/i915: Fix pages pin counting around swizzle quirk
drm/i915: Fix test on inputs for vma_compare()
drm/i915/guc: Cache the client mapping
drm/i915: Tidy slab cache allocations
drm/i915: Introduce HAS_64BIT_RELOC
drm/i915: Show the execlist queue in debugfs/i915_engine_info
drm/i915: Unify global_list into global_link
...
Chris Wilson [Wed, 9 Nov 2016 14:39:06 +0000 (14:39 +0000)]
drm: Make DRM_DEBUG_MM depend on STACKTRACE_SUPPORT
0day continues to complain about trying to save a stacktrace for the
users of the drm_mm range allocator. This time, it is that m68k has no
save_stack_trace(), which is apparently guarded by STACKTRACE_SUPPORT.
Make it depend so!
Lucas Stach [Tue, 8 Nov 2016 15:57:55 +0000 (16:57 +0100)]
gpu: ipu-di: silence videomode logspam
Adapting the videomode to the hardware constraints is something that
can and must happen during normal operation and isn't something that
the user can avoid. So printing a warning each time it happens isn't
helpful.
Demote this message to the debug level.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Chris Wilson [Tue, 8 Nov 2016 13:19:17 +0000 (13:19 +0000)]
drm: Restrict stackdepot usage to builtin drm.ko
I misread the kbuild result thinking that we had missed the include
(which we had for completeness anyway), what kbuild was actually warning
me about was that depot_save_stack was not exported.
Temporarily fix this by only selecting STACKDEPOT iff drm.ko is builtin
Rob Clark [Sat, 5 Nov 2016 15:08:09 +0000 (11:08 -0400)]
drm/atomic: add new drm_debug bit to dump atomic state
The contents of drm_{plane,crtc,connector}_state is dumped before
commit. If a driver extends any of the state structs, it can implement
the corresponding funcs->atomic_print_state() to add it's own driver
specific state.
Signed-off-by: Rob Clark <robdclark@gmail.com>
[seanpaul resolved conflict in drm_plane.h] Signed-off-by: Sean Paul <seanpaul@chromium.org>
Rob Clark [Sat, 5 Nov 2016 15:08:08 +0000 (11:08 -0400)]
drm: add helpers to go from plane state to drm_rect
Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Sean Paul <seanpaul@chromium.org>
[seanpaul resolved conflict in drm_plane.h] Signed-off-by: Sean Paul <seanpaul@chromium.org>
Christian König [Mon, 7 Nov 2016 21:16:15 +0000 (16:16 -0500)]
drm/ttm: fix ttm_bo_wait
reservation_object_wait_timeout_rcu() should enable signaling even with a
zero timeout, but ttm_bo_wait() can also be called from atomic context and
then it is not a good idea to do this.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
[sumits: fix checkpatch warnings] Link: http://patchwork.freedesktop.org/patch/msgid/1478553376-18575-3-git-send-email-alexander.deucher@amd.com
Alex Deucher [Mon, 7 Nov 2016 21:16:14 +0000 (16:16 -0500)]
dma-buf/fence: revert "don't wait when specified timeout is zero" (v2)
Reverts commit 847b19a39e4c
("dma-buf/fence: don't wait when specified timeout is zero")
When we don't call the wait function software signaling might never be
activated. This can cause infinite polling loops with unreliable interrupt
driven hardware.
v2: rebase on drm-next
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
[sumits: reword commit msg for checkpatch warnings] Link: http://patchwork.freedesktop.org/patch/msgid/1478553376-18575-2-git-send-email-alexander.deucher@amd.com
Junwei Zhang [Fri, 4 Nov 2016 20:16:10 +0000 (16:16 -0400)]
drm/amdgpu: add the interface of waiting multiple fences (v4)
v2: agd: rebase and squash in all the previous optimizations and
changes so everything compiles.
v3: squash in Slava's 32bit build fix
v4: rebase on drm-next (fence -> dma_fence),
squash in Monk's ioctl update patch
Gustavo Padovan [Wed, 26 Oct 2016 20:59:59 +0000 (18:59 -0200)]
dma-buf/sw_sync: put fence reference from the fence creation
Once sw_sync_ioctl_create_fence() returns we no longer have the
*pt pointer to the fence base object thus we need to put the reference
we have from the fence creation to keep a correct reference accounting.
dma-buf/sw_sync: mark sync_timeline_create() static
We get 1 warning when building kernel with W=1:
drivers/dma-buf/sw_sync.c:87:23: warning: no previous prototype for 'sync_timeline_create' [-Wmissing-prototypes]
In fact, this function is only used in the file in which it is
declared and don't need a declaration, but can be made static.
So this patch marks it 'static'.
Chris Wilson [Tue, 8 Nov 2016 11:56:01 +0000 (11:56 +0000)]
drm: Add stackdepot include for DRM_DEBUG_MM
0day found that stackdepot.h doesn't get automatically included on all
architectures, so remember to add our #include.
Reported-by: kbuild test robot <fengguang.wu@intel.com> Fixes: 5705670d0463 ("drm: Track drm_mm allocators and show leaks on shutdown") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Christian König <christian.koenig@amd.com>. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161108115601.22873-1-chris@chris-wilson.co.uk
Brian Starkey [Tue, 8 Nov 2016 11:36:14 +0000 (11:36 +0000)]
drm: mali-dp: Clear CVAL when leaving config mode
It's possible for CVAL to get set whilst we are in config mode. If this
happens, afer we leave config mode the HW will latch whatever
configuration is in the registers at the next vsync. Most likely this
will be a partial configuration, as we'll be racing against the ongoing
atomic_commit.
To avoid this, clear CVAL before leaving config mode.
Signed-off-by: Brian Starkey <brian.starkey@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Gustavo Padovan [Mon, 7 Nov 2016 10:03:30 +0000 (19:03 +0900)]
drm/atomic: add drm_atomic_set_fence_for_plane()
This new function should be used by drivers when setting a implicit
fence for the plane. It abstracts the fact that the user might have
chosen explicit fencing instead.
Rob Clark [Sat, 5 Nov 2016 14:52:01 +0000 (10:52 -0400)]
drm: don't override possible_crtcs for primary/cursor planes
It is kind of a pointless restriction. If userspace does silly things
like using crtcA's cursor plane on crtcB, and then setcursor on crtcA,
it will end up with the overlay disabled on crtcB. But userspace is
allowed to shoot itself like this.
v2: don't WARN_ON() if caller did not set ->possible_crtcs. This keeps
the existing behavior by default, if caller does not set the
->possible_crtcs.
Ville Syrjälä [Thu, 3 Nov 2016 14:10:01 +0000 (16:10 +0200)]
drm/uapi: Add a warning that mode flags must match the xrandr definitions
Existing userspace expected the mode flags to match the xrandr
definitions 1:1, and even adding new flags in he previously unused
bits is likely to break existing userspace. Add a comment warning
people about this potential trap.
Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: "Lin, Jia" <lin.a.jia@intel.com> Cc: Akashdeep Sharma <akashdeep.sharma@intel.com> Cc: Jim Bride <jim.bride@linux.intel.com> Cc: Jose Abreu <Jose.Abreu@synopsys.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1478182201-26086-1-git-send-email-ville.syrjala@linux.intel.com
Chris Wilson [Sat, 29 Oct 2016 18:42:14 +0000 (19:42 +0100)]
drm/i915: Enable drm_mm debug when enabling DRM_I915_DEBUG
A frequent issue that arises on shutdown is the drm_mm range manager
complaining of a leak. To aide debugging those, drm can now track the
allocation callsite and print those for the leaks.
Chris Wilson [Mon, 31 Oct 2016 09:08:06 +0000 (09:08 +0000)]
drm: Track drm_mm allocators and show leaks on shutdown
We can use the kernel's stack tracer and depot to record the allocation
site of every drm_mm user. Then on shutdown, as well as warning that
allocated nodes still reside with the drm_mm range manager, we can
display who allocated them to aide tracking down the leak.
v2: Move Kconfig around so it lies underneath the DRM options submenu.
Chris Wilson [Mon, 7 Nov 2016 16:52:04 +0000 (16:52 +0000)]
drm/i915: Mark CPU cache as dirty when used for rendering
On LLC, or even snooped, machines rendering via the GPU ends up in the CPU
cache. This cacheline dirt also needs to be flushed to main memory when
moving to an incoherent domain, such as the display's scanout engine.
Mostly, this happens because either the object is marked as dirty from
its first use or is avoided by setting the object into the display
domain from the start.
v2: Treat WT as not requiring a clflush prior to use on the display
engine as well.
Fixes: 0f71979ab7fb ("drm/i915: Performed deferred clflush inside set-cache-level")
References: https://bugs.freedesktop.org/show_bug.cgi?id=95414 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: <stable@vger.kernel.org> # v4.0+ Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161107165204.7008-1-chris@chris-wilson.co.uk
Imre Deak [Mon, 7 Nov 2016 09:20:05 +0000 (11:20 +0200)]
drm/i915: Add assert for no pending GPU requests during suspend/resume in LR mode
During resume we will reset the SW/HW tracking for each ring head/tail
pointers and so are not prepared to replay any pending requests (as
opposed to GPU reset time). Add an assert for this both to the suspend
and the resume code.
v2:
- Check for ELSP port idle already during suspend and check !gt.awake
during resume. (Chris)
v3:
- Move the !gt.awake check to i915_gem_resume().
v4:
- s/intel_lr_engines_idle/intel_execlists_idle/ (Chris)
Imre Deak [Mon, 7 Nov 2016 09:20:04 +0000 (11:20 +0200)]
drm/i915: Make sure engines are idle during GPU idling in LR mode
We assume that the GPU is idle once receiving the seqno via the last
request's user interrupt. In execlist mode the corresponding context
completed interrupt can be delayed though and until this latter
interrupt arrives we consider the request to be pending on the ELSP
submit port. This can cause a problem during system suspend where this
last request will be seen by the resume code as still pending. Such
pending requests are normally replayed after a GPU reset, but during
resume we reset both SW and HW tracking of the ring head/tail pointers,
so replaying the pending request with its stale tail pointer will leave
the ring in an inconsistent state. A subsequent request submission can
lead then to the GPU executing from uninitialized area in the ring
behind the above stale tail pointer.
Fix this by making sure any pending request on the ELSP port is
completed before suspending. I used a polling wait since the completion
time I measured was <1ms and since normally we only need to wait during
system suspend. GPU idling during runtime suspend is scheduled with a
delay (currently 50-100ms) after the retirement of the last request at
which point the context completed interrupt must have arrived already.
drm/i915/hsw: Fix GPU hang during resume from S3-devices state
but it could happen even without the explicit GPU reset, since we
disable interrupts afterwards during the suspend sequence.
v2:
- Do an unlocked poll-wait first. (Chris)
v3-4:
- s/intel_lr_engines_idle/intel_execlists_idle/ and move
i915.enable_execlists check to the new helper. (Chris)