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10 years agoENGR00285273-3 IPU dev:Remove unnecessary memset before kfree
Liu Ying [Tue, 29 Oct 2013 04:31:36 +0000 (12:31 +0800)]
ENGR00285273-3 IPU dev:Remove unnecessary memset before kfree

This patch removes unnecessary memset() before kfree().
Also, it fixes a potential NULL pointer dereference(writing
to a freed block of memory).

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
10 years agoENGR00285273-2 IPU dev:Remove an unnesessary check
Liu Ying [Tue, 29 Oct 2013 04:28:52 +0000 (12:28 +0800)]
ENGR00285273-2 IPU dev:Remove an unnesessary check

This patch removes an unnesessary check before setting
task ID to simplify the code.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
10 years agoENGR00285273-1 IPU dev:Correct timeout setting from users
Liu Ying [Tue, 29 Oct 2013 03:26:40 +0000 (11:26 +0800)]
ENGR00285273-1 IPU dev:Correct timeout setting from users

This patch corrects the logic to set timeout value specified
by the users.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
10 years agoENGR00284981-2 arm: dts: imx6qdl: correct caam clock index
Anson Huang [Fri, 25 Oct 2013 20:45:00 +0000 (16:45 -0400)]
ENGR00284981-2 arm: dts: imx6qdl: correct caam clock index

Correct caam module clocks index according to clock tree.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00284981-1 arm: imx: add clock nodes for caam
Anson Huang [Fri, 25 Oct 2013 20:42:37 +0000 (16:42 -0400)]
ENGR00284981-1 arm: imx: add clock nodes for caam

Add caam clock gate nodes into clock tree, so that caam
driver can manage its clock gate to save power.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00284023 [iMX6DL/iMX6SL]Align VDDARM and VDDSOC voltages to latest datasheet
Ranjani Vaidyanathan [Wed, 16 Oct 2013 21:54:21 +0000 (16:54 -0500)]
ENGR00284023 [iMX6DL/iMX6SL]Align VDDARM and VDDSOC voltages to latest datasheet

Add 25mV PMIC tolerence to the voltages.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
10 years agoENGR00284649 ARM: Documentation: Add MLB dts binding doc
Luwei Zhou [Wed, 23 Oct 2013 02:22:33 +0000 (10:22 +0800)]
ENGR00284649 ARM: Documentation: Add MLB dts binding doc

This patch add MLB devicetree binding doc.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agoENGR00284648 mxc: mlb: clean up the MLB driver code.
Luwei Zhou [Tue, 22 Oct 2013 08:20:31 +0000 (16:20 +0800)]
ENGR00284648 mxc: mlb: clean up the MLB driver code.

This patch clean up the MLB driver code of i.MX6Q/DL AUTO.

* Reorder the head file alphabetically
* Fix code comments format
* Fix the lines over 80 characters
* Fix the return type to void for some private functions

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agoENGR00283079-1 ASoC: fsl: Implement different DMA buffer sizes
Nicolin Chen [Thu, 17 Oct 2013 10:24:29 +0000 (18:24 +0800)]
ENGR00283079-1 ASoC: fsl: Implement different DMA buffer sizes

Each CPU DAI driver has its own defined DMA buffer size, so this patch just
drops the original one that uses a fixed size for all drivers and implements
a different DMA buffer size to each driver.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
10 years agoALSA: Add SoC on-chip internal ram support for DMA buffer allocation
Nicolin Chen [Wed, 23 Oct 2013 03:47:43 +0000 (11:47 +0800)]
ALSA: Add SoC on-chip internal ram support for DMA buffer allocation

Now it's quite common that an SoC contains its on-chip internal RAM.
By using this RAM space for DMA buffer during audio playback/record,
we can shutdown the voltage for external RAM to save power.

So add new DEV type with iram malloc()/free() and accordingly modify
current default mmap() for the iram circumstance.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
10 years agodriver core: bus_type: add dev_groups
Greg Kroah-Hartman [Thu, 8 Aug 2013 22:22:55 +0000 (15:22 -0700)]
driver core: bus_type: add dev_groups

attribute groups are much more flexible than just a list of attributes,
due to their support for visibility of the attributes, and binary
attributes. Add dev_groups to struct bus_type which should be used
instead of dev_attrs.

dev_attrs will be removed from the structure soon.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agosysfs.h: add ATTRIBUTE_GROUPS() macro
Greg Kroah-Hartman [Sun, 14 Jul 2013 23:05:52 +0000 (16:05 -0700)]
sysfs.h: add ATTRIBUTE_GROUPS() macro

To make it easier for driver subsystems to work with attribute groups,
create the ATTRIBUTE_GROUPS macro to remove some of the repetitive
typing for the most common use for attribute groups.

Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agodriver core: device.h: add RW and RO attribute macros
Greg Kroah-Hartman [Sun, 14 Jul 2013 23:05:54 +0000 (16:05 -0700)]
driver core: device.h: add RW and RO attribute macros

Make it easier to create attributes without having to always audit the
mode settings.

Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: spi-imx: only enable the clocks when we start to transfer a message
Huang Shijie [Wed, 23 Oct 2013 08:05:42 +0000 (16:05 +0800)]
spi: spi-imx: only enable the clocks when we start to transfer a message

Current code keeps the clocks enabled all the time, it wastes the power
when there is no operaiton on the spi controller.

In order to save the power, this patch adds the two hooks:
   spi_imx_prepare_message: enable the clocks for this message
   spi_imx_unprepare_message: disable the clocks.

This patch also disables the clocks in the end of the probe.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
10 years agospi: Fix checkpatch issue
Jingoo Han [Mon, 14 Oct 2013 01:31:51 +0000 (10:31 +0900)]
spi: Fix checkpatch issue

Fix the following checkpatch error and warnings.

  ERROR: space required after that ',' (ctx:VxV)
  WARNING: quoted string split across lines
  WARNING: max() should probably be max_t(int, nb, master->num_chipselect)
  WARNING: sizeof *spi should be sizeof(*spi)
  WARNING: sizeof *master should be sizeof(*master)
  WARNING: sizeof x should be sizeof(x)

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: Provide common spi_message processing loop
Mark Brown [Sat, 5 Oct 2013 10:50:40 +0000 (11:50 +0100)]
spi: Provide common spi_message processing loop

The loops which SPI controller drivers use to process the list of transfers
in a spi_message are typically very similar and have some error prone areas
such as the handling of /CS. Help simplify drivers by factoring this code
out into the core - if drivers provide a transfer_one() function instead
of a transfer_one_message() function the core will handle processing at the
message level.

/CS can be controlled by either setting cs_gpio or providing a set_cs
function. If this is not possible for hardware reasons then both can be
omitted and the driver should continue to implement manual /CS handling.

This is a first step in refactoring and it is expected that there will be
further enhancements, for example factoring out of the mapping of transfers
for DMA and the initiation and completion of interrupt driven transfers.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi/trace: Trace length of SPI messages on completion
Mark Brown [Mon, 7 Oct 2013 22:36:56 +0000 (23:36 +0100)]
spi/trace: Trace length of SPI messages on completion

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: Provide per-message prepare and unprepare operations
Mark Brown [Fri, 4 Oct 2013 23:23:12 +0000 (00:23 +0100)]
spi: Provide per-message prepare and unprepare operations

Many SPI drivers perform setup and tear down on every message, usually
doing things like DMA mapping the message. Provide hooks for them to use
to provide such operations.

This is of limited value for drivers that implement transfer_one_message()
but will be of much greater utility with future factoring out of standard
implementations of that function.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: attach/detach SPI device to the ACPI power domain
Mika Westerberg [Thu, 10 Oct 2013 10:28:48 +0000 (13:28 +0300)]
spi: attach/detach SPI device to the ACPI power domain

If the SPI device is enumerated from ACPI namespace (it has an ACPI handle)
it might have ACPI methods that needs to be called in order to transition
the device to different power states (such as _PSx).

We follow what has been done for platform and I2C buses here and attach the
SPI device to the ACPI power domain if the device has an ACPI handle. This
makes sure that the device is powered on when its ->probe() is called.

For non-ACPI devices this patch is a no-op.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: Fix modalias for ACPI enumerated SPI devices
Jarkko Nikula [Thu, 10 Oct 2013 14:19:17 +0000 (17:19 +0300)]
spi: Fix modalias for ACPI enumerated SPI devices

There is a minor fault about ACPI enumerated SPI devices with their modalias
attribute. Now modalias is set by device instance not by hardware ID.
For example "spi:INTABCD:00", "spi:INTABCD:01" etc.

This means each device instance gets different modalias which does match
with generated modules.alias. Currently this is not problem as matching can
happen also with "acpi:INTABCD" modalias.

Fix this by using ACPI hardware ID.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: convert bus code to use dev_groups
Greg Kroah-Hartman [Tue, 8 Oct 2013 01:27:38 +0000 (18:27 -0700)]
spi: convert bus code to use dev_groups

The dev_attrs field of struct bus_type is going away soon, dev_groups
should be used instead.  This converts the spi bus code to use the
correct field.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: Provide trace points for message processing
Mark Brown [Mon, 7 Oct 2013 18:33:53 +0000 (19:33 +0100)]
spi: Provide trace points for message processing

Provide tracepoints for the lifecycle of a message from submission to
completion and for the active time for masters to help with performance
analysis of SPI I/O.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: Use of_property_read_u32
Trent Piepho [Fri, 27 Sep 2013 12:37:25 +0000 (05:37 -0700)]
spi: Use of_property_read_u32

Instead of getting the raw property, checking the length, and doing
endian conversion each time, use the OF function
of_property_read_u32() that does all that.

Error messages are slightly improved with error codes from
of_property_read_u32() for different ways the property may be invalid
(missing, too short, etc.)

Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: simplify call to request_module()
Mathias Krause [Sat, 31 Aug 2013 18:24:14 +0000 (20:24 +0200)]
spi: simplify call to request_module()

request_module() can handle format strings on its own, no need to create
the full module name ourself.

Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: core: Add devm_spi_register_master()
Mark Brown [Sat, 31 Aug 2013 17:50:52 +0000 (18:50 +0100)]
spi: core: Add devm_spi_register_master()

Help simplify the cleanup code for SPI master drivers by providing a
managed master registration function, ensuring that the master is
automatically unregistered whenever the device is unbound.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: quad: fix the name of DT property
wangyuhang [Sun, 1 Sep 2013 09:36:21 +0000 (17:36 +0800)]
spi: quad: fix the name of DT property

spi: quad: fix the name of DT property in patch

The previous property name spi-tx-nbits and spi-rx-nbits looks not
human-readable. To make it consistent with other devices, using property
name spi-tx-bus-width and spi-rx-bus-width instead of the previous one
specify the number of data wires that spi controller will work in.
Add the specification in spi-bus.txt.

Signed-off-by: wangyuhang <wangyuhang2014@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: core: Fix spi_register_master error handling
Axel Lin [Sat, 31 Aug 2013 12:25:52 +0000 (20:25 +0800)]
spi: core: Fix spi_register_master error handling

In the case spi_master_initialize_queue() fails, current code calls
device_unregister() before return error from spi_register_master().
However, all the drivers call spi_master_put() in the error path if
spi_register_master() fails. Thus we should call device_del() rather than
device_unregister() before return error from spi_register_master().

This also makes all the spi_register_master() error handling consistent,
because all other error paths of spi_register_master() expect drivers to
call spi_master_put() if spi_register_master() fails.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: quad: Make DT properties optional
Mark Brown [Fri, 30 Aug 2013 22:19:40 +0000 (23:19 +0100)]
spi: quad: Make DT properties optional

The addition SPI quad support made the DT properties mandatory, breaking
compatibility with existing systems. Fix that by making them optional,
also improving the error messages while we're at it.

Signed-off-by: Mark Brown <broonie@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: quad: Fix missing return
wangyuhang [Fri, 30 Aug 2013 10:05:10 +0000 (18:05 +0800)]
spi: quad: Fix missing return

Delete a "return" when commit the patch to a new kernel version
 by mistake. So recover it.

Signed-off-by: wangyuhang <wangyuhang2014@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: Remove a redundant test for master->running in spi_queued_transfer
Axel Lin [Thu, 22 Aug 2013 15:41:34 +0000 (23:41 +0800)]
spi: Remove a redundant test for master->running in spi_queued_transfer

We have tested master->running immediately after grab the master->queue_lock.
The status of master->running won't be changed until we release the lock.
Thus remove a redundant test for master->running.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: conditional checking of mode and transfer bits.
Sourav Poddar [Thu, 22 Aug 2013 15:50:48 +0000 (21:20 +0530)]
spi: conditional checking of mode and transfer bits.

There is a bug in the following patch:
http://comments.gmane.org/gmane.linux.kernel.spi.devel/14420

spi: DUAL and QUAD support

    fix the previous patch some mistake below:
    1. DT in slave node, use "spi-tx-nbits = <1/2/4>" in place of using
       "spi-tx-dual, spi-tx-quad" directly, same to rx. So correct the
       previous way to get the property in @of_register_spi_devices().
    2. Change the value of transfer bit macro(SPI_NBITS_SINGLE, SPI_NBITS_DUAL
       SPI_NBITS_QUAD) to 0x01, 0x02 and 0x04 to match the actual wires.
    3. Add the following check
       (1)keep the tx_nbits and rx_nbits in spi_transfer is not beyond the
          single, dual and quad.
       (2)keep tx_nbits and rx_nbits are contained by @spi_device->mode
          example: if @spi_device->mode = DUAL, then tx/rx_nbits can not be set
                   to QUAD(SPI_NBITS_QUAD)
       (3)if "@spi_device->mode & SPI_3WIRE", then tx/rx_nbits should be in
          single(SPI_NBITS_SINGLE)

Checking of the tx/rx transfer bits and mode bits should be done conditionally
based on type of buffer filled else EINVAL condition will
always get hit either for rx or tx.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: DUAL and QUAD support
wangyuhang [Sun, 11 Aug 2013 10:15:17 +0000 (18:15 +0800)]
spi: DUAL and QUAD support

fix the previous patch some mistake below:
1. DT in slave node, use "spi-tx-nbits = <1/2/4>" in place of using
   "spi-tx-dual, spi-tx-quad" directly, same to rx. So correct the
   previous way to get the property in @of_register_spi_devices().
2. Change the value of transfer bit macro(SPI_NBITS_SINGLE, SPI_NBITS_DUAL
   SPI_NBITS_QUAD) to 0x01, 0x02 and 0x04 to match the actual wires.
3. Add the following check
   (1)keep the tx_nbits and rx_nbits in spi_transfer is not beyond the
      single, dual and quad.
   (2)keep tx_nbits and rx_nbits are contained by @spi_device->mode
      example: if @spi_device->mode = DUAL, then tx/rx_nbits can not be set
               to QUAD(SPI_NBITS_QUAD)
   (3)if "@spi_device->mode & SPI_3WIRE", then tx/rx_nbits should be in
      single(SPI_NBITS_SINGLE)

Signed-off-by: wangyuhang <wangyuhang2014@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: limit default transfer speed to controller's max speed
Gabor Juhos [Wed, 14 Aug 2013 08:25:28 +0000 (10:25 +0200)]
spi: limit default transfer speed to controller's max speed

Since the 'spi: Support transfer speed checking in the core'
change, the SPI core validates the desired speed of a given
transfer against the minimum and maximum speeds supported by
the controller.

If the speed of a transfer is not specified, the core uses
the maximum speed of the actual SPI device. However if the
maximum speed of the actual device is greater than the
maximum speed of the controller, the core will reject the
transfer due to the aforementioned change.

Change the code to use the maximum speed of the controller
by default if that is below the device's maximum speed.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: More sanity checks for transfers
Mark Brown [Wed, 10 Jul 2013 14:05:40 +0000 (15:05 +0100)]
spi: More sanity checks for transfers

Check that transfers are non-empty and that there is a completion for
them.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: fix SPI_BIT_MASK so it always fits into 32-bits
Stephen Warren [Thu, 1 Aug 2013 22:08:57 +0000 (16:08 -0600)]
spi: fix SPI_BIT_MASK so it always fits into 32-bits

On a 64-bit platform, ~0UL fills 64-bits, which causes SPI_BIT_MASK(32)
not to fit into 32 bits. This causes a warning when the result is assigned
to a 32-bit variable. Use ~0U instead to prevent this. This fixes:

drivers/spi/spi-gpio.c: In function 'spi_gpio_probe':
drivers/spi/spi-gpio.c:446:2: warning: large integer implicitly truncated to unsigned type [-Woverflow]

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: Provide core support for runtime PM during transfers
Mark Brown [Sun, 28 Jul 2013 13:47:02 +0000 (14:47 +0100)]
spi: Provide core support for runtime PM during transfers

Most SPI drivers that implement runtime PM support use identical code to
do so: they acquire a runtime PM lock in prepare_transfer_hardware() and
then they release it in unprepare_transfer_hardware(). The variations in
this are mostly missing error checking and the choice to use autosuspend.

Since these runtime PM calls are normally the only thing in the prepare
and unprepare callbacks and the autosuspend API transparently does the
right thing on devices with autosuspend disabled factor all of this out
into the core with a flag to enable the behaviour.

Signed-off-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agodriver: spi: Modify core to compute the message length
Sourav Poddar [Thu, 18 Jul 2013 10:01:25 +0000 (15:31 +0530)]
driver: spi: Modify core to compute the message length

Make spi core calculate the message length while
populating the other transfer parameters.

Usecase, driver can use it to populate framelength filed in their
controller.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: Support transfer speed checking in the core
Mark Brown [Wed, 10 Jul 2013 13:57:26 +0000 (14:57 +0100)]
spi: Support transfer speed checking in the core

Allow drivers to avoid implementing their own checks for simple rates by
specifying the limits in the master structure.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: fix incorrect handling of min param in SPI_BPW_RANGE_MASK
Stephen Warren [Thu, 30 May 2013 15:59:40 +0000 (09:59 -0600)]
spi: fix incorrect handling of min param in SPI_BPW_RANGE_MASK

SPI_BPW_RANGE_MASK is intended to work by calculating two masks; one
representing support for all bits up-to-and-including the "max" supported
value, and one representing support for all bits up-to-but-not-including
the "min" supported value, and then taking the difference between the
two, resulting in a mask representing support for all bits between
(inclusive) the min and max values.

However, the second mask ended up representing all bits up-to-and-
including rather up-to-but-not-including. Fix this bug.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: fix undefined behaviour in SPI_BPW_RANGE_MASK
Stephen Warren [Thu, 30 May 2013 15:59:39 +0000 (09:59 -0600)]
spi: fix undefined behaviour in SPI_BPW_RANGE_MASK

The parameters to SPI_BPW_RANGE_MASK() are in the range 1..32. If 32 is
used as a parameter, part of the expression is "1 << 32". Since 32 is >=
the size of the type in use, such a shift is undefined behaviour. Add
macro SPI_BIT_MASK to Implement a special case and thus avoid undefined
behaviour. Use this new macro rather than BIT() when implementing
SPI_BPW_RANGE_MASK().

This fixes build warnings such as:
drivers/spi/spi-gpio.c:446:2: warning: left shift count >= width of type [enabled by default]

SPI_BPW_MASK() already avoids this, since its parameter is also in range
1..32, yet it only shifts by up to one less than the input parameter.

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: introduce macros to set bits_per_word_mask
Stephen Warren [Wed, 22 May 2013 02:36:34 +0000 (20:36 -0600)]
spi: introduce macros to set bits_per_word_mask

Introduce two macros to make setting up spi_master.bits_per_word_mask
easier, and avoid mistakes like writing BIT(n) instead of BIT(n - 1).

SPI_BPW_MASK is for a single supported value of bits_per_word_mask.

SPI_BPW_RANGE_MASK represents a contiguous set of bit lengths.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: bitbang: Fix checkpatch issue
Jingoo Han [Mon, 14 Oct 2013 01:33:38 +0000 (10:33 +0900)]
spi: bitbang: Fix checkpatch issue

Fix the following checkpatch warnings

  WARNING: sizeof *cs should be sizeof(*cs)
  WARNING: please, no space before tabs
  WARNING: space prohibited between function name and open parenthesis '('
  WARNING: line over 80 characters

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: bitbang: Let spi_bitbang_start() take a reference to master
Axel Lin [Tue, 10 Sep 2013 07:43:41 +0000 (15:43 +0800)]
spi: bitbang: Let spi_bitbang_start() take a reference to master

Many drivers that use bitbang library have a leak on probe error paths.
This is because once a spi_master_get() call succeeds, we need an additional
spi_master_put() call to free the memory.

Fix this issue by moving the code taking a reference to master to
spi_bitbang_start(), so spi_bitbang_start() will take a reference to master on
success. With this change, the caller is responsible for calling
spi_bitbang_stop() to decrement the reference and spi_master_put() as
counterpart of spi_alloc_master() to prevent a memory leak.

So now we have below patten for drivers using bitbang library:

probe:
spi_alloc_master        -> Init reference count to 1
spi_bitbang_start       -> Increment reference count
remove:
spi_bitbang_stop        -> Decrement reference count
spi_master_put          -> Decrement reference count (reference count reaches 0)

Fixup all users accordingly.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Suggested-by: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
Acked-by: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi/bitbang: trivial: fix doubled word "use"
Uwe Kleine-König [Wed, 7 Aug 2013 19:22:20 +0000 (21:22 +0200)]
spi/bitbang: trivial: fix doubled word "use"

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: bitbang: Remove unused tmp variable
Axel Lin [Thu, 15 Aug 2013 06:06:37 +0000 (14:06 +0800)]
spi: bitbang: Remove unused tmp variable

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi/bitbang: don't error out if there is no setup callback provided
Uwe Kleine-König [Thu, 8 Aug 2013 14:09:49 +0000 (16:09 +0200)]
spi/bitbang: don't error out if there is no setup callback provided

It's perfectly valid not to have a setup callback when the probe routine
does all the needed things. So don't even check for this case and trust
the caller.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: spi-bitbang: Fix conversion of spi_bitbang_transfer_one()
Fabio Estevam [Wed, 17 Jul 2013 18:49:54 +0000 (15:49 -0300)]
spi: spi-bitbang: Fix conversion of spi_bitbang_transfer_one()

Since commit 2025172e3 (spi/bitbang: Use core message pump), the following
kernel crash is seen:

Unable to handle kernel NULL pointer dereference at virtual address 0000000d
pgd = 80004000
[0000000d] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 1 PID: 48 Comm: spi32766 Not tainted 3.11.0-rc1+ #4
task: bfa3e580 ti: bfb90000 task.ti: bfb90000
PC is at spi_bitbang_transfer_one+0x50/0x248
LR is at spi_bitbang_transfer_one+0x20/0x248
...

,and also the following build warning:

drivers/spi/spi-bitbang.c: In function 'spi_bitbang_start':
drivers/spi/spi-bitbang.c:436:31: warning: assignment from incompatible pointer type [enabled by default]

In order to fix it, we need to change the first parameter of
spi_bitbang_transfer_one() to 'struct spi_master *master'.

Tested on a mx6qsabrelite by succesfully probing a SPI NOR flash.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi/bitbang: Use core message pump
Mark Brown [Fri, 5 Jul 2013 19:07:27 +0000 (20:07 +0100)]
spi/bitbang: Use core message pump

Convert drivers using bitbang to use the core mesasge pump infrastructure,
saving some code and meaning that these drivers get to take advantage of
work done on improving the core implementation.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi/bitbang: Factor out message transfer from message pump loop
Mark Brown [Fri, 5 Jul 2013 11:06:44 +0000 (12:06 +0100)]
spi/bitbang: Factor out message transfer from message pump loop

In order to make it easier to convert to transfer_one_message() lift the
code that does the actual message transfer out of the work function that
implements the message pump. This should have no functional impact, it's
just a simple code motion patch.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi/bitbang: Unexport spi_bitbang_transfer()
Mark Brown [Fri, 5 Jul 2013 10:44:49 +0000 (11:44 +0100)]
spi/bitbang: Unexport spi_bitbang_transfer()

Currently no drivers use the ability to override spi_bitbang_transfer()
and if any started this would make it harder to convert the bitbang code
to use transfer_one_message() so remove the export in order to prevent
anyone starting.

Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi/imx: expose module alias for loading from device-tree
Niels de Vos [Mon, 29 Jul 2013 07:38:05 +0000 (09:38 +0200)]
spi/imx: expose module alias for loading from device-tree

Enable auto loading by udev when spi-imx is compiled as a module.

Signed-off-by: Niels de Vos <ndevos@redhat.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: spi-imx: Check the return value from clk_prepare_enable()
Fabio Estevam [Thu, 11 Jul 2013 04:26:49 +0000 (01:26 -0300)]
spi: spi-imx: Check the return value from clk_prepare_enable()

clk_prepare_enable() may fail, so let's check its return value and propagate it
in the case of error.

While at it, fix the order of clk_disable_unprepare calls: clk_ipg should be
disabled first, followed by clk_per.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: spi-imx: Use devm functions
Fabio Estevam [Thu, 11 Jul 2013 04:26:48 +0000 (01:26 -0300)]
spi: spi-imx: Use devm functions

Using devm functions can make the code smaller and cleaner.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: spi-imx: Fix compilation error
Sachin Kamat [Thu, 30 May 2013 08:08:09 +0000 (13:38 +0530)]
spi: spi-imx: Fix compilation error

Fix compilation error due to a typo introduced by commit 24778be20f
("spi: convert drivers to use bits_per_word_mask"). Without this patch
we get the following build errors:

drivers/spi/spi-imx.c: In function â€˜spi_imx_setupxfer’:
drivers/spi/spi-imx.c:703:2: warning: no return statement in function returning non-void [-Wreturn-type]
drivers/spi/spi-imx.c: At top level:
drivers/spi/spi-imx.c:705:9: error: expected â€˜=’, â€˜,’, â€˜;’, â€˜asm’ or â€˜__attribute__’ before â€˜->’ token
drivers/spi/spi-imx.c:707:2: error: expected identifier or â€˜(’ before â€˜return’
drivers/spi/spi-imx.c:708:1: error: expected identifier or â€˜(’ before â€˜}’ token

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: convert drivers to use bits_per_word_mask
Stephen Warren [Wed, 22 May 2013 02:36:35 +0000 (20:36 -0600)]
spi: convert drivers to use bits_per_word_mask

Fill in the recently added spi_master.bits_per_word_mask field in as
many drivers as possible. Make related cleanups, such as removing any
redundant error-checking, or empty setup callbacks.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: spi-imx: Let device core handle pinctrl
Fabio Estevam [Mon, 6 May 2013 18:05:55 +0000 (15:05 -0300)]
spi: spi-imx: Let device core handle pinctrl

Since commit ab78029 (drivers/pinctrl: grab default handles from device core),
we can rely on device core for handling pinctrl.

So remove devm_pinctrl_get_select_default() from the driver.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agospi: remove unnecessary platform_set_drvdata()
Jingoo Han [Fri, 3 May 2013 07:27:12 +0000 (16:27 +0900)]
spi: remove unnecessary platform_set_drvdata()

The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agoENGR00284019: [iMX6SL] Add low power mode optimizations
Ranjani Vaidyanathan [Wed, 16 Oct 2013 19:06:50 +0000 (14:06 -0500)]
ENGR00284019: [iMX6SL] Add low power mode optimizations

Add optimizations so that the low power IDLE mode numbers match
between the 3.10.9 and 3.0.35 kernel.
Optimizations include:
1. Disable unused PLLs and PFDs in clock init
2. Some of the drivers call clk_prepare in probe and enable much
later. clk_pllv3_prepare locks the PLL disallowing some of the low
power optimizations. For iMX6SL ensure that clk_pllv3_prepare does
not lock the PLL.
3. Ensure that MMDC_CH0_LPM_HS is set when WAIT mode is entered.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
10 years agommc: sdhci: remove unneeded call when have preset value quirk
Dong Aisheng [Fri, 18 Oct 2013 11:48:50 +0000 (19:48 +0800)]
mmc: sdhci: remove unneeded call when have preset value quirk

Remove unneeded call of call sdhci_enable_preset_value when having
SDHCI_QUIRK2_PRESET_VALUE_BROKEN.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: add preset value quirk for mx6
Dong Aisheng [Mon, 21 Oct 2013 08:57:07 +0000 (16:57 +0800)]
mmc: sdhci-esdhc-imx: add preset value quirk for mx6

The i.MX6 does not support preset value feature.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: enable SDR50 tuning for imx6q/dl
Dong Aisheng [Fri, 18 Oct 2013 11:48:48 +0000 (19:48 +0800)]
mmc: sdhci-esdhc-imx: enable SDR50 tuning for imx6q/dl

The imx6q/dl supports SDR50 tunning, enable it for a better timing
on SDR50 mode.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: add delay line setting support
Dong Aisheng [Mon, 21 Oct 2013 08:54:40 +0000 (16:54 +0800)]
mmc: sdhci-esdhc-imx: add delay line setting support

The DLL(Delay Line) is newly added to assist in sampling read data.
The DLL provides the ability to programmatically select a quantized
delay (in fractions of the clock period) regardless of on-chip variations
such as process, voltage and temperature (PVT).

This patch adds a user interface to set slave delay line via device tree.
It's usually used in high speed mode like mmc DDR mode when the signal
quality is not good caused by board design, e.g. the signal path is too
long.  User can manually set delay line to find a suitable data sampling
window for card to work properly.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: add DDR mode support for mx6
Dong Aisheng [Mon, 21 Oct 2013 07:27:40 +0000 (15:27 +0800)]
mmc: sdhci-esdhc-imx: add DDR mode support for mx6

When DDR mode is enabled, the initial pre_div should be 2.
And the pre_div value should be changed accordingly
from
...
02h) Base clock divided by 4
01h) Base clock divided by 2
00h) Base clock divided by 1
to
..
02h) Base clock divided by 8
01h) Base clock divided by 4
00h) Base clock divided by 2

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci: report error once the maximum tuning loops exhausted or timeout
Dong Aisheng [Fri, 18 Oct 2013 11:48:45 +0000 (19:48 +0800)]
mmc: sdhci: report error once the maximum tuning loops exhausted or timeout

The original code missed to report an error when the maximum tuning
loops exhausted or timeout, it will cause the upper layer to wrongly
think the tuning process is passed.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6sl
Dong Aisheng [Fri, 18 Oct 2013 11:48:44 +0000 (19:48 +0800)]
mmc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6sl

When reading CAP_1 register for mx6sl, ignore bit[0-15] as it stores
CAP_2 register value which is new introduced in mx6sl.

Without this fix, the max clock for mx6sl may not be correct since
it's wrongly calculated by reading CAP_1 register.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: add std tuning support for mx6sl
Dong Aisheng [Mon, 21 Oct 2013 07:25:45 +0000 (15:25 +0800)]
mmc: sdhci-esdhc-imx: add std tuning support for mx6sl

The mx6sl supports standard sdhci tuning, then esdhc_executing_tuning
is only needed for mx6q/dl. We introduce is_imx6_usdhc() and
is_imx6sl_usdhc() to handle the difference.

The standard tuning is enabled by setting ESDHC_TUNE_CTRL_STD_TUNING_EN bit
in new register ESDHC_TUNE_CTRL and operates with new tuning bits
defined in SDHCI_ACMD12_ERR register.

Note: mx6sl can also work on the old manually tuning mode as mx6q/dl if
not enable standard tuning mode.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: create struct esdhc_soc_data
Shawn Guo [Thu, 17 Oct 2013 07:19:47 +0000 (15:19 +0800)]
mmc: sdhci-esdhc-imx: create struct esdhc_soc_data

Create a struct esdhc_soc_data with moving 'flags' field from
pltfm_imx_data into it, and pass the pointer of this SoC specific data
structure through of_device_id.data directly, so that the translation
from enum imx_esdhc_type to flags can be saved.

With the change, enum imx_esdhc_type can be eliminated, since we can
implement the is_imx*_esdhc() by checking the esdhc_soc_data pointer.
The unused is_imx35_esdhc() and is_imx51_esdhc() are also removed, and the
others are kept there as we will need to use them to handle some small
register differences later, where use of new flags might be a little
overkilled.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: pdev->id_entry should be immutable
Shawn Guo [Thu, 17 Oct 2013 07:19:46 +0000 (15:19 +0800)]
mmc: sdhci-esdhc-imx: pdev->id_entry should be immutable

As a good practice, device driver should not modify pdev->id_entry but
keep it immutable.  Let's assign of_device_id.data with imx_esdhc_type
constants directly, so that we do not have to manipulate pdev->id_entry
in .probe().

As the result, sdhci-esdhc-imx53 and sdhci-usdhc-imx6q can be removed
from platform_device_id table now, since they will only probe from
device tree.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: add flag ESDHC_FLAG_USDHC
Dong Aisheng [Mon, 21 Oct 2013 07:23:31 +0000 (15:23 +0800)]
mmc: sdhci-esdhc-imx: add flag ESDHC_FLAG_USDHC

Add flag ESDHC_FLAG_USDHC to tell that the ESDHC is actually an USDHC
block, and replace the is_imx6q_usdhc() occurrences with inline function
esdhc_is_usdhc() which checks the flag.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agommc: sdhci-esdhc-imx: add flag ESDHC_FLAG_ENGCM07207
Shawn Guo [Thu, 17 Oct 2013 07:19:44 +0000 (15:19 +0800)]
mmc: sdhci-esdhc-imx: add flag ESDHC_FLAG_ENGCM07207

Just like the use of the flag ESDHC_FLAG_MULTIBLK_NO_INT, let's add
another flag ESDHC_FLAG_ENGCM07207 to enable the workaround for errata
ENGcm07207 and set the flag for i.MX25 and i.MX35 ESDHC.

While at it, let's use BIT() macro for ESDHC_FLAG_MULTIBLK_NO_INT as
well.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Chris Ball <chris@printf.net>
10 years agoARM: dts: imx6sl: add pinctrl uhs states for usdhc
Dong Aisheng [Tue, 17 Sep 2013 08:25:44 +0000 (16:25 +0800)]
ARM: dts: imx6sl: add pinctrl uhs states for usdhc

This is needed for SD3.0 cards working on UHS mode.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
10 years agoENGR00284180-2 ARM: dts: imx6sl-evk: enable the SPI NOR
Huang Shijie [Thu, 17 Oct 2013 08:57:10 +0000 (16:57 +0800)]
ENGR00284180-2 ARM: dts: imx6sl-evk: enable the SPI NOR

enable the spi nor for imx6sl-evk boards.

Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agoENGR00284180-1 ARM: dts: imx6sl: add a pinctrl for ECSPI1
Huang Shijie [Thu, 17 Oct 2013 08:51:49 +0000 (16:51 +0800)]
ENGR00284180-1 ARM: dts: imx6sl: add a pinctrl for ECSPI1

add a pinctrl for ECSPI1. This pinctrl can be used in the imx6sl-evk board.

Signed-off-by: Huang Shijie <b32955@freescale.com>
10 years agoENGR00283508-6 arm: dts: imx6sl: support hog pins sleep mode
Anson Huang [Mon, 14 Oct 2013 19:33:58 +0000 (15:33 -0400)]
ENGR00283508-6 arm: dts: imx6sl: support hog pins sleep mode

As i.MX6SL EVK board is very sensitive to DSM power, so we
need to lower IO power of hog pins:

MX6SL_PAD_KEY_ROW5__GPIO4_IO03
MX6SL_PAD_KEY_COL6__GPIO4_IO04
MX6SL_PAD_LCD_RESET__GPIO2_IO19

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00283508-5 pinctrl: imx: support pin sleep mode in suspend
Anson Huang [Mon, 14 Oct 2013 19:32:48 +0000 (15:32 -0400)]
ENGR00283508-5 pinctrl: imx: support pin sleep mode in suspend

When system suspend, need to switch pwm pin to sleep mode,
this is to save IO power. Using pinctrl mode switch framework
to make it happen.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00283508-4 arm: dts: imx6sl: support kpp pin sleep mode
Anson Huang [Mon, 14 Oct 2013 19:20:52 +0000 (15:20 -0400)]
ENGR00283508-4 arm: dts: imx6sl: support kpp pin sleep mode

Improve those kpp pins pad setting with no_pad_ctrl defined,
actually they are using default pad setting, to support pin
mode switch, we need to set them manually.

As i.MX6SL EVK board is very sensitive to DSM power, so we
need to lower IO power of KPP pins:

MX6SL_PAD_KEY_ROW0__KEY_ROW0
MX6SL_PAD_KEY_ROW1__KEY_ROW1
MX6SL_PAD_KEY_ROW2__KEY_ROW2
MX6SL_PAD_KEY_COL0__KEY_COL0
MX6SL_PAD_KEY_COL1__KEY_COL1
MX6SL_PAD_KEY_COL2__KEY_COL2

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00283508-3 keyboard: imx: support pin sleep mode in suspend
Anson Huang [Mon, 14 Oct 2013 19:19:20 +0000 (15:19 -0400)]
ENGR00283508-3 keyboard: imx: support pin sleep mode in suspend

When system suspend, need to switch keyboard pins to sleep mode,
this is to save IO power. Using pinctrl mode switch framework
to make it happen.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00283508-2 arm: dts: imx6sl: support pwm pin sleep mode
Anson Huang [Mon, 14 Oct 2013 19:07:51 +0000 (15:07 -0400)]
ENGR00283508-2 arm: dts: imx6sl: support pwm pin sleep mode

As i.MX6SL EVK board is very sensitive to DSM power, so we
need to lower IO power of PWM pin:

MX6SL_PAD_PWM1__GPIO3_IO23

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00283508-1 pwm: imx: support pin sleep mode in suspend
Anson Huang [Mon, 14 Oct 2013 19:06:15 +0000 (15:06 -0400)]
ENGR00283508-1 pwm: imx: support pin sleep mode in suspend

When system suspend, need to switch pwm pin to sleep mode,
this is to save IO power. Using pinctrl mode switch framework
to make it happen.

Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoserial: imx: optimization: remove the workqueues for DMA
gregkh@linuxfoundation.org [Thu, 17 Oct 2013 20:16:04 +0000 (13:16 -0700)]
serial: imx: optimization: remove the workqueues for DMA

I worried that the delay of the sdma_run_channel0() maybe too long for
interrupt context, so I added the workqueues for RX/TX DMA.

But tested with bluetooth device, I find that the delay of sdma_run_channel0()
is about 8us (tested in imx6dl sabreauto board). I think the delay
is acceptable.

This patch removes the RX/TX workqueues for DMA, it makes the
code more clear.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agoENGR00283496 ARM: clk: imx6sl: update epdc pixel clock tree
Robby Cai [Mon, 14 Oct 2013 03:32:25 +0000 (11:32 +0800)]
ENGR00283496 ARM: clk: imx6sl: update epdc pixel clock tree

Add CLK_SET_RATE_PARENT flag for epdc pixel clock to allow the rate change
operation to propagate up to the clock's parent in order to get desired rate.

Signed-off-by: Robby Cai <R63905@freescale.com>
10 years agoserial: imx: use the dmaengine_tx_status
Huang Shijie [Fri, 11 Oct 2013 02:12:12 +0000 (10:12 +0800)]
serial: imx: use the dmaengine_tx_status

Use the dmaengine_tx_status to simplify the code, do not change any logic.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agoserial: imx: fix the wrong number of scatterlist entries when xmit->head is 0
Huang Shijie [Fri, 11 Oct 2013 07:39:07 +0000 (15:39 +0800)]
serial: imx: fix the wrong number of scatterlist entries when xmit->head is 0

When the (xmit->tail > xmit->head) is true and the xmit->head is 0,
we only need one DMA scatterlist in actually. Current code uses two DMA
scatterlists in this case, this is obviously wrong.

This patch fixes it.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agoserial: imx: check the DMA for imx_tx_empty
Huang Shijie [Thu, 10 Oct 2013 07:05:16 +0000 (15:05 +0800)]
serial: imx: check the DMA for imx_tx_empty

Assume the following situation:

  If the DMA is enabled, and the a TX DMA operation is working,
But we have not issued the TX DMA operation (or we have issued the
TX DMA operation with dma_async_issue_pending(), but the DMA has not
started to move the data from the memory to the TXFIFO).

At this time, we may get the wrong status of the transmitter when we
call the imx_tx_empty. In such situation, only check the USR2_TXDC
does not enough for us.

This patch checks the DMA's situation, and return 0 when the TX DMA is
working.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agoserial: imx: implement the flush_buffer hook
Huang Shijie [Wed, 9 Oct 2013 07:13:23 +0000 (15:13 +0800)]
serial: imx: implement the flush_buffer hook

The current driver does not implement the flush_buffer hook for
uart_ops. When we enable the DMA for the driver, and test it with Bluetooth,
we may meet the following bug for TX:

    [1] User application may call the flush operation at any time.
        The uart_flush_buffer() calls the uart_circ_clear() to set
        the xmit->head and xmit->tail with 0.

    [2] The TX DMA callback can be called at any time too.
        The dma_tx_call() will update the xmit->tail.

    If [2] occurs just after the [1], we will get the wrong xmit->tail.

This patch implements the flush_buffer hook to fix this issue.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
10 years agoENGR00281769 [iMX6SL] Allow uart to be sourced from 24MHz XTAL
Ranjani Vaidyanathan [Tue, 15 Oct 2013 17:36:42 +0000 (12:36 -0500)]
ENGR00281769 [iMX6SL] Allow uart to be sourced from 24MHz XTAL

In order to optmize low power IDLE numbers all PLLs should be in bypass.
On imx6sl, UART can be sourced directly from the 24MHz XTAL. Its frequency
is limited to 4MHz due to an internal divide by 6 divider.
For customer who don't require higher uart speeds add "uart_at_4M"
to the kernel command line.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
10 years agoahci: imx: setup power saving methods
Richard Zhu [Tue, 15 Oct 2013 02:44:54 +0000 (10:44 +0800)]
ahci: imx: setup power saving methods

In order to save power consumption as much as possible.

* Disable sata phy internal pll reference clock when sysetem enter
  into suspend mode, enable it after resume.

* Setup module parameter used to enable imx ahci test power down
  mode(PDDQ) or not, when there is no device detected on the port

* minor modifications:
  - The format of the copyright is changed, because that the original
    one can't pass fsl internal patch reivew without the character
    '(c)'.
  - Exports ahci_platform_ops and ahci_error_handler().

NOTE:
* The hot-plug can't be supported when PDDQ mode is ever enabled.

* module parameter usage how-to:
  - default: enable PDDQ mode when no device detected.
  - add "ahci-imx.hotplug=1" into kernel command line if your don't
    want to enable PDDQ mode when no device detected on the port.

tj: Slightly updated description and comments.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
10 years agoENGR00283480 imx_v7_defconfig: enable MLB150 module
Luwei Zhou [Sat, 12 Oct 2013 07:53:48 +0000 (15:53 +0800)]
ENGR00283480 imx_v7_defconfig: enable MLB150 module

Add MLB150 module support in imx_v7_defconfig

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agoENGR00283475 mxc: mlb : add MLB150 driver support.
Luwei Zhou [Sat, 12 Oct 2013 05:59:59 +0000 (13:59 +0800)]
ENGR00283475 mxc: mlb : add MLB150 driver support.

This patch add MLB150 driver support.Copy files from 3.0.35 kernel.

* Using of_xxx API to get resource from dts
* Using devm_xxx API to simply the code
* Change clk_enable()/clk_disable() to clk_prepare_enable()/
  clk_disable_unprepare()
* Fix some warning when compiling
* Fix issue when handling errors in mxc_mlb150_probe()
* Remove declaration of gpio_mlb_active(), gpio_mlb_inactive()
  out of mxc_mlb.h, because the functions are not invoked.
* Add UAPI support.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agoENGR00283470 ARM: dts: imxqdl-sabreauto: add dts support for MLB150
Luwei Zhou [Sat, 12 Oct 2013 05:48:13 +0000 (13:48 +0800)]
ENGR00283470 ARM: dts: imxqdl-sabreauto: add dts support for MLB150

This patch add MLB150 dts support on SabreAuto.The PAD setting
is aligned to 3.0.35 kernel.

Signed-off-by: Luwei Zhou <b45643@freescale.com>
10 years agoENGR00283540-02: net: fec: use pinctrl PM helpers
Fugang Duan [Mon, 14 Oct 2013 08:52:32 +0000 (16:52 +0800)]
ENGR00283540-02: net: fec: use pinctrl PM helpers

when system suspend, need to set pins to low power state to
save IO power consumption, there are three states of pinctrl:
"default", "idle" and "sleep". Currently enet supports default
and sleep state.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
10 years agoENGR00283540-01 dts:imx6sl: add fec sleep pinctrl for pin PM state
Anson Huang [Sat, 12 Oct 2013 17:35:12 +0000 (13:35 -0400)]
ENGR00283540-01 dts:imx6sl: add fec sleep pinctrl for pin PM state

when system suspend, need to set pins to low power state to
save IO power consumption, there are three states of pinctrl:
"default", "idle" and "sleep". Currently enet supports default
and sleep state.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
10 years agodrivers: pinctrl sleep and idle states in the core
Linus Walleij [Wed, 5 Jun 2013 13:30:33 +0000 (15:30 +0200)]
drivers: pinctrl sleep and idle states in the core

If a device have sleep and idle states in addition to the
default state, look up these in the core and stash them in
the pinctrl state container.

Add accessor functions for pinctrl consumers to put the pins
into "default", "sleep" and "idle" states passing nothing but
the struct device * affected.

Solution suggested by Kevin Hilman, Mark Brown and Dmitry
Torokhov in response to a patch series from Hebbar
Gururaja.

Cc: Hebbar Gururaja <gururaja.hebbar@ti.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
10 years agoENGR00283216 media: imx6sl: add runtime pm support for busfreq
Robby Cai [Tue, 8 Oct 2013 07:25:38 +0000 (15:25 +0800)]
ENGR00283216 media: imx6sl: add runtime pm support for busfreq

add runtime pm implementation for eLCDIF/EPDC/PxP

Signed-off-by: Robby Cai <R63905@freescale.com>
10 years agoENGR00281186 dmaengine: pxp: not fetch data from AS buffer if it's not used
Robby Cai [Wed, 25 Sep 2013 05:35:46 +0000 (13:35 +0800)]
ENGR00281186 dmaengine: pxp: not fetch data from AS buffer if it's not used

There's no explicit BIT in PxP register to disable AS buffer.
The right way to disable AS is to set ULC to a higher value than the LRC.
It has been done once in probe time, but not in run time.
This could cause one potential problem because even when ULC, LRC
and buffer address is set to 0 PxP will still fetch one pixel data from addr 0.
This patch fixes it by set ULC higher than LRC for AS if it's not used (i.e.,
no alpha-blending) at run time.

Signed-off-by: Robby Cai <R63905@freescale.com>
10 years agoENGR00277792 video: mxsfb: Enable pan display function
Sandor Yu [Fri, 27 Sep 2013 07:36:10 +0000 (15:36 +0800)]
ENGR00277792 video: mxsfb: Enable pan display function

- Add interrupt handle thread for vsync and frame done irq.
- Support MXCFB_WAIT_FOR_VSYNC call to get vsync signal
  in fb_ioctl function.
- Add flip_sem semaphore to check last frame done interrupt
  in pan display function.
- Add cur_blank variable to record current blank state.
- Move register_framebuffer function after lcdif controller
 enabled, struct of fb_info and lcdif controller should ready
 to work before register_framebuffer.

Signed-off-by: Sandor Yu <R01008@freescale.com>
10 years agoENGR00265935 net: fec: add pm_qos to avoid cpu enter to wait mode
Fugang Duan [Fri, 11 Oct 2013 08:36:48 +0000 (16:36 +0800)]
ENGR00265935 net: fec: add pm_qos to avoid cpu enter to wait mode

Since imx6q/dl enet cannot wake up wait mode, which cause performance
drops. Add pm_qos to request low cpu latency to avoid enter to wait mode.

Signed-off-by: Fugang Duan <B38611@freescale.com>
10 years agoENGR00283192 Avoid vpu rmmod failure and modprobe warning
Hongzhang Yang [Thu, 10 Oct 2013 03:12:06 +0000 (11:12 +0800)]
ENGR00283192 Avoid vpu rmmod failure and modprobe warning

- Avoid vpu rmmod failure caused by regulator free failure
  Do not call regulator_put because regulators returned from
  devm_regulator_get are automatically regulator_put() on
  driver detach

- Avoid vpu modprobe warning caused by unbalanced pm_runtime_enable
  Add missing call to pm_runtime_disable

Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
10 years agoENGR00283037 [gpu]Avoid gpu rmmod failure caused by regulator free failure
Loren HUANG [Wed, 9 Oct 2013 08:33:39 +0000 (16:33 +0800)]
ENGR00283037 [gpu]Avoid gpu rmmod failure caused by regulator free failure

The failure is caused by duplicate regulator resource free.
New devm_xxx API will free the resource automatically after remove()
is called.

Signed-off-by: Loren HUANG <b02279@freescale.com>
Acked-by: Shawn Guo
10 years agoserial: imx: Change cast to handle 64-bit resource_size_t
Olof Johansson [Thu, 12 Sep 2013 04:27:53 +0000 (21:27 -0700)]
serial: imx: Change cast to handle 64-bit resource_size_t

This resolves a warning where resource_size_t is larger than void *:

  drivers/tty/serial/imx.c:1542:6: warning: cast to pointer from integer
   of different size [-Wint-to-pointer-cast]

Since iomem_base is a void *, casting to unsigned long is safe.

It's unclear to me that this comparison is truly needed, but it's there
on several other drivers as well.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Huang Shijie <b32955@freescale.com>