Simon Glass [Mon, 29 Feb 2016 22:25:54 +0000 (15:25 -0700)]
dm: usb: Tidy up storage code ready for driver model conversion
Adjust a few things so that the addition of driver-models support involved
adding code rather than also changing it. This makes the patches easier to
review.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Mon, 29 Feb 2016 22:25:53 +0000 (15:25 -0700)]
dm: usb: Avoid exceeding available array size for storage devices
The limit on storage devices is USB_MAX_STOR_DEV but we use one extra
element while probing to see if a device is a storage device. Avoid this,
since it causes memory corruption.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Mon, 29 Feb 2016 22:25:52 +0000 (15:25 -0700)]
dm: block: Adjust device calls to go through helpers function
To ease conversion to driver model, add helper functions which deal with
calling each block device method. With driver model we can reimplement these
functions with the same arguments.
Use inline functions to avoid increasing code size on some boards.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Mon, 29 Feb 2016 22:25:49 +0000 (15:25 -0700)]
dm: cbfs: Fix handling of invalid type
The comment for file_cbfs_type() says that it returns 0 for an invalid type.
The code appears to check for -1, except that it uses an unsigned variable
to store the type. This results in a warning on 64-bit machines.
Adjust it to make the meaning clearer. Continue to handle the -1 case since
it may be needed.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Mon, 29 Feb 2016 22:25:47 +0000 (15:25 -0700)]
dm: part: Convert partition API use to linker lists
We can use linker lists instead of explicitly declaring each function.
This makes the code shorter by avoiding switch() statements and lots of
header file declarations.
While this does clean up the code it introduces a few code issues with SPL.
SPL never needs to print partition information since this all happens from
commands. SPL mostly doesn't need to obtain information about a partition
either, except in a few cases. Add these cases so that the code will be
dropped from each partition driver when not needed. This avoids code bloat.
I think this is still a win, since it is not a bad thing to be explicit
about which features are used in SPL. But others may like to weigh in.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Mon, 29 Feb 2016 22:25:46 +0000 (15:25 -0700)]
dm: sandbox: Enable all partition types
It is useful to have sandbox build as much code as possible to avoid having
to build every board to detect build errors. Also we may add tests for some
more partition types at some point.
Enable all partition types in sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Mon, 29 Feb 2016 22:25:44 +0000 (15:25 -0700)]
dm: blk: Rename get_device_and_partition()
Rename this function to blk_get_device_part_str(). This is a better name
because it makes it clear that the function returns a block device and
parses a string.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Mon, 29 Feb 2016 22:25:43 +0000 (15:25 -0700)]
dm: blk: Rename get_device() to blk_get_device_by_str()
The current name is too generic. The function returns a block device based
on a provided string. Rename it to aid searching and make its purpose
clearer. Also add a few comments.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Mon, 29 Feb 2016 22:25:40 +0000 (15:25 -0700)]
dm: blk: Convert interface type to an enum
Since these are sequentially numbered it makes sense to use an enum. It
avoids having to maintain the maximum value, and provides a type we can use
if it is useful.
In fact the maximum value is not used. Rename it to COUNT, since MAX suggests
it is the maximum valid value, but it is not.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Thu, 11 Feb 2016 20:23:25 +0000 (13:23 -0700)]
dm: core: Add uclass_first_device_err() to return a valid device
A common pattern is to call uclass_first_device() and then check if it
actually returns a device. Add a new function which does this, returning
an error if there are no devices in that uclass.
Marek Vasut [Fri, 11 Mar 2016 02:20:16 +0000 (03:20 +0100)]
sf: Correct data types in stm_is_locked_sr()
The stm_is_locked_sr() function is picked from Linux kernel. For reason
unknown, the 64bit data types used by the function and present in Linux
were replaced with 32bit unsigned ones, which causes trouble.
The testcase performed was done using ST M25P80 chip.
The command used was:
=> sf protect unlock 0 0x10000
The call chain starts in stm_unlock(), which calls stm_is_locked_sr()
with negative ofs argument. This works fine in Linux, where the "ofs"
is loff_t, which is signed long long, while this fails in U-Boot, where
"ofs" is u32 (unsigned int). Because of this signedness problem, the
expression past the return statement to be incorrectly evaluated to 1,
which in turn propagates back to stm_unlock() and results in -EINVAL.
The correction is very simple, just use the correctly sized data types
with correct signedness in the function to make it work as intended.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
Lokesh Vutla [Sat, 5 Mar 2016 11:13:06 +0000 (16:43 +0530)]
dm: ti_qspi: Fix conversion of address to a pointer
TI QSPI driver directly typecasts fdt_addr_t to a pointer. This is
not strictly correct, as it gives a build warning when fdt_addr_t is u64.
So, use map_physmem for a proper typecasts.
This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address
instead of a pointer for the uart base")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Chris Zhong [Mon, 7 Mar 2016 06:51:13 +0000 (14:51 +0800)]
rockchip: rk3288: correct sdram setting
The DMC driver in v3.14 kernel[0] get the ddr setting from PMU_SYS_REG2,
and it expects uboot to store the value using a same protocol. But now
the ddr setting value is different with DMC, so if you enable the DMC,
system would crash in kernel. Correct the sdram setting here, according
to the requirements of kernel.
FUKAUMI Naoki [Sat, 5 Mar 2016 13:32:02 +0000 (13:32 +0000)]
rockchip: make configure_emmc() empty for Firefly-RK3288
on v2016.03-rc3, size of SPL image compiled by gcc 5.3.0 is too large for
Firefly-RK3288. (it's fine for Rock2)
$ gcc --version
gcc (Ubuntu/Linaro 5.3.0-3ubuntu1~14.04) 5.3.0 20151204
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
$ ./tools/mkimage -n rk3288 -T rksd -d spl/u-boot-spl-dtb.bin u-boot-spl-dtb.img
Warning: SPL image is too large (size 0x80d0) and will not boot
to reduce size of SPL image, this patch makes configure_emmc() empty for
Firefly-RK3288 as same as Rock2.
MIPS: pic32mzdask: use CONFIG_USE_PRIVATE_LIBGCC=y
MIPS EL boards should define CONFIG_USE_PRIVATE_LIBGCC=y to work
with EB-only toolchains like the one from kernel.org. If one do
not globally set CONFIG_USE_PRIVATE_LIBGCC=y, the build fails with:
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o): compiled for a big endian system and target is little endian
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o): endianness incompatible with that of the selected emulation
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: failed to merge target specific data of file /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_lshrdi3.o)
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o): compiled for a big endian system and target is little endian
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o): endianness incompatible with that of the selected emulation
/opt/gcc-4.9.0-nolibc/mips-linux/bin/mips-linux-ld.bfd: failed to merge target specific data of file /opt/gcc-4.9.0-nolibc/mips-linux/bin/../lib/gcc/mips-linux/4.9.0/libgcc.a(_ashldi3.o)
/work/git-trees/u-boot-mips/Makefile:1171: recipe for target 'u-boot' failed
One example for a failing build is Travis CI.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Purna Chandra Mandal <purna.mandal@microchip.com>
MIPS: fix mips_cache fallback without __builtin_mips_cache
The "R" constraint supplies the address of an variable in a register. Use
"r" instead and adjust asm to supply the content of addr in a register
instead.
Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations") Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stephen Warren [Sat, 5 Mar 2016 17:30:53 +0000 (10:30 -0700)]
malloc: remove !gd handling
Following the previous patch, malloc() is never called before gd is set,
so we can remove the special-case check for this condition.
This reverts commit 854d2b9753e4 "dlmalloc: ensure gd is set for early
alloc".
Cc: Rabin Vincent <rabin@rab.in> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Sat, 5 Mar 2016 17:30:52 +0000 (10:30 -0700)]
malloc: use hidden visibility
When running sandbox, the following phases occur, each with different
malloc implementations or behaviors:
1) Dynamic linker execution, using the dynamic linker's own malloc()
implementation. This is fully functional.
2) After U-Boot's malloc symbol has been hooked into the GOT, but before
any U-Boot code has run. This phase is entirely non-functional, since
U-Boot's gd symbol is NULL and U-Boot's initf_malloc() and
mem_malloc_init() have not been called.
At least on Ubuntu Xenial, the dynamic linker does make both malloc() and
free() calls during this phase. Currently these free() calls crash since
they dereference gd, which is NULL.
U-Boot itself makes no use of malloc() during this phase.
3) U-Boot execution after gd is set and initf_malloc() has been called.
This is fully functional, albeit via a very simple malloc()
implementation.
4) U-Boot execution after mem_malloc_init() has been called. This is fully
functional with a complete malloc() implementation.
Furthermore, if code that called malloc() during phase 1 calls free() in
phase 3 or later, it is likely that heap corruption will occur, since
U-Boot's malloc implementation will assume the pointer is part of its own
heap, although it isn't. I have not actively observed this happening.
To prevent phase 2 from happening, this patch makes all of U-Boot's malloc
library public symbols have hidden visibility. This prevents them from
being hooked into the GOT, so only code in the U-Boot binary itself
actually calls them; any other code will call into the standard C library
malloc(). This also avoids the "furthermore" issue mentioned above.
I have seen references to this GCC pragma in blog posts from 2008, and
RHEL5's ancient gcc appears to accept it fine, so I believe it's quite
safe to use it without checking gcc version.
Cc: Rabin Vincent <rabin@rab.in> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sat, 5 Mar 2016 19:07:44 +0000 (14:07 -0500)]
sandbox: Fix building with LLVM
- The macro __BIGGEST_ALIGNMENT__ is gcc-specific. If it is not defined
we'll just assume 16. This is correct for at least the common cases
and LLVM does not provide an equivalent macro.
- When linking U-Boot we're passing -T to the linker, and while gcc will
just pass this along with LLVM we need to be specific.
Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
api: Export API structure address as an environment variable
This patch makes the U-Boot api export its structure address as an environment
variable, so it can be used to directly hint FreeBSD's loader of api's location.
The relevant FreeBSD loader change is currently under review at:
https://reviews.freebsd.org/D5492
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
Masahiro Yamada [Fri, 4 Mar 2016 06:56:16 +0000 (15:56 +0900)]
pinctrl: uniphier: set input-enable before pin-muxing
While IECTRL is disabled, input signals are pulled-down internally.
If pin-muxing is set up first, glitch signals (Low to High transition)
might be input to hardware blocks.
Bad case scenario:
[1] The hardware block is already running before pinctrl is handled.
(the reset is de-asserted by default or by a firmware, for example)
[2] The pin-muxing is set up. The input signals to hardware block
are pulled-down by the chip-internal biasing.
[3] The pins are input-enabled. The signals from the board reach the
hardware block.
Actually, one invalid character is input to the UART blocks for such
SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the
power on reset.
To avoid such problems, pins should be input-enabled before muxing.
For the case where an external VBUS is used, we should enable the external
VBUS comparator in the driver. This would prevent an unnecessary overcurrent
error which would then disable the host port.
The overcurrent condition was happening on the SoCFPGA Cyclone5 devkit, thus
USB was not working on the devkit. This patch fixes that problem.
Soeren Moch [Tue, 9 Feb 2016 15:53:27 +0000 (16:53 +0100)]
board: tbs2910: Fix eMMC BOOTCFG value
Fix the BOOTCFG value for eMMC in the same way as commit 214c3f0f9921250eb336c7effadcc16158ea9df5
[imx: MX6DQ{P}/DL:SABRESD Fix bmode eMMC failure]
did for sabresd.
Bhuvanchandra DV [Wed, 24 Feb 2016 08:33:24 +0000 (14:03 +0530)]
colibri-vf: Disable pull-up configuration in GPIO pin mux
During very early boot-ROM execution the pinmux
configuration isi in Hi-Z state. If pull-up is enabled
on GPIO pad's there will be a short period of toggle
from high to low on the IO when GPIO is set low during
boot. To avoid this glitch, disable pull-up configuration
in GPIO pinmux.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Sam Protsenko [Tue, 16 Feb 2016 17:59:19 +0000 (19:59 +0200)]
usb: gadget: composite: Correct recovery path for register
In case when usb_composite_register() failed once (for whatever reason),
it will fail further even if all conditions are correct. Example:
=> fastboot 2
Invalid Controller Index
couldn't find an available UDC
g_dnl_register: failed!, error: -19
exit not allowed from main input shell.
=> fastboot 0
g_dnl_register: failed!, error: -22
exit not allowed from main input shell.
Despite that 0 is correct index for USB controller, "fastboot 0" command
will fail, because "composite" structure wasn't cleared properly on
previous fail (on "fastboot 2" command).
This patch fixes that erroneous behavior, allowing us to use composite
even after previous failure.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Sam Protsenko [Fri, 26 Feb 2016 19:37:52 +0000 (21:37 +0200)]
arm: dra7xx: Define Android partition table
"fastboot oem format" command reuses "gpt write" command, which in turn
requires correct partitions defined in $partitions variable. This patch
adds such definition of Android partitions for DRA7XX EVM board.
By default $partitions variable contains Linux partition table. In order
to prepare Android environment one can run next commands from U-Boot
shell:
=> env set partitions $partitions_android
=> env save
After those operations one can go to fastboot mode and perform
"fastboot oem format" to create Android partition table.
While at it, enable CONFIG_RANDOM_UUID to spare user from providing
UUIDs for each partition manually.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
sniper: Various minor cleanups, missing Kconfig configs and reorganisation
This introduces some minor cleanups, regarding aspects such as board name, code
and headers organization as well as deprecated and missing config options.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 29 Feb 2016 19:47:47 +0000 (14:47 -0500)]
amcc-common.h: Disable CONFIG_SYS_LONGHELP
There are a number of AMCC platforms which are close to, or with some
toolchains exceeding, the size constraints. Disable CONFIG_SYS_LONGHELP
to get us room to build with again.
Tom Rini [Mon, 29 Feb 2016 16:34:15 +0000 (11:34 -0500)]
compiler*.h: sync include/linux/compiler*.h with Linux 4.5-rc6
Copy these from Linux v4.5-rc6 tag.
This is needed so that we can keep up with newer gcc versions. Note
that we don't have the uapi/ hierarchy from the kernel so continue to
use <linux/types.h>
Masahiro Yamada [Fri, 26 Feb 2016 09:59:45 +0000 (18:59 +0900)]
ARM: uniphier: fix warnings reported by aarch64 compiler
The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler. Before
adding the ARMv8 support really, fix them now.
Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.
Masahiro Yamada [Fri, 26 Feb 2016 09:59:44 +0000 (18:59 +0900)]
ARM: uniphier: prepare directory structure for ARMv8 SoC support
Before adding ARMv8 support, this commit refactors the directory
structure. Move ARMv7 specific files to arch/arm/mach-uniphier/arm32
to avoid a mess by mixture of ARMv7 and ARMv8 code. Also move the
"select CPU_V7" to the lower-level menu because we will have to
select ARM64 instead of CPU_V7 for ARMv8 SoCs.
While this is a correct change to do long term it unfortunately breaks a
number of platforms that are using pdata and not named struct members so
they are getting all of their data after 'base' incorrect.
Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Fri, 26 Feb 2016 09:59:42 +0000 (18:59 +0900)]
ARM: uniphier: rework UniPhier SoC select in Kconfig
The chains of "depends on <SoC_name>" in the current Kconfig is
clumsy. The idea here is to allow users to choose a SoC group first
(SoC group consists of some SoCs that can coexist in one binary).
Then, allow to enable/disable each SoC support in the selected SoC
group. This makes the Kconfig menu clearer.
Masahiro Yamada [Fri, 26 Feb 2016 09:59:41 +0000 (18:59 +0900)]
ARM: uniphier: merge two defconfig files
PH1-Pro5 support and ProXstream2/PH1-LD6b support can coexist in one
image and there is bit more room in SPL to accommodate all of them.
Merge uniphier_pro5_defconfig into uniphier_pxs2_defconfig.
Masahiro Yamada [Fri, 26 Feb 2016 05:21:41 +0000 (14:21 +0900)]
ARM: uniphier: merge DDR PHY init code for 3 SoCs
Now these three are almost the same. The only difference is the DTPR1
register dependency on the DRAM size, but it can be ignored. (It has
already been ignored in PH1-sLD8 and PH1-Pro4.)
Masahiro Yamada [Fri, 26 Feb 2016 05:21:40 +0000 (14:21 +0900)]
ARM: uniphier: add a field to specify DDR3+
Add a field to distinguish DDR3+ from (standard) DDR3. It also
allows to delete CONFIG_DDR_STANDARD (this is not a software
configuration, but a board attribute).
Masahiro Yamada [Fri, 26 Feb 2016 05:21:38 +0000 (14:21 +0900)]
ARM: uniphier: remove UMC_INITCTL* and UMC_DRMR* settings
These settings were used only for the PH1-sLD3 and older SoCs. The
PH1-LD4 and newer one just ignore them because their DDR-PHY take
care of such timing parameters instead.
Masahiro Yamada [Fri, 26 Feb 2016 05:21:37 +0000 (14:21 +0900)]
ARM: uniphier: refactor UMC init code for ProXstream2
Currently, a dummy value is defined for the UMC_SPCCTLA register
when the DRAM size is zero. This seems weird because the controller
does not need setting in the first place if the size is zero.
Also, redefine enum dram_size to represent the DRAM size per 16-bit
unit. This makes things simpler because the channel 0 and 1 are
connected with 32-bit width DRAM, while the channel 2 is connected
with 16-bit width one.
I am renaming SIZE_* into DRAM_SZ_* (and also FREQ_* to DRAM_FREQ_*
for consistency) while I am here because SIZE_* might be easily
mixed-up with the macros in include/linux/sizes.h.
Masahiro Yamada [Fri, 26 Feb 2016 05:21:34 +0000 (14:21 +0900)]
ARM: uniphier: rework struct uniphier_board_data
This commit reworks "struct uniphier_board_data" with an array of
DRAM channel data in it. It will allow further cleanups by means of
"for" statements that iterate over the DDR channels.
Masahiro Yamada [Tue, 16 Feb 2016 08:08:41 +0000 (17:08 +0900)]
ARM: uniphier: add emmcupdate command
The Boot ROM expects the boot image (SPL) in the Boot Partition 1.
So, updating images involves the hardware partition switch. It might
be a bit advanced for some users.
To be user-friendly, this commit adds a useful command to update the
images; just put SPL and U-Boot proper into the public directory of
the TFTP server and execute "run emmcupdate" from the command line.
Masahiro Yamada [Tue, 16 Feb 2016 08:08:39 +0000 (17:08 +0900)]
ARM: uniphier: add eMMC boot support
Export device nodes needed for eMMC boot (eMMC node, pinctrl, and
clock) to the SPL DTB. CONFIG_SUPPORT_EMMC_BOOT is also necessary
to use "mmc partconf" command.
projects / karo-tx-uboot.git / log