David Daney [Thu, 10 Nov 2011 23:25:20 +0000 (15:25 -0800)]
MIPS: Update Octeon model detection code for new chips.
Several newer chips were not covered, update the code to detect them.
This necessitates updating cvmx-mio-defs.h as well, because it has new
and required definitions.
Grant Grundler [Tue, 15 Nov 2011 07:12:42 +0000 (07:12 +0000)]
net-next:asix: V2 more fixes for ax88178 phy init sequence
Now works on Samsung Series 5 (chromebook)
Two fixes here:
o use 0x7F mask for phymode
o read phyid *AFTER* phy is powered up (via GPIOs)
Signed-off-by: Allan Chou <allan@asix.com.tw> Signed-off-by: Grant Grundler <grundler@chromium.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Grant Grundler [Tue, 15 Nov 2011 07:12:41 +0000 (07:12 +0000)]
net-next:asix: reduce AX88772 init time by about 2 seconds
ax88772_reset takes about 2 seconds and is called twice.
Once from ax88772_bind() directly and again indirectly from usbnet_open().
Reset the USB FW/Phy enough to blink the LEDs when inserted.
Signed-off-by: Allan Chou <allan@asix.com.tw> Signed-off-by: Grant Grundler <grundler@chromium.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Grant Grundler [Tue, 15 Nov 2011 07:12:40 +0000 (07:12 +0000)]
net-next:asix:poll in asix_get_phyid in case phy not ready
Sometimes the phy isn't ready after reset...poll and pray it will be soon.
Signed-off-by: Freddy Xin <freddy@asix.com.tw> Signed-off-by: Grant Grundler <grundler@chromium.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Kevin Cernekee [Fri, 11 Nov 2011 06:30:24 +0000 (22:30 -0800)]
MIPS: BMIPS: Fix up Kconfig settings
Factor out common BMIPS options into "CPU_BMIPS". Add L2 cache for
BMIPS5000. Add CPU_MIPS32 to satisfy checks in page.h, r4k_switch.S,
tlb-r4k.c, etc.
Manuel Lauss [Thu, 10 Nov 2011 19:09:38 +0000 (20:09 +0100)]
MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.
With a generic plat_irq_dispatch (for Alchemy at least) code for both
interrupt controller types can coexist in a single kernel image and be
autodetected at runtime.
Manuel Lauss [Thu, 10 Nov 2011 12:06:23 +0000 (12:06 +0000)]
net/irda: convert au1k_ir to platform driver.
Moderate driver cleanup:
convert to platform driver, get rid of board-specific code.
Driver loads and runs on a DB1100 board. But since I have no other
IrDA hardware to exchange data with I can't say whether it really sends
and receives.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: Samuel Ortiz <samuel@sortiz.org> Cc: netdev@vger.kernel.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2877/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Manuel Lauss [Thu, 10 Nov 2011 12:06:23 +0000 (12:06 +0000)]
MTD: nand: make au1550nd.c a platform_driver
Transform the au1550nd.c driver into a platform_driver and hook it
up in the PB1550 board (gen_nand works fine on the DB1550, but since
I don't have a PB1550 to test this driver stays for now).
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mtd@lists.infradead.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2875/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Manuel Lauss [Thu, 10 Nov 2011 12:06:22 +0000 (12:06 +0000)]
MIPS: Alchemy: Add RTC device to all devboards
All Devboards can use the 32kHz counter as a RTC device.
Also delete the custom CMOS RTC header, which can be used for the
DS1693 on the PB1500. But since it doesn't have a buffer battery
it is as useful as the on-chip RTC which I prefer.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2874/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Manuel Lauss [Tue, 1 Nov 2011 19:03:30 +0000 (20:03 +0100)]
MIPS: Alchemy: Au1300 SoC support
Add basic support for the Au1300 variant(s):
- New GPIO/Interrupt controller
- DBDMA ids
- USB setup
- MMC support
- enable various PSC drivers
- detection code.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2866/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Initially I had to write to both the MASK and ENABLE registers, otherwise
the CPLD would generate tons of spurious interrupts. With the change to
the demux handler to disable the muxed line, it is now sufficient to
disable the interrupt by writing either the enable or mask register.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2865/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Manuel Lauss [Tue, 1 Nov 2011 19:03:28 +0000 (20:03 +0100)]
MIPS: Alchemy: Drop MIRAGE/BOSPORUS board support
No test hardware and no (apparent) users. These boards seem very
similar to the DB1500, so if required support can be brought back
again (I have datasheets) but then with dedicated board code, not
tacked on to DB1000 support.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2864/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
John Crispin [Thu, 10 Nov 2011 20:33:07 +0000 (21:33 +0100)]
MIPS: lantiq: use export.h in favour of module.h
The code located at arch/mips/lantiq/ included module.h to be able to use
the EXPORT_SYMBOL* macros. These can now be directly included using
export.h.
Maksim Rayskiy [Thu, 10 Nov 2011 17:59:45 +0000 (17:59 +0000)]
MIPS: ASID conflict after CPU hotplug
I am running SMP Linux 2.6.37-rc1 on BMIPS5000 (single core dual thread)
and observe some abnormalities when doing system suspend/resume which I
narrowed down to cpu hotplugging. The suspend brings the second thread
processor down and then restarts it, after which I see memory corruption
in userspace. I started digging and found out that problem occurs because
while doing execve() the child process is getting the same ASID as the
parent, which obviously corrupts parent's address space.
Further digging showed that activate_mm() calls get_new_mmu_context() to
get a new ASID, but at this time ASID field in entryHi is 1, and
asid_cache(cpu) is 0x100 (it was just reset to ASID_FIRST_VERSION when
the secondary TP was booting).
So, get_new_mmu_context() increments the asid_cache(cpu) value to
0x101, and thus puts 0x01 into entryHi. The result - ASID field does
not get changed as it was supposed to.
My solution is very simple - do not reset asid_cache(cpu) on TP warm
restart.
projects / karo-tx-linux.git / log