Christian König [Wed, 13 Jul 2016 19:24:59 +0000 (21:24 +0200)]
drm/amdgpu: return -ENOSPC when running out of UVD handles
This is a minor interface change, but clearly won't break anything.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 8 Jul 2016 08:48:24 +0000 (10:48 +0200)]
drm/amdgpu: trace need_flush in grab_vm as well
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 12 Jul 2016 11:57:03 +0000 (13:57 +0200)]
drm/amdgpu: always signal all fences
A little fallout from "drm/amdgpu: sanitize fence numbers", we
sometimes need to signal all fences in the ring.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 8 Jul 2016 08:21:02 +0000 (10:21 +0200)]
drm/amdgpu: check flush fence context instead of same ring v2
Otherwise we can run into the following situation:
1. Process A grabs ID 1 for ring 0.
2. Process B grabs ID 1 for ring 0.
3. Process A grabs ID 1 for ring 1.
4. Process A tries to reuse ID1 for ring 0 but things he doesn't need to flush.
v2: check the context of the flush fence instead of messing with the owner field.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 5 Jul 2016 13:53:07 +0000 (15:53 +0200)]
drm/amdgpu: remove usec timeout loop from IB tests
We already waited for the fence, so waiting for the registers
is completely pointless and just copy & pasted from the ring test.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 5 Jul 2016 12:48:17 +0000 (14:48 +0200)]
drm/amdgpu: cleanup hw reference handling in the IB tests
Reference should be taken when we make the assignment, not anywhere else.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 1 Jul 2016 15:45:49 +0000 (17:45 +0200)]
drm/amdgpu: cleanup UVD coding style
Cleanup 80 chars limit.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 1 Jul 2016 20:19:25 +0000 (22:19 +0200)]
drm/amdgpu: allow multiple sessions in the same VCE IB
We always used updated firmware for amdgpu, so this actually should work fine.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 1 Jul 2016 15:43:57 +0000 (17:43 +0200)]
drm/amdgpu: cleanup VCE coding style
Fix 80 chars issues and remove some dead code as well.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 24 Jun 2016 19:11:51 +0000 (21:11 +0200)]
drm/amdgpu: sanitize fence numbers
Looks like the VCE block sometimes still sends nonsense
fence numbers on startup.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 5 Jul 2016 11:18:15 +0000 (19:18 +0800)]
drm/amd/powerplay: don't add invalid voltage.
if atomctrl_get_voltage_evv_on_sclk_ai returns
non zero (fail) in the expansion of the
PP_ASSERT_WITH_CODE macro the continue will
actually do nothing, So invalid voltage will be
added to ppbable.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Fri, 1 Jul 2016 05:54:23 +0000 (13:54 +0800)]
drm/amdgpu: remove gfx8 registers that vary between asics
those register mask definitions are different in polaris compare to
former gfx 8 gpus, so remove them from misusing.
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 6 Jul 2016 14:01:39 +0000 (10:01 -0400)]
drm/amd/powerplay: Unify family defines
s/AMD_FAMILY_/AMDGPU_FAMILY_/
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Wed, 29 Jun 2016 08:01:49 +0000 (16:01 +0800)]
drm/amdgpu: clean up ring_backup code, no need more
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 30 Jun 2016 07:02:26 +0000 (15:02 +0800)]
drm/amdgpu: ib test first after gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 30 Jun 2016 05:56:02 +0000 (13:56 +0800)]
drm/amdgpu: recovery hw jobs when gpu reset V3
V3: directly use pd_addr.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Wed, 29 Jun 2016 06:01:15 +0000 (14:01 +0800)]
drm/amdgpu: abstract amdgpu_vm_is_gpu_reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add a bool to specify if needing vm flush V2
which avoids job->vm_pd_addr be changed.
V2: pass job structure to amdgpu_vm_grab_id and amdgpu_vm_flush directly.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Wed, 29 Jun 2016 07:23:55 +0000 (15:23 +0800)]
drm/amdgpu: add amd_sched_job_recovery
Which is to recover hw jobs when gpu reset.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 30 Jun 2016 08:53:02 +0000 (16:53 +0800)]
drm/amdgpu: force completion for gpu reset
After all hw jobs are reset, hw fence is meaningless, so force_completion
Cc: William Lewis <minutemaidpark@hotmail.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 30 Jun 2016 08:44:41 +0000 (16:44 +0800)]
drm/amdgpu: block ttm first before parking scheduler
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 30 Jun 2016 03:30:37 +0000 (11:30 +0800)]
drm/amd: add amd_sched_hw_job_reset
amd_sched_hw_job_reset will remove callback from hw fence.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 30 Jun 2016 03:23:31 +0000 (11:23 +0800)]
drm/amd: add parent for sched fence
Parent of sched fence is hw fence which is to signal sched fence.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Wed, 29 Jun 2016 05:33:40 +0000 (13:33 +0800)]
drm/amdgpu: remove evict vram
Previous vm fault is since page talbe losts connection with vmid after gpu reset.
Now the issue is fixed by recovery. No need more.
If we want to save vram for some EDC card, we will need to consider a complete solution.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 30 Jun 2016 09:30:42 +0000 (17:30 +0800)]
drm/amdgpu: put old hw fence of job if gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 30 Jun 2016 08:52:03 +0000 (10:52 +0200)]
drm/amdgpu: remove fence parameter from amd_sched_job_init
We return the fence as part of the job structur anyway,
no need to do this twice.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 29 Jun 2016 13:10:31 +0000 (15:10 +0200)]
drm/amdgpu: earlier free SA resources
Keep the time we don't have a fence associated with the resource smaller.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 29 Jun 2016 11:29:57 +0000 (13:29 +0200)]
drm/amdgpu: shorten amdgpu_job_free_resources
The fence and the sync object are not hardware resources.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 29 Jun 2016 11:26:41 +0000 (13:26 +0200)]
drm/amdgpu: fix user fence handling once more
Same problem as with the VM page tables. The user fence address must be
determined before the job is scheduled, not when the IB is executed.
This fixes a security problem where user fences could be used to overwrite
any part of VRAM.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 27 Jun 2016 15:55:07 +0000 (11:55 -0400)]
drm/amd/amdgpu: Add bank selection for MMIO debugfs (v3)
(v2) Added INSTANCE selector
(v3) Changed order of bank selectors
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 27 Jun 2016 13:57:18 +0000 (09:57 -0400)]
drm/amd/amdgpu: Add gca config debug entry (v4)
A binary entry that lists GCA configuration data (and can be
read by umr).
(v2) Use kmalloc instead of vmalloc
(v3) Minor indentation correction
(v4) agd: Squash in kmalloc fix
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 28 Jun 2016 14:26:48 +0000 (10:26 -0400)]
drm/amd/gfx: add instance field to select_se_sh (v3)
Add ability to specify instance in select_se_sh callback.
Defaults to 0xffffffff all over the driver.
(v2) Don't enable INSTANCE_BROADCAST by default
(v3) Style changes
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lyude [Fri, 24 Jun 2016 21:54:32 +0000 (17:54 -0400)]
drm/amdgpu: Poll for both connect/disconnect on analog connectors
DRM_CONNECTOR_POLL_CONNECT only enables polling for connections, not
disconnections. Because of this, we end up losing hotplug polling for
analog connectors once they get connected.
Easy way to reproduce:
- Grab a machine with an AMD GPU and a VGA port
- Plug a monitor into the VGA port, wait for it to update the connector
from disconnected to connected
- Disconnect the monitor on VGA, a hotplug event is never sent for the
removal of the connector.
Originally, only using DRM_CONNECTOR_POLL_CONNECT might have been a good
idea since doing VGA polling can sometimes result in having to mess with
the DAC voltages to figure out whether or not there's actually something
there since VGA doesn't have HPD. Doing this would have the potential of
showing visible artifacts on the screen every time we ran a poll while a
VGA display was connected. Luckily, amdgpu_vga_detect() only resorts to
this sort of polling if the poll is forced, and DRM's polling helper
doesn't force it's polls.
Additionally, this removes some assignments to connector->polled that
weren't actually doing anything.
Cc: stable@vger.kernel.org Signed-off-by: Lyude <cpaul@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lyude [Fri, 24 Jun 2016 21:54:31 +0000 (17:54 -0400)]
drm/radeon: Poll for both connect/disconnect on analog connectors
DRM_CONNECTOR_POLL_CONNECT only enables polling for connections, not
disconnections. Because of this, we end up losing hotplug polling for
analog connectors once they get connected.
Easy way to reproduce:
- Grab a machine with a radeon GPU and a VGA port
- Plug a monitor into the VGA port, wait for it to update the connector
from disconnected to connected
- Disconnect the monitor on VGA, a hotplug event is never sent for the
removal of the connector.
Originally, only using DRM_CONNECTOR_POLL_CONNECT might have been a good
idea since doing VGA polling can sometimes result in having to mess with
the DAC voltages to figure out whether or not there's actually something
there since VGA doesn't have HPD. Doing this would have the potential of
showing visible artifacts on the screen every time we ran a poll while a
VGA display was connected. Luckily, radeon_vga_detect() only resorts to
this sort of polling if the poll is forced, and DRM's polling helper
doesn't force it's polls.
Additionally, this removes some assignments to connector->polled that
weren't actually doing anything.
Cc: stable@vger.kernel.org Signed-off-by: Lyude <cpaul@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Tue, 28 Jun 2016 02:38:50 +0000 (10:38 +0800)]
drm/amdgpu: stop/resume fb access when gpu reset V3
V2: Add wait_for_mc_idle after stopping fb access
V3:
1. Remove resume fb access since there is no need to
do that for gpu reset.
2. Move stop fb access to amdgpu_gpu_reset function,
since it's the same for all asics.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> (V1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 29 Jun 2016 11:32:50 +0000 (19:32 +0800)]
drm/amd/powerplay: functions's return state was reversed
In commit 195567e99bdf6491a370b71a1dcf6b4c891495d7,
use true/false instead of 1/0 to fix build warning.
But the original logic: '0' means true and '1' means false.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 13 Jun 2016 14:12:43 +0000 (16:12 +0200)]
drm/amdgpu: stop disabling irqs when it isn't neccessary
A regular spin_lock/unlock should do here as well.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 27 Jun 2016 09:04:23 +0000 (17:04 +0800)]
drm/amdgpu: must update page table after gpu reset
Record the gpu reset count in vmid to identify if gpu reset happened.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Tue, 21 Jun 2016 06:52:09 +0000 (14:52 +0800)]
drm/amdgpu: save/restore bios scratch when gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 27 Jun 2016 09:06:01 +0000 (17:06 +0800)]
drm/amdgpu: must update page table after gpu reset
Record the gpu reset count in vmid to identify if gpu reset happened.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 24 Jun 2016 19:51:03 +0000 (21:51 +0200)]
drm/ttm: fix stupid parameter inversion in the pipeline code
We want to keep the newest fence, not the oldest one.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Frank Binns [Fri, 24 Jun 2016 17:15:17 +0000 (18:15 +0100)]
drm/amd/amdgpu: Set DRIVER_MODESET feature flag at build time
This flag was being set unconditionally at runtime so just set it at
compile time instead.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Frank Binns <frank.binns@imgtec.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Fri, 24 Jun 2016 08:30:08 +0000 (17:30 +0900)]
drm/amdgpu: Unpin BO if we can't get fences in amdgpu_crtc_page_flip
If reservation_object_get_fences_rcu failed, we'd previously go directly
to the cleanup label, so we'd leave the BO pinned.
While we're at it, remove two amdgpu_bo_unreserve calls in favour of two
new labels.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 22 Jun 2016 20:49:22 +0000 (16:49 -0400)]
drm/amdgpu/dce11: update async flip update time
Use UPDATE_IMMEDIATE (update on next data request boundary) rather
than UPDATE_H_RETRACE (update on next line boundary). The data
request boundary is less than a scanline, so it update will happen
sooner.
Cc: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 22 Jun 2016 12:25:55 +0000 (14:25 +0200)]
drm/amdgpu: don't update page tables for VM emulation
It's just overhead to do so and allocating a VMID
when we don't need one is actually a bit dangerous.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 22 Jun 2016 12:25:54 +0000 (14:25 +0200)]
drm/amdgpu: implement HDP functions for UVD v2
Flush and invalidate the HDP caches.
v2: fix typo in comment
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 22 Jun 2016 05:49:48 +0000 (13:49 +0800)]
drm/amdgpu: change pcie_gen_cap magic code to macro
This patch changes pcie_gen_cap magic code to macro to make it more
readable.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Cc: Eric Huang <JinHuiEric.Huang@amd.com> Cc: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 21 Jun 2016 14:28:15 +0000 (16:28 +0200)]
drm/amdgpu: validate VM PTs only on eviction
We don't need to validate them again if the eviction counter didn't changed.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 21 Jun 2016 14:28:14 +0000 (16:28 +0200)]
drm/amdgpu: add eviction counter
Keep track of the number of evictions since boot.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Mon, 20 Jun 2016 10:35:01 +0000 (16:05 +0530)]
drm/amd/powerplay: make sure VCE is disabled by default
This patch is a port of similar patch for amdgpu
when PP is disabled. Since the code flow is little
different when PP is enabled, we need to make sure
the patch is applied for PP enabled path as well.
With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.
This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disabled otherwise.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Mon, 20 Jun 2016 08:47:49 +0000 (14:17 +0530)]
drm/amd/amdgpu: make sure VCE is disabled by default
With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.
This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disaled otherwise.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Sun, 12 Jun 2016 07:43:20 +0000 (15:43 +0800)]
drm/amdgpu: evict vram when gpu reset
On workstation cards with ECC vram, the entirety of vram is cleared to 0
on asic init to set the ECC status correctly. On non ECC boards, I don't
think they do any explicit clearing, but the vram controller is reset
which may cause issues with the data there.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Sun, 12 Jun 2016 07:41:58 +0000 (15:41 +0800)]
drm/amdgpu: block scheduler when gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arnd Bergmann [Wed, 15 Jun 2016 20:15:00 +0000 (22:15 +0200)]
amdgpu: use NULL instead of 0 for pointer
In the AMD powerplay driver, a pointer is checked for validity by
comparing against an integer '0', which causes a harmless warning
when building with "make W=1":
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/processpptables.c:1502:16: error: ordered comparison of pointer with integer zero [-Werror=extra]
This changes the code to the more conventional "if (pointer)" check.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:05 +0000 (13:44 +0200)]
drm/amdgpu: pipeline evictions as well
This boosts Xonotic from 38fps to 47fps when artificially limiting VRAM to
256MB for testing. It should improve all CPU bound rendering situations
where we have a lot of swapping to/from VRAM.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:04 +0000 (13:44 +0200)]
drm/amdgpu: save the PD addr before scheduling the job
When we pipeline evictions the page directory could already be
moving somewhere else when grab_id is called.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:03 +0000 (13:44 +0200)]
drm/ttm: add the infrastructure for pipelined evictions
Free up the memory immediately, remember the last eviction for each domain and
make new allocations depend on the last eviction to be completed.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:02 +0000 (13:44 +0200)]
drm/ttm: simplify ttm_bo_wait
As far as I can see no need for a custom implementation any more.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:01 +0000 (13:44 +0200)]
drm/ttm: remove TTM_BO_PRIV_FLAG_MOVING
Instead of using the flag just remember the fence of the last move operation.
This avoids waiting for command submissions pipelined after the move, but
before accessing the BO with the CPU again.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 15 Jun 2016 11:44:00 +0000 (13:44 +0200)]
drm/ttm: remove no_gpu_wait param from ttm_bo_move_accel_cleanup
It isn't used and not waiting for the GPU after scheduling a move is
actually quite dangerous.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:59 +0000 (10:17 +0200)]
drm/amdgpu: remove pre move wait
Not needed any more.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 6 Jun 2016 08:17:58 +0000 (10:17 +0200)]
drm/amdgpu: sync to buffer moves before VM updates
Otherwise we could update the VM page tables while the move is only scheduled.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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