Richard Zhu [Thu, 8 Jan 2015 06:53:05 +0000 (14:53 +0800)]
MLK-10078-03 mcc: tests: add mcc test and tty api
add mcc tests and tty api on imx_3.14.
note:
the device type of the tty device should be
TTY_DRIVER_TYPE_CONSOLE, otherwise the TTY_DRIVER_TYPE_PTY.
link layer stuffs are mandatory requried by
TTY_DRIVER_TYPE_PTY type devices.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
Richard Zhu [Thu, 8 Jan 2015 07:09:38 +0000 (15:09 +0800)]
MLK-10078-02 arm: mcc: platform related codes changes
The platform related codes changes when enable mcc2.0
on imx_3.14 kernel, and tested on imx6sx sdb board.
- keep imx6sx soc related apis in mcc_imx6sx.c/h
- keep linux os related apis in mcc_linux.c/h
- add some new mcc callback in mu driver, since the
gie3 of mu is used as cpu2cpu interrupter in the mcc
implementation on imx6sx.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
Richard Zhu [Thu, 8 Jan 2015 07:08:42 +0000 (15:08 +0800)]
MLK-10078-01 arm: mcc: platform related header changes
The platform related header changes when enable mcc2.0
on imx_3.14 kernel, and tested on imx6sx sdb board.
- keep imx6sx soc related apis in mcc_imx6sx.c/h
- keep linux os related apis in mcc_linux.c/h
- add some new mcc callback in mu driver, since the
gie3 of mu is used as cpu2cpu interrupter in the mcc
implementation on imx6sx.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
Richard Zhu [Mon, 20 Oct 2014 07:09:11 +0000 (15:09 +0800)]
MLK-9707-3 arm: mcc: mcc 2.0 updates common codes changes
Common codes changes in the mcc 2.0 updates
- common definitions are moved from mcc_config.h to mcc_common.h
because that these definitions are common for the standalone mcc
stack, and shared by different platforms, such as Linux, MQX.
- re-define the common api _psp_core_num(), and _psp_node_num().
Let them to be no platform dependency.
- move the definition of the MCC_OS_USED in mcc_config.h
- new add on mcc_config_linux.h file, contained the platform
related macro definitions contained in mcc_config.h before.
- add the related linux modifications into mcc_api.c/mcc_common.c
when implement the mcc2.0 into linux BSP.
- fix one potential bug that all the share memory operations should
be protected by sema4.
Robin Gong [Thu, 18 Dec 2014 04:41:16 +0000 (12:41 +0800)]
MLK-9986-4 dma: imx-sdma: add new ecspi tx script
Current ecspi rom script didn't take care of rxfifo overflow risk. Add new
ecspi tx script to check the rxfifo status, if it is near to full(>=48 bytes),
do not copy data to txfifo which will trigger data push into rxfifo. Because
rx script may not read rxfifo in time, we have to consider it.
Charles Keepax [Mon, 17 Nov 2014 09:14:31 +0000 (09:14 +0000)]
spi: Fix mapping from vmalloc-ed buffer to scatter list
We can only use page_address on memory that has been mapped using kmap,
when the buffer passed to the SPI has been allocated by vmalloc the page
has not necessarily been mapped through kmap. This means sometimes
page_address will return NULL causing the pointer we pass to sg_set_buf
to be invalid.
As we only call page_address so that we can pass a virtual address to
sg_set_buf which will then immediately call virt_to_page on it, fix this
by calling sg_set_page directly rather then relying on the sg_set_buf
helper.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
(cherry picked from commit c1aefbdd050e1fb15e92bcaf34d95b17ea952097)
We set both wartermark of txfifo and rxfifo 32 as half of fifo length 64.
That will cause easy rxfifo overflow:
If there is 31 bytes in rxfifo, rx script will wait the next dma request
(the 32th data come into the rxfifo) and schedule out to tx script. Once
tx script start to run, the rx script need to wait tx script finish even
if its priority higher than tx. Meanwhile, spi slave device may input
data continous, plus the rx data which triggered by new tx script(32 bytes).
That will quickly consume whole 64 bytes fifo, so we keep 16bytes availbale
even in the worst case new tx script triggered during two rx transfer. That
may slow down tx slightly, but better than overflow and RX DMA timeout.
Robin Gong [Sat, 13 Dec 2014 13:55:25 +0000 (21:55 +0800)]
MLK-9986-2 spi: spi-imx: use pio mode for the tail data in DMA mode
Sometimes the tail data can't trigger SDMA to read from rxfifo, or
SDMA miss the last dma request, in this case, DMA report RX timeout
and the rest tail data kept in rxfifo. Whatever, use pio read for the
tail rx data.
Robin Gong [Thu, 11 Sep 2014 01:18:44 +0000 (09:18 +0800)]
spi: spi-imx: add DMA support
Enable DMA support on i.mx6. The read speed can increase from 600KB/s
to 1.2MB/s on i.mx6q. You can disable or enable dma function in dts.
If not set "dma-names" in dts, spi will use PIO mode. This patch only
validate on i.mx6, not i.mx5, but encourage ones to apply this patch
on i.mx5 since they share the same IP.
Note:
Sometime, there is a weid data in rxfifo after one full tx/rx
transfer finish by DMA on i.mx6dl, so we disable dma functhion on
i.mx6dl.
Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit f62caccd12c17e4cb516d43a6e4dd8a3abc1f7e0)
(cherry picked from commit b87c98a8944c76840ed1375ed4792ef608de5c01)
Paul Gortmaker [Tue, 21 Jan 2014 21:22:47 +0000 (16:22 -0500)]
spi: delete non-required instances of include <linux/init.h>
None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>. Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.
According to Documentation/DMA-API.txt, dma_map_sg() returns 0 on failure.
As spi_map_buf() returns an error code, convert zero into -ENOMEM.
Keep the existing check for negative numbers just in case.
Rejecting unsupported values of spi-tx-bus-width and spi-rx-bus-width
may break compatibility with future DTs. Just ignore them, falling back
to Single SPI Transfers.
Mark Brown [Thu, 1 May 2014 17:47:52 +0000 (10:47 -0700)]
spi: core: Don't destroy master queue if we fail to create it
If we fail to create the master queue for some reason we should not attempt
to clean it up since attempting to stop a kthread that was not created will
hang and it's just generally bad practice. Unfortunately at present we call
spi_destroy_queue() even in cases where the creation fails.
Fix this by fixing the error handling in spi_master_initialize_queue() so
that we only flag the master as queued or destroy the queue if creation
succeeded. The change to the flag is done since the general master
cleanup uses this to destroy the queue.
spi: core: Protect DMA code by #ifdef CONFIG_HAS_DMA
If NO_DMA=y:
drivers/built-in.o: In function `spi_map_buf':
spi.c:(.text+0x21bc60): undefined reference to `dma_map_sg'
drivers/built-in.o: In function `spi_unmap_buf.isra.33':
spi.c:(.text+0x21c32e): undefined reference to `dma_unmap_sg'
make[3]: *** [vmlinux] Error 1
Protect the DMA code by #ifdef CONFIG_HAS_DMA to fix this:
- Extract __spi_map_msg() from spi_map_msg(),
- Provide dummy definitions of __spi_map_msg() and spi_unmap_msg() if
!CONFIG_HAS_DMA.
The existing timeout value in wait_for_completion_timeout is
calculated from the transfer length and speed with tolerance of 10msec.
This is too low because this is used for error conditions such as
hardware hang etc.
The xfer->speed_hz considered may not be the actual speed set
because the best clock divisor is chosen from a limited set such that
the actual speed <= requested speed. This will lead to timeout being
less than actual transfer time.
Considering acceptable latencies, this timeout can be set to a
value double the expected transfer plus 100 msecs.
This patch adds the same in the core.
Mark Brown [Sat, 29 Mar 2014 23:48:07 +0000 (23:48 +0000)]
spi: Fix handling of cs_change in core implementation
The core implementation of cs_change didn't follow the documentation
which says that cs_change in the middle of the transfer means to briefly
deassert chip select, instead it followed buggy drivers which change the
polarity of chip select. Use a delay of 10us between deassert and
reassert simply from pulling numbers out of a hat.
Mark Brown [Tue, 25 Mar 2014 19:28:22 +0000 (19:28 +0000)]
spi: Do not require a completion
There is no real reason why we require transfers to have a completion and
the only user of the completion now checks to see if one has been provided
before using it so stop enforcing this. This makes it more convenient for
drivers to chain multiple asynchronous transfers together.
Axel Lin [Mon, 17 Mar 2014 02:08:12 +0000 (10:08 +0800)]
spi: core: Use master->max_speed_hz as transfer speed when xfer->speed_hz > master->max_speed_hz
When xfer->speed_hz is greater than master->max_speed_hz, it's generally safe
to use master->max_speed_hz as transfer speed.
Thus use master->max_speed_hz as transfer speed rather than return error when
xfer->speed_hz > master->max_speed_hz.
Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit a6f87fad7b5132f026592729ccf65b995cdec35d)
(cherry picked from commit fe70982ad2c56031804d56ca8ed5e4f884c50c5b)
Atsushi Nemoto [Fri, 28 Feb 2014 14:03:16 +0000 (23:03 +0900)]
spi: core: make zero length transfer valid again
Zero length transfer becomes invalid since
"spi: core: Validate length of the transfers in message" commit,
but it should be valid to support an odd device, for example, which
requires long delay between chipselect and the first transfer, etc.
Axel Lin [Sun, 9 Feb 2014 16:08:05 +0000 (00:08 +0800)]
spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller
In __spi_validate(), xfer->speed_hz is set to be spi->max_speed_hz if it is not
set for this transfer. However, if spi->max_speed_hz is also not set,
xfer->speed_hz is 0. Some drivers (e.g. au1550, tegra114, tegra20-sflash,
tegra20-slink, etc.) then use below code to avoid setting xfer->speed_hz to 0.
/* Set speed to the spi max fequency if spi device has not set */
spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency;
Let's handle it in spi core.
If spi->max_speed_hz is not set, make it default to spi->master->max_speed_hz.
So In __spi_validate() if both xfer->speed_hz and spi->max_speed_hz are not set,
xfer->speed_hz will be set to spi->master->max_speed_hz.
Mark Brown [Sun, 2 Feb 2014 13:47:47 +0000 (13:47 +0000)]
spi: Make core DMA mapping functions generate scatterlists
We cannot unconditionally use dma_map_single() to map data for use with
SPI since transfers may exceed a page and virtual addresses may not be
provided with physically contiguous pages. Further, addresses allocated
using vmalloc() need to be mapped differently to other addresses.
Currently only the MXS driver handles all this, a few drivers do handle
the possibility that buffers may not be physically contiguous which is
the main potential problem but many don't even do that. Factoring this
out into the core will make it easier for drivers to do a good job so if
the driver is using the core DMA code then generate a scatterlist
instead of mapping to a single address so do that.
This code is mainly based on a combination of the existing code in the MXS
and PXA2xx drivers. In future we should be able to extend it to allow the
core to concatenate adjacent transfers if they are compatible, improving
performance.
Currently for simplicity clients are not allowed to use the scatterlist
when they do DMA mapping, in the future the existing single address
mappings will be replaced with use of the scatterlist most likely as
part of pre-verifying transfers.
This change makes it mandatory to use scatterlists when using the core DMA
mapping so update the s3c64xx driver to do this when used with dmaengine.
Doing so makes the code more ugly but it is expected that the old s3c-dma
code can be removed very soon.
Mark Brown [Tue, 28 Jan 2014 20:17:03 +0000 (20:17 +0000)]
spi: Provide core support for full duplex devices
It is fairly common for SPI devices to require that one or both transfer
directions is always active. Currently drivers open code this in various
ways with varying degrees of efficiency. Start factoring this out by
providing flags SPI_MASTER_MUST_TX and SPI_MASTER_MUST_RX. These will cause
the core to provide buffers for the requested direction if none are
specified in the underlying transfer.
Currently this is fairly inefficient since we actually allocate a data
buffer which may get large, support for mapping transfers using a
scatterlist will allow us to avoid this for DMA based transfers.
Mark Brown [Thu, 16 Jan 2014 12:22:43 +0000 (12:22 +0000)]
spi: Provide core support for DMA mapping transfers
The process of DMA mapping buffers for SPI transfers does not vary between
devices so in order to save duplication of code in drivers this can be
factored out into the core, allowing it to be integrated with the work that
is being done on factoring out the common elements from the data path
including more sharing of dmaengine code.
In order to use this masters need to provide a can_dma() operation and while
the hardware is prepared they should ensure that DMA channels are provided
in tx_dma and rx_dma. The core will then ensure that the buffers are mapped
for DMA prior to calling transfer_one_message().
Currently the cleanup on error is not complete, this needs to be improved.
Fabio Estevam [Thu, 11 Dec 2014 15:14:22 +0000 (13:14 -0200)]
MLK-9987: Input: imx_keypad: Fix suspend/resume while keypad is pressed
Since commit commit 560a64749d1dd0ff ("ENGR00318936-2 input: keyboard: imx:
remove usless release interrupt enabled) the following problem happens:
- Keep any keypad key pressed
- Enter low power mode via "echo mem > /sys/power/state"
- Then we are no longer able to wake-up the system via the keypad
The reason for this behaviour is that the KRIE (Release Interrupt) is not
enabled.
In order to fix this problem, we should enable KRIE when a key is pressed
(KPKD bit is set) or enable KDIE when no key is pressed (KPKR is set).
This way we will always have a valid source of keypad interrupt no matter if
the system entered low power mode while a keypad key was pressed or not.
Bai Ping [Fri, 26 Dec 2014 13:40:40 +0000 (21:40 +0800)]
MLK-10018-02 thermal: imx: notify thermal driver in low_bus_freq_mode
As thermal sensor alarm function needs PLL3 to be always on, but low power
idle needs all PLLs to be off, they are exclusive. Low power idle is only enabled
when system staying at low bus mode which means the overall system power consumption
is NOT high, thermal alarm function can be disabled in this mode to allow low power
idle to be entered, and thermal sensor will still use polling mechanism to monitor
the system temperature. Add busfreq notify to achieve this goal.
Bai Ping [Fri, 26 Dec 2014 13:37:31 +0000 (21:37 +0800)]
MLK-10018-01 arm: imx: Implement busfreq notifier calls for busfreq
Implement busfreq notifier calls used when busfreq entering low_bus_freq_mode.
When the system lower the bus frequency, some modules can be affected by bus
frequency change. Adding notifier call chains that allow driver affected by bus
frequency can be notified before and after low_bus_freq_mode.
Bai Ping [Fri, 26 Dec 2014 17:36:42 +0000 (01:36 +0800)]
MLK-10007-03 arm: imx: fix ARM and IPG clk ratio in low_bus_freq_mode
On i.MX6SL, we must make sure ARM:IPG clock ratio is within 12:5 when entering
wait mode. If the system is in low_bus_freq_mode, the IPG is at 12MHz
according the busfreq code. So the max rate of ARM is 28.8MHz when entering
wait mode. As there is no way run at this clk rate, so set ARM to run from
24MHz OSC.
Bai Ping [Fri, 26 Dec 2014 17:00:58 +0000 (01:00 +0800)]
MLK-10007-02 arm: imx: enable pll1 when changing arm_podf value
Before changing the arm_podf, the pll1 must be output enabled according
to the hardware design.
Refer to the clk tree implementation code for i.MX6SL. pll1's output will
be disabled when no clk is sourced from it. In busfreq code, in order to
successfully change the arm_clk rate, we must make sure pll1's output is
enabled before changing this clk rate. add imx6sl_enable_pll_arm() calls
to fulfill this requirement.
Additionally, only a bypassed output clk is ok, so no need to make sure pll1
is powered up.
Bai Ping [Wed, 12 Nov 2014 16:44:24 +0000 (00:44 +0800)]
MLK-9826 arm: imx6: Add low power idle support for imx6sl
Enable low power idle for imx6sl. When the busfreq is either
in ultra_low_bus_freq mode or audio_bus_freq_mode, we Can save
more power by reducing the system frequency further in ldle.
At present, Only two idle(WFI and WAIT) are supported.
WFI --> normal ARM ilde (first level idle)
WAIT mode --> low power idle (second level idle)
When entered WAIT mode, change the DDR, AHB/AXI and ARM clk frequency
as below if the system is in:
1. ultra_low_bus_freq:
DDR freq to 1MHz,
AHB/AXI freq to 3MHz,
ARM freq to 3MHz.
2. audio_low_bus_mode:
DDR freq to 25Hz,
AHB freq to 8MHz,
ARM freq to 8MHz.
Anatop can be put in low power mode when all the PLLs are powered down.
We can enable the low power bandgap and disable the rugulator bandgap,
enable the weak 2p5 LDO and disable the 2p5 LDO.
Robin Gong [Wed, 17 Dec 2014 11:33:11 +0000 (19:33 +0800)]
MLK-9891: ARM: dts: imx6sx-sabreauto: use WDOG_B pin to reset whole board
For the QSPI byte address not aligned in ROM code and kernel, we have to reset
power cycle to workaroud this issue. Use WDOG_B pin to trigger PWRON of pfuze.
Robin Gong [Fri, 31 Oct 2014 01:36:28 +0000 (09:36 +0800)]
MLK-9819 ARM: imx6sx: Add WDOG_B reset for i.mx6sx boards.
QSPI-NOR reboot failed in case of larger flash size such as 256M used, because
kernel QSPI-NOR flash use 4-bytes-address mode to visit 16MB+ area but ROM code
use 3-bytes-address mode to access QSPI-NOR. Thus, we have to use WDOG_B to
reset QSPI-NOR flash to workaround this.
Note:
Please update the u-boot with the below u-boot patch, otherwise system will
reboot endless while kernel boot:
"MLK-9819: ARM: mx6sx: clear WDOG3 Power Down Enable bit for i.mx6sx"
Pfuze200 only provide one power supply for VDDARM_IN and VDDSOC_IN,
for ldo-bypass mode, we have to pretend they are different regulators
otherwise regulator famework will refuse update voltage.
Fugang Duan [Sun, 4 Jan 2015 05:38:26 +0000 (13:38 +0800)]
MLK-10072 ARM: dts: imx6sx: add uart5 dte pad set for imx6sx-sabreauto board
Add imx6sx-sdb baord uart5 DTE pad set. To avoid a flood of dts files,
there only comment out DTE pinctrl set. If user want to test DTE mode,
it needs to rebuild the DTB file.
Fugang Duan [Sun, 4 Jan 2015 02:19:40 +0000 (10:19 +0800)]
ARM: imx: add FEC sleep mode callback function
i.MX6q/dl, i.MX6SX SOCs enet support sleep mode that magic packet can
wake up system in suspend status. For different SOCs, there have some
SOC specifical GPR register to set sleep on/off mode. So add these to
callback function for driver.
Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Fugang Duan [Sun, 4 Jan 2015 02:09:35 +0000 (10:09 +0800)]
net: fec: add Wake-on-LAN support
Support for Wake-on-LAN using Magic Packet. ENET IP supports sleep mode
in low power status, when system enter suspend status, Magic packet can
wake up system even if all SOC clocks are gate. The patch doing below things:
- flagging the device as a wakeup source for the system, as well as
its Wake-on-LAN interrupt
- prepare the hardware for entering WoL mode
- add standard ethtool WOL interface
- enable the ENET interrupt to wake us
Tested on i.MX6q/dl sabresd, sabreauto boards, i.MX6SX arm2 boards.
Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Fugang Duan [Tue, 30 Dec 2014 07:02:58 +0000 (15:02 +0800)]
MA-6031 tty: serial: imx: reduce the transmit and receive latency
Current driver use work queue for tx and rx dma task, which bring some schdule
latency. Remove the work queue since the work task don't cost much cpu loading.
Zhenyong Chen [Mon, 29 Dec 2014 17:27:02 +0000 (01:27 +0800)]
MGS-386 [#1506] Power mutex track is buggy in gckKERNEL_Dispatch
In function gckKERNEL_Dispatch, powerMutexAcquired is used to track
power mutex. It is missing from gcvHAL_WRITE_REGISTER. And in some
places return value of gckOS_AcquireMutex is not checked.
Date: Dec 29, 2014 Signed-off-by: Zhenyong Chen <b07273@freescale.com> Acked-by: Jason Liu
Sandor Yu [Fri, 19 Dec 2014 08:27:19 +0000 (16:27 +0800)]
MLK-10047: hdmi: Add hotplug detect for DVI monitors
The patch merger from fsl-arm-yocto-bsp community.
HPD is optional function for DVI spec,
so some DVI only monitor not support HPD.
Add RXSENSE interrupt check in HPD process to handle such case.
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com> Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit f047c45830c4e75c441056c76ded476f04938eac)
Richard Zhu [Thu, 25 Dec 2014 07:54:26 +0000 (15:54 +0800)]
MLK-10059 arm: imx6sx: correct the num of the pcie regulator
The orignal regulat num of the MPCIE_3V3 regulator is wrong,
change it to the correct one.
Otherwise, there would be the following warning when boot kernel.
WARNING: CPU: 0 PID: 1 at fs/sysfs/dir.c:52 sysfs_warn_dup+0x6c/0x8c()
sysfs: cannot create duplicate filename
'/devices/soc0/regulators.18/3.regulato'
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.24-01139-g690bd11 #166
[<80014e6c>] (unwind_backtrace) from [<800118ac>] (show_stack+0x10/0x14)
[<800118ac>] (show_stack) from [<806b0018>] (dump_stack+0x78/0xc0)
[<806b0018>] (dump_stack) from [<8002c1ec>]
(warn_slowpath_common+0x68/0x8c) [<8002c1ec>] (warn_slowpath_common)
from [<8002c240>] (warn_slowpath_fmt+0x30/0) [<8002c240>]
(warn_slowpath_fmt) from [<8012de80>] (sysfs_warn_dup+0x6c/0x8c)
[<8012de80>] (sysfs_warn_dup) from [<8012df28>]
(sysfs_create_dir_ns+0x88/0x98) [<8012df28>] (sysfs_create_dir_ns) from
[<80274be8>] (kobject_add_internal+0x9c) [<80274be8>]
(kobject_add_internal) from [<80274fe0>] (kobject_add+0x4c/0x98)
[<80274fe0>] (kobject_add) from [<80317bf0>] (device_add+0xe0/0x51c)
[<80317bf0>] (device_add) from [<804e2dd4>]
(of_platform_device_create_pdata+0x)
[<804e2dd4>] (of_platform_device_create_pdata) from [<804e2edc>]
(of_platform_b) [<804e2edc>] (of_platform_bus_create) from [<804e2f38>]
(of_platform_bus_create) [<804e2f38>] (of_platform_bus_create) from
[<804e3090>] (of_platform_populate+0) [<804e3090>]
(of_platform_populate) from [<80cf2d40>] (imx6sx_init_machine+0x38)
[<80cf2d40>] (imx6sx_init_machine) from [<80cde264>]
(customize_machine+0x1c/0x) [<80cde264>] (customize_machine) from
[<800088cc>] (do_one_initcall+0xe8/0x144) [<800088cc>] (do_one_initcall)
from [<80cdbc04>] (kernel_init_freeable+0x104/0x) [<80cdbc04>]
(kernel_init_freeable) from [<806abfb4>] (kernel_init+0x8/0xec)
[<806abfb4>] (kernel_init) from [<8000e5f8>] (ret_from_fork+0x14/0x3c)
---[ end trace f90dcd76c3b24ac8 ]---
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
Zidan Wang [Thu, 27 Nov 2014 08:53:08 +0000 (16:53 +0800)]
ASoC: wm8960: Move register initialisation to I2C driver probe()
We must ensure that the clocking configuration is valid as rapidly as possible.
And do software reset before the others registers updates, or the registers
will be reset to the default state.
Signed-off-by: Zidan Wang <b50113@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 3ad5e861a715cbe932cd145d4612c11e5912a72f)
Set the CODEC driver's suspend_bias_off flag rather than manually going to
SND_SOC_BIAS_OFF in suspend and SND_SOC_BIAS_STANDBY in resume. This makes
the code a bit shorter and cleaner.
Since the ASoC core now takes care of setting the bias level to
SND_SOC_BIAS_OFF when removing the CODEC there is no need to do it manually
anymore either.
The manual transition to SND_SOC_BIAS_STANDBY at the end of CODEC probe()
can also be removed as the core will automatically do this after the CODEC
has been probed.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 0a87a6e1c09c3b93d91bf65809e79cf6cf358785)
Zidan Wang [Thu, 20 Nov 2014 11:07:48 +0000 (19:07 +0800)]
ASoC: wm8960: Add device tree support
Document the device tree binding for the WM8960 codec, and modify the
driver to extract the platform data from device tree, if present.
Signed-off-by: Zidan Wang <b50113@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit e2280c9040d8bc5039617af35ccf7b8ac4abb428)
Shengjiu Wang [Wed, 24 Dec 2014 08:51:22 +0000 (16:51 +0800)]
MLK-10055-2: mfd: si476x-i2c: sound is registered when no FM module attached
The si476x_core_get_revision_info will send i2c command to FM module, if it
return error, there is no FM modules attached, so we need't to register the
sound card. otherwise, the pulseaudio will access this sound card, but return
a lot of i2c error.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
If there is no codec device, the machine driver will not register the
card. then alsa will not return RETRY error. update the error handling
for machine driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 8 Dec 2014 07:20:41 +0000 (15:20 +0800)]
MLK-10048-5: ASoC: fsl_asrc: underrun for playback 192k, 6ch p2p case.
For p2p output, the output divider should align with the output sample
rate, if use the Ideal sample rate, there will be a lot of overload, which
will cause underrun.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Shengjiu Wang [Mon, 15 Dec 2014 09:28:00 +0000 (17:28 +0800)]
MLK-10048-4: ASoC: fsl_asrc: fix dma task timeout issue when use 3 instance
Merged from 49108fcf7b79ed77d34be33b53a3964b2ac27204
1. Watermark level in sdma use byte as its unit. but asrc driver use
word, there is mismatch between them. Here fix this issue and sdma can
work more efficiency.
2. Enlarge the larst_period_size, when use small size, for some case,
the dma task will timeout, because sdma has no much data for output.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The reason of crach is that some variables are not protected in
function mxc_asrc_suspend(), when suspend, there is possibility to
access one NULL pointer.
Refine the spin lock usage, add protecting for pair_hold.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Robin Gong [Fri, 10 Oct 2014 06:55:19 +0000 (14:55 +0800)]
MLK-9776: dma: imx-sdma: make sure BUG_ON workaround do not work in loop mode
The earlier patch for "ENGR00313512 dma: imx-sdma: A bungle of work around for
BUG ON issue" is better not applied for loop mode, since there is no any cookie
touch in loop mode which means never trigger the BUG_ON workaround. Otherwise,
if upper driver such as UART disable dma channel but the device still has sent
the data into the RXFIFO, bd buffer will be consumed quickly and then stop.That
will trigger "RX FIFO overrun", like below log:
ENGR00313512 dma: imx-sdma: A bungle of work around for BUG ON issue
The BUG ON issue could be triggered by such scenarios:
A)
issue_pending(1) ->
<- SDMA irq(1)
<- SDMA tasklet(1) //Normal case
issue_pending(2) ->
terminate_all(2) ->
... system suspend/resume
issue_pending(3) ->
<- SDMA irq(2)
<- SDMA irq(3) //might also happen after tasklet(2)
<- SDMA tasklet(2)
<- SDMA tasklet(3) //BUG ON
B)
issue_pending(1) ->
<- SDMA irq(1)
<- SDMA tasklet(1) //Normal case
issue_pending(2) ->
<- SDMA irq(2) //might also happen after terminate_all(2)
terminate_all(2) ->
... system suspend/resume
issue_pending(3) ->
<- SDMA irq(3) //might also happen after tasklet(2)
<- SDMA tasklet(2)
<- SDMA tasklet(3) //BUG ON
The best fix for this issue is to eradicate irq(2) or tasklet(2).
However, currently we couldn't find an effective fix for both cases above.
Thus this fix could be treated as a work around. It fixes this issue by Reduce
the possiblity of irq(2) and tasklet(3).
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 1880fc41df51450825c2b17bae5be9536e26b73f)
Jiada Wang [Thu, 15 May 2014 01:22:13 +0000 (18:22 -0700)]
dmaengine: imx: correct sdmac->status for cyclic dma tx
In cyclic dma tx's handler sdma_handle_channel_loop(),
SDMA channel statue is set to either DMA_ERROR or DMA_IN_PROGRESS
based on each period's status. This has the following issues:
1) If one period's status is BD_RROR, then channel status
will be set to DMA_ERROR, but it will be overwritten to DMA_IN_PROGRESS
if the following periods are OK.
2) DMA client may call sdma_control(DMA_TERMINATE_ALL) to stop the cyclic dma
operation, sdma channel status will be set to DMA_ERROR,
but if after this handler is called, then again the channel status will be overwritten
to DMA_IN_PROGRESS. Then the following dmaengine_prep_dma_cyclic() will always fail,
as channel status is DMA_IN_PROGRESS.
As in cyclic dma tx, channel status will be initially set to DMA_IN_PROGRESS,
driver only needs to change it to DMA_ERROR, when something wrong happens
(one period status is wrong, or stoped by client explicitly).
Nicolin Chen [Tue, 5 Nov 2013 11:19:07 +0000 (19:19 +0800)]
ENGR00286273-1 dma: imx-sdma: allocate memory from iram
We try to allocate memory from SoC internal SRAM so that we can turn off
voltage of external DDR to save power. Surely, if we failed to get the
iram DT node or allocate memory due to no enough SRAM space, we would
allow SDMA driver to allocate memory in a traditional way.
Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit f6924fbdb90d1f01266fc018caff953457e04d34)
Shengjiu Wang [Mon, 10 Mar 2014 10:38:14 +0000 (18:38 +0800)]
ENGR00303524 Plugout HDMI while video playing, the audio is blocked.
The requirement for Android is different. it need the driver exit ASAP.
Don't block the user space, android will restart the driver in user space.
Yocto need the driver to start the transfer by itself.
Add a specific kernel config for this case.
Zidan Wang [Fri, 19 Dec 2014 03:13:01 +0000 (11:13 +0800)]
MLK-10038-1: mfd: si476x-i2c: Add support of si476x-rev4.0 board
Currently, si476x-rev1.0 and si476x-rev4.0 board just support A10 compatible
command set. For si476x-rev1.0 board, its firmware revision is unsupported and
will revert to A10 compatible function. For si476x-rev4.0 board, its firmware
revision is two and will use A30 function, but A30 command set function can't
work for the rev4.0 board.
So make the command set configurable in dts. If "revision-a10" is present,
set the revision to SI476X_REVISION_A10 to use A10 compatible commit set.
Otherwise, get the revision from si476x register.
this crash issue is caused by kernel NULL pointer when access GPU database,
GPU database is shared by all kernels, it can be queried with any valid kernel.
this patch will find the valid kernel pointer to avoid GPU kernel crash.
the crash backtrace with 'cat /sys/kernel/debug/gc/vidmem' on i.mx6sl:
[<80480600>] (gckKERNEL_FindDatabase+0x8/0xec) from [<80478db0>] (vidmem_show+0x2c/0x60)
[<80478db0>] (vidmem_show+0x2c/0x60) from [<800e4d5c>] (seq_read+0x1dc/0x47c)
[<800e4d5c>] (seq_read+0x1dc/0x47c) from [<800c7164>] (vfs_read+0x98/0x144)
[<800c7164>] (vfs_read+0x98/0x144) from [<800c77c4>] (SyS_read+0x3c/0x78)
[<800c77c4>] (SyS_read+0x3c/0x78) from [<8000e080>] (ret_fast_syscall+0x0/0x30)
Shengjiu Wang [Tue, 16 Dec 2014 02:09:50 +0000 (10:09 +0800)]
MLK-10001: ASoC: fsl_sai: no sound for mono wav in master mode
The bclk caculation should according to the slot num, not the channels.
Because sometime we have two slots, but only one slot is enabled for mono
channel.
As when the codec wm8962 works on mono mode, it needs two slots I2S signal.
So here set the default slots of sai to 2, and add function set_tdm_slots for
future usage.
Sandor Yu [Mon, 15 Dec 2014 08:31:25 +0000 (16:31 +0800)]
MLK-9997-3: csi v4l2 capture: function enhancement
-Add subdev function call enum_mbus_fmt from vidioc_enum_fmt_vid_cap.
-Add mbus convert to v4l2 pixelformat function.
-Return subdev function call result to ioctl function.
projects / karo-tx-linux.git / log