Marcin Wojtas [Thu, 29 Jan 2015 11:36:27 +0000 (12:36 +0100)]
mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes
According to erratum 'FE-2946959' both SDR50 and DDR50 modes require
specific clock adjustments in SDIO3 Configuration register.
This commit add the support of this register and for SDR50 or DDR50
mode use it as suggested by the erratum:
- Set the SDIO3 Clock Inv field in SDIO3 Configuration register to not
inverted.
- Set the Sample FeedBack Clock field to 0x1
[gregory.clement@free-electrons.com: port from 3.10]
Gregory CLEMENT [Thu, 29 Jan 2015 11:36:26 +0000 (12:36 +0100)]
mmc: sdhci-pxav3: Extend binding with SDIO3 conf reg for the Armada 38x
The SDHCI unit used on the Armada 38x needs using an extra register to
do specific clock adjustments in order to support the SDR50 and DDR50
modes. This patch extends the binding to allow using this register.
Marcin Wojtas [Thu, 29 Jan 2015 11:36:25 +0000 (12:36 +0100)]
mmc: sdhci-pxav3: Fix Armada 38x controller's caps according to erratum ERR-7878951
According to erratum 'ERR-7878951' Armada 38x SDHCI controller has
different capabilities than the ones shown in its registers:
- it doesn't support the voltage switching: it can work either with
3.3V or 1.8V supply
- it doesn't support the SDR104 mode
- SDR50 mode doesn't need tuning
The SDHCI_QUIRK_MISSING_CAPS quirk is used for updating the
capabilities accordingly.
[gregory.clement@free-electrons.com: port from 3.10]
Fixes: 5491ce3f79ee ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller") Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Gregory CLEMENT [Thu, 29 Jan 2015 11:36:24 +0000 (12:36 +0100)]
mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor
According to erratum 'FE-2946959' both SDR50 and DDR50 modes require
specific clock adjustments in SDIO3 Configuration register. However,
this register was not part of the device tree binding. Even if the
binding can (and will) be extended we still need handling the case
where this register was not available. In this case we use the
SDHCI_QUIRK_MISSING_CAPS quirk remove them from the capabilities.
This commit is based on the work done by Marcin Wojtas<mw@semihalf.com>
Fixes: 5491ce3f79ee ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller") Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jisheng Zhang [Thu, 29 Jan 2015 09:42:12 +0000 (17:42 +0800)]
mmc: sdhci: switch voltage before sdhci_set_ios in runtime resume
I observed the Host Control2 register isn't correctly restored
after runtime resuming on BG2Q. For example, the register reads
as 0x800c before runtime suspend, but it's set as 0x8004 after runtime
resuming. This could results in a non working host.
The reason is the Host Control2 is incorrectly reset when switching
voltage. We fix this by following the same sequence during initialization.
Pavan Kunapuli [Wed, 28 Jan 2015 16:45:16 +0000 (11:45 -0500)]
mmc: tegra: Write xfer_mode, CMD regs in together
If there is a gap between xfer mode and command register writes,
tegra SDMMC controller can sometimes issue a spurious command before
the CMD register is written. To avoid this, these two registers need
to be written together in a single write operation.
This is implemented as an NVQUIRK as it applies to T114, T124 and
T132.
Alexey Skidanov [Thu, 29 Jan 2015 08:49:43 +0000 (10:49 +0200)]
mmc: Resolve BKOPS compatability issue
This patch is coming to fix compatibility issue of BKOPS_EN field of EXT_CSD.
In eMMC-5.1, BKOPS_EN was changed, and now it has two operational bits:
Bit 0 - MANUAL_EN
Bit 1 - AUTO_EN
In previous eMMC revisions, only Bit 0 was supported.
Jisheng Zhang [Wed, 28 Jan 2015 11:54:12 +0000 (19:54 +0800)]
mmc: sdhci-pxav3: fix setting of pdata->clk_delay_cycles
Current code checks "clk_delay_cycles > 0" to know whether the optional
"mrvl,clk_delay_cycles" is set or not. But of_property_read_u32() doesn't
touch clk_delay_cycles if the property is not set. And type of
clk_delay_cycles is u32, so we may always set pdata->clk_delay_cycles as a
random value.
This patch fix this problem by check the return value of of_property_read_u32()
to know whether the optional clk-delay-cycles is set or not.
Jean Delvare [Mon, 26 Jan 2015 10:35:44 +0000 (11:35 +0100)]
mmc: Fix menuconfig alignment of MMC_SDHCI_* options
Let MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER depend on MMC_SDHCI. Not
only this is more correct, but this also avoids breaking the alignment
of all other MMC_SDHCI_* options in menuconfig.
Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Chris Ball <chris@printf.net> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Albert Herranz <albert_herranz@yahoo.es> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Pramod Gurav [Wed, 21 Jan 2015 10:17:17 +0000 (15:47 +0530)]
mmc: mmci: Get rid of dead code in mmci_dma_setup
DMA configuration has been removed from function mmci_dma_setup but the
local mask variable was not removed. This remains unused hence remove
it from the function and operations on it
Jisheng Zhang [Fri, 23 Jan 2015 10:08:21 +0000 (18:08 +0800)]
mmc: sdhci-pxav3: fix race between runtime pm and irq
This patch is to fix a race condition that may cause an unhandled irq,
which results in big sdhci interrupt numbers and endless "mmc1: got irq
while runtime suspended" msgs before v3.15.
Consider following scenario:
CPU0 CPU1
sdhci_pxav3_runtime_suspend()
spin_lock_irqsave(&host->lock, flags);
sdhci_irq()
spining on the &host->lock
host->runtime_suspended = true;
spin_unlock_irqrestore(&host->lock, flags);
get the &host->lock
runtime_suspended is true now
return IRQ_NONE;
Fix this race by using the core sdhci.c supplied sdhci_runtime_suspend_host()
in runtime suspend hook which will disable card interrupts. We also use the
sdhci_runtime_resume_host() in the runtime resume hook accordingly.
Ulf Hansson [Mon, 15 Dec 2014 15:07:11 +0000 (16:07 +0100)]
mmc: pwrseq_simple: Add support for a reset GPIO pin
The need for reset GPIOs has several times been pointed out from
erlier posted patchsets. Especially some WLAN chips which are
attached to an SDIO interface may use a GPIO reset.
The reset GPIO is asserted at initialization and prior we start the
power up procedure. The GPIO will be de-asserted right after the power
has been provided to the card, from the ->post_power_on() callback.
Note, the reset GPIO is optional. Thus we don't return an error even if
we can't find a GPIO for the consumer.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Ulf Hansson [Fri, 5 Dec 2014 13:36:58 +0000 (14:36 +0100)]
mmc: pwrseq: Initial support for the simple MMC power sequence provider
To add the core part for the MMC power sequence, let's start by adding
initial support for the simple MMC power sequence provider.
In this initial step, the MMC power sequence node are fetched and the
compatible string for the simple MMC power sequence provider are
verified.
At this point we don't parse the node for any properties, but instead
that will be handled from following patches. Since there are no
properties supported yet, let's just implement the ->alloc() and the
->free() callbacks.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Ulf Hansson [Mon, 8 Dec 2014 14:26:13 +0000 (15:26 +0100)]
mmc: pwrseq: Document DT bindings for the simple MMC power sequence
To support SOCs which specifies specific MMC power sequences, document
some MMC DT bindings to be able to describe these hardwares.
Let's also document bindings for a simple MMC power sequence provider,
which purpose is to support a set of common properties between various
SOCs.
In this initial step, let's also document a top level description of
the MMC power sequence and describe the compatible string used for the
simple MMC power sequence provider.
The simple MMC power sequence provider will initially support a reset
GPIO. From several earlier posted patches, it's clear that such
hardware exists. Especially some WLAN chips which are attached to an
SDIO interface may use a GPIO reset.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Ulf Hansson [Fri, 28 Nov 2014 13:38:36 +0000 (14:38 +0100)]
mmc: core: Initial support for MMC power sequences
System on chip designs may specify a specific MMC power sequence. To
successfully detect an (e)MMC/SD/SDIO card, that power sequence must
be followed while initializing the card.
To be able to handle these SOC specific power sequences, let's add a
MMC power sequence interface. It provides the following functions to
help the mmc core to deal with these power sequences.
mmc_pwrseq_alloc() - Invoked from mmc_of_parse(), to initialize data.
mmc_pwrseq_pre_power_on()- Invoked in the beginning of mmc_power_up().
mmc_pwrseq_post_power_on()- Invoked at the end in mmc_power_up().
mmc_pwrseq_power_off()- Invoked from mmc_power_off().
mmc_pwrseq_free() - Invoked from mmc_free_host(), to free data.
Each MMC power sequence provider will be responsible to implement a set
of callbacks. These callbacks mirrors the functions above.
This patch adds the skeleton, following patches will extend the core of
the MMC power sequence and add support for a specific simple MMC power
sequence.
Do note, since the mmc_pwrseq_alloc() is invoked from mmc_of_parse(),
host drivers needs to make use of this API to enable the support for
MMC power sequences. Moreover the MMC power sequence support depends on
CONFIG_OF.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Jisheng Zhang [Mon, 5 Jan 2015 07:59:19 +0000 (15:59 +0800)]
mmc: sdhci-pxav3: Remove checks for optional core clock in error/remove path
Commit 63589e92c2d9 ("clk: Ignore error and NULL pointers passed to
clk_{unprepare, disable}()") allows NULL or error pointer to be passed
unconditionally.
This patch is to simplify probe error and remove code paths.
However, we reserve the core clock checks in runtime suspend/resume code
because we want a little smaller latency.
Asaf Vertz [Tue, 20 Jan 2015 16:33:35 +0000 (18:33 +0200)]
mmc: block: fix format string warning
Fixed the following warning (reported by cppcheck):
[drivers/mmc/card/block.c:2149]: (warning) %d in format string (no. 1)
requires 'int' but the argument type is 'unsigned int'.
mmc: tmio: enable SoC specific DMA buswidth settings
Renesas SDHI which is based on TMIO driver has 2 type SoC. 1st one is
used as SH-Mobile series, and 2nd is R-Car series. R-Car series SoC has
DMA buswidth setting register which enables 32bit access.
This patch adds .dma_buswidth and enables it.
Current tmio_mmc driver is using tmio_mmc_data for driver/platform
specific data/callback, and it is needed for tmio_mmc_host_probe()
function. Because of this style, include/linux/mfd/tmio.h header has
tmio driver/framework specific data which is not needed from platform.
This patch adds new tmio_mmc_host_alloc/free() as cleanup preparation.
tmio driver specific data/callback will be implemented in tmio_mmc_host,
and platform specific data/callback will be implemented in tmio_mmc_data
in this cleanup.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Vincent Yang [Tue, 20 Jan 2015 08:05:18 +0000 (16:05 +0800)]
mmc: sdhci: host: add new f_sdh30
This patch adds new host controller driver for
Fujitsu SDHCI controller f_sdh30.
Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tetsuya Takinishi <t.takinishi@jp.fujitsu.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Vincent Yang [Tue, 20 Jan 2015 08:05:17 +0000 (16:05 +0800)]
mmc: sdhci: add a quirk for single block transactions
This patch defines a quirk to disable the block count
for single block transactions.
It is a preparation and will be used by Fujitsu
SDHCI controller f_sdh30 driver.
Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Vincent Yang [Tue, 20 Jan 2015 08:05:16 +0000 (16:05 +0800)]
mmc: sdhci: add a quirk for tuning work around
This patch defines a quirk for tuning work
around for some sdhci host controller. It sets
both SDHCI_CTRL_EXEC_TUNING and SDHCI_CTRL_TUNED_CLK
for tuning.
It is a preparation and will be used by Fujitsu
SDHCI controller f_sdh30 driver.
Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Vincent Yang [Tue, 20 Jan 2015 08:05:15 +0000 (16:05 +0800)]
mmc: sdhci: add a voltage switch callback function
This patch adds a callback function to do
controller-specific actions when switching voltages.
It is a preparation and will be used by Fujitsu
SDHCI controller f_sdh30 driver.
Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Doug Anderson [Tue, 13 Jan 2015 23:58:44 +0000 (15:58 -0800)]
mmc: dw_mmc: Power on vqmmc in MMC_POWER_ON, not MMC_POWER_UP
If we power up vqmmc in MMC_POWER_ON then we end up turning it on
before mmc_power_up() sets the signal voltage. That's not so great
since we might be powering it up at the wrong voltage.
Note that this is how Yuvaraj originally coded things up in
<https://patchwork.kernel.org/patch/4401231/> but he changed it on my
suggestion. Apparently I was wrong.
Reported-by: Alexandru M Stan <amstan@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Jisheng Zhang [Sun, 4 Jan 2015 15:15:47 +0000 (23:15 +0800)]
mmc: sdhci-pxav3: fix unbalanced clock issues during probe
Commit 0dcaa2499b7d ("sdhci-pxav3: Fix runtime PM initialization") tries
to fix one hang issue caused by calling sdhci_add_host() on a suspended
device. The fix enables the clock twice, once by clk_prepare_enable() and
another by pm_runtime_get_sync(), meaning that the clock will never be
gated at runtime PM suspend. I observed the power consumption regression on
Marvell BG2Q SoCs.
In fact, the fix is not correct. There still be a very small window
during which a runtime suspend might somehow occur after pm_runtime_enable()
but before pm_runtime_get_sync().
This patch fixes all of the two problems by just incrementing the usage
counter before pm_runtime_enable(). It also adjust the order of disabling
runtime pm and storing the usage count in the error path to handle clock
gating properly.
Adrian Hunter [Fri, 5 Dec 2014 17:41:10 +0000 (19:41 +0200)]
mmc: sdhci: Always init buf_ready_int
There is no point making the initialization
of buf_ready_int conditional on host version.
Simplify by just doing it always. Note that
the other conditional initializations will be
removed when the new way of doing re-tuning
is taken into use.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Adrian Hunter [Fri, 5 Dec 2014 17:40:59 +0000 (19:40 +0200)]
mmc: core: Simplify by adding mmc_execute_tuning()
For each MMC, SD and SDIO there is code that
holds the clock, calls ops->execute_tuning, and
releases the clock. Simplify the code a bit by
providing a separate function to do that.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
NeilBrown [Mon, 12 Jan 2015 19:23:18 +0000 (08:23 +1300)]
mmc: slot-gpio: Allow host driver to provide isr for card-detect interrupts
One of the reasons omap_hsmmc doesn't use the slot-gpio library
is that it has some non-standard functionality in the card-detect
interrupt service routine.
To make it possible for omap_hsmmc (and maybe others) to be converted
to use slot-gpio, add 'mmc_gpio_request_cd_isr' which provide an
alternate isr to be register by the slot-gpio code.
Johan Rudholm [Mon, 12 Jan 2015 14:38:05 +0000 (15:38 +0100)]
mmc: core: refactor the hw_reset routines
Move the (e)MMC specific hw_reset code from core.c into mmc.c. Call the
code from the new bus_ops member "reset". This also allows for adding
a SD card specific reset procedure.
Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Johan Rudholm [Mon, 12 Jan 2015 14:38:04 +0000 (15:38 +0100)]
mmc: core: always check status after reset
Always check if the card is alive after a successful reset. This allows
us to remove mmc_hw_reset_check(), leaving mmc_hw_reset() as the only
card reset interface.
Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Sascha Hauer [Mon, 30 Jun 2014 09:07:25 +0000 (11:07 +0200)]
mmc: Add SDIO function devicetree subnode parsing
This adds SDIO devicetree subnode parsing to the mmc core. While
SDIO devices are runtime probable they sometimes need nonprobable
additional information on embedded systems, like an additional gpio
interrupt or a clock. This patch makes it possible to supply this
information from the devicetree. SDIO drivers will find a pointer
to the devicenode in their devices of_node pointer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[hdegoede@redhat.com: Misc. cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Sascha Hauer [Mon, 30 Jun 2014 09:07:24 +0000 (11:07 +0200)]
mmc: Add SDIO function subnode DT documentation
While SDIO devices are runtime probable they sometimes need nonprobable
additional information on embedded systems, like an additional gpio
interrupt or a clock. This binding describes how to add child nodes to the
devicetree to supply this information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[hdegoede@redhat.com: Documented the need for #address- and #size-cells]
[hdegoede@redhat.com: Added a real world example] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The bounce buffer, used for misaligned bytes for ADMA access,
resides wholly within the (align_sz)-aligned word, just by construction.
The page addresses are aligned to (align_sz), either for 4 or 8 bytes
alignment, so that the aligned word resides wholly within a single page
and can't cross the page boundary. So, the bounce buffer can't cross
the page boundary too. That's why the warnings are never hit, and can
be safely removed.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Mon, 1 Dec 2014 15:13:39 +0000 (16:13 +0100)]
mmc: dw_mmc: Convert to mmc_send_tuning()
Instead of having a local hack taking care of sending the tuning
command and as well to verify the response pattern, let's convert to
the common mmc_send_tuning() API.
This change affects the Exynos variant, since it's the only one which
support the dw_mmc's ->execute_tuning() callback.
It's seems like dw_mmc internal logic expects failed data transfers to
be ended using a stop command. Let the tuning requests also fall into
this category, since there are data transfer involved.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Ulf Hansson [Thu, 11 Dec 2014 14:12:25 +0000 (15:12 +0100)]
mmc: sdhci-esdhc-imx: Fixup runtime PM conditions during ->probe()
By configure runtime PM prior we enable the use of it, we close the gap
for strange and unhandled conditions. Moreover it makes us rely on the
driver core, after finalized ->probe(), to request an inactive device
to become runtime PM idle/suspended, which earlier potentially could
happen already at pm_runtime_set_autosuspend_delay().
Ulf Hansson [Thu, 11 Dec 2014 13:56:15 +0000 (14:56 +0100)]
mmc: sdhci-esdhc-imx: Fixup ->remove()
Since sdhci_remove_host() access the device, we need to make sure it's
runtime PM resumed.
To handle clock gating properly in remove, we first have to make sure
the clocks are ungated.
To fix both these issues, by invoking pm_runtime_get_sync() early in
->remove() callback. Later once we disabled runtime PM, we can restore
the usage count.
Micky Ching [Tue, 23 Dec 2014 01:19:45 +0000 (09:19 +0800)]
mmc: rtsx: add support for sdio card
Modify transfer mode for support sdio card,
send cmd and data at the same time for read data transfer,
but send data after cmd for write data transfer.
Micky Ching [Tue, 23 Dec 2014 01:19:44 +0000 (09:19 +0800)]
mmc: rtsx: add helper function to simplify code
To support sdio card, transfer mode need make a change,
this need to split code and use it in different place,
Add new function to simplify repeat operation.
Micky Ching [Tue, 23 Dec 2014 01:19:42 +0000 (09:19 +0800)]
mmc: rtsx: add dump_reg_range to simplify dump register
Add a new function to dump register within a range.
We print 1 register a line before this patch,
this may make debug info too long when we add more register to dump.
The new dump_reg_range() dump to 8 register a line,
and it is easy to use.
Ulf Hansson [Thu, 18 Dec 2014 14:44:34 +0000 (15:44 +0100)]
mmc: slot-gpio: Make mmc_gpio_alloc() available for MMC core
As a step in moving slot-gpio functions/structs closer to the MMC core,
let's add a local header file for slot-gpio.
In this initial step we move mmc_gpio_alloc() into the header file,
to make it available for the MMC core. Following patches will show the
utilization of it.
Ulf Hansson [Thu, 18 Dec 2014 14:44:32 +0000 (15:44 +0100)]
mmc: slot-gpio: Remove option to explicitly free requested CD/WP GPIOs
The slot-gpio uses the devm*_ managed functions. Still it provide APIs
to explicitly free requested CD/WP GPIOs, but these API isn't being
used.
Therefore let's simplify slot-gpio by removing these unused APIs. If it
later turns out we need some of them, we can always consider to restore
the code.
Ulf Hansson [Thu, 18 Dec 2014 09:41:44 +0000 (10:41 +0100)]
mmc: core: Return error at failure of request CD/WP in mmc_of_parse()
Instead of just printing an error when mmc_of_parse() fails to request
CD/WP GPIO pins, let's propagate all errors, except for -ENOENT.
Earlier only -EPROBE_DEFER was handled correctly.
As a side effect of this change and by relying on host drivers to
handle the errors during ->probe(), we don't need to free any data in
the error path.
This also means we are actually fixing a bug, since we remove the call
to mmc_gpio_free_cd() which wasn't the correct function to invoke to
handle cleanup. Instead that should have been mmc_gpiod_free_cd().
Seungwon Jeon [Mon, 22 Dec 2014 12:12:02 +0000 (17:42 +0530)]
mmc: dw_mmc: fix the max_blk_count in IDMAC
Even though 1MB is reserved for descriptor table in IDMAC,
the dw_mmc host driver is allowed to receive only maximum
128KB block length in one request. This is caused by setting
improper max_blk_count. It needs to be e adjusted so that
descriptor table is used fully. It is found that the performance
is improved with the increased the max_blk_count.
Removing a relict from reverse engineering of the Android driver code
in sunxi_mmc_clk_set_rate.
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Fixing the register name in sunxi_mmc_reset_host since the
SDXC_HARDWARE_RESET bit is actually located within REG_GCTRL and not
REG_CMDR as it was pointed out by Allwinner.
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
1) Adding a comment in order to clarify the choice of the locks within
sunxi_mmc_handle_manual_stop
2) As <lixiang@allwinnertech.com> has pointed out the wait_dma variable
was not accessed within the spin lock block in sunxi_mmc_request and so
(even if it should never happend) it would have theoretically been
possible that some other function would access the variable at the same
time as the function. This has been changed now and the function is
using local variables outside the lock and copys the value over during
the lock phase.
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Hans de Goede [Tue, 16 Dec 2014 14:10:59 +0000 (15:10 +0100)]
mmc: sunxi: Fix setup of last descriptor of dma transfer
The last descriptor might be the first descriptor as well, so use masking to
add the LD (last descriptor) bit and drop the DIC (disable interrupt on
completion) bit rather then hard assignment as hard assignment will override
the FD (first descriptor) bit if there is only 1 descriptor.
Also set the ER (end of ring) bit and clear buf_addr_ptr2 on the last
descriptor, like the android kernel code does.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
projects / linux-beck.git / log